#ifndef _TD_BIU_REG_H_
#define _TD_BIU_REG_H_
// biu_reg.h 6-27-2007
// gen_biu Ver 1.0 generated by
#define xd_p_reg_p_aagc_log_2_acc   (*(volatile byte xdata *) 0xF000)
#define    p_reg_p_aagc_log_2_acc   0xF000
#define reg_p_aagc_log_2_acc_pos 0
#define reg_p_aagc_log_2_acc_len 4
#define reg_p_aagc_log_2_acc_lsb 0
#define xd_p_reg_p_aagc_signal_level_rdy    (*(volatile byte xdata *) 0xF001)
#define    p_reg_p_aagc_signal_level_rdy    0xF001
#define reg_p_aagc_signal_level_rdy_pos 0
#define reg_p_aagc_signal_level_rdy_len 1
#define reg_p_aagc_signal_level_rdy_lsb 0
#define xd_r_reg_r_aagc_signal_level_7_0    (*(volatile byte xdata *) 0xF002)
#define    r_reg_r_aagc_signal_level_7_0    0xF002
#define reg_r_aagc_signal_level_7_0_pos 0
#define reg_r_aagc_signal_level_7_0_len 8
#define reg_r_aagc_signal_level_7_0_lsb 0
#define xd_r_reg_r_aagc_signal_level_9_8    (*(volatile byte xdata *) 0xF003)
#define    r_reg_r_aagc_signal_level_9_8    0xF003
#define reg_r_aagc_signal_level_9_8_pos 0
#define reg_r_aagc_signal_level_9_8_len 2
#define reg_r_aagc_signal_level_9_8_lsb 8
#define xd_p_reg_p_aagc_rf_if_swap  (*(volatile byte xdata *) 0xF004)
#define    p_reg_p_aagc_rf_if_swap  0xF004
#define reg_p_aagc_rf_if_swap_pos 0
#define reg_p_aagc_rf_if_swap_len 1
#define reg_p_aagc_rf_if_swap_lsb 0
#define xd_p_reg_p_pwm_rf_if_from_hw    (*(volatile byte xdata *) 0xF006)
#define    p_reg_p_pwm_rf_if_from_hw    0xF006
#define reg_p_pwm_rf_if_from_hw_pos 0
#define reg_p_pwm_rf_if_from_hw_len 1
#define reg_p_pwm_rf_if_from_hw_lsb 0
#define xd_p_reg_aagc_out_if_inv    (*(volatile byte xdata *) 0xF007)
#define    p_reg_aagc_out_if_inv    0xF007
#define reg_aagc_out_if_inv_pos 0
#define reg_aagc_out_if_inv_len 1
#define reg_aagc_out_if_inv_lsb 0
#define xd_p_reg_aagc_int_en    (*(volatile byte xdata *) 0xF008)
#define    p_reg_aagc_int_en    0xF008
#define reg_aagc_int_en_pos 0
#define reg_aagc_int_en_len 1
#define reg_aagc_int_en_lsb 0
#define xd_p_reg_aagc_lock_change_flag  (*(volatile byte xdata *) 0xF009)
#define    p_reg_aagc_lock_change_flag  0xF009
#define reg_aagc_lock_change_flag_pos 0
#define reg_aagc_lock_change_flag_len 1
#define reg_aagc_lock_change_flag_lsb 0
#define xd_p_reg_aagc_rf_loop_bw_scale_acquire  (*(volatile byte xdata *) 0xF00A)
#define    p_reg_aagc_rf_loop_bw_scale_acquire  0xF00A
#define reg_aagc_rf_loop_bw_scale_acquire_pos 0
#define reg_aagc_rf_loop_bw_scale_acquire_len 5
#define reg_aagc_rf_loop_bw_scale_acquire_lsb 0
#define xd_p_reg_aagc_rf_loop_bw_scale_track    (*(volatile byte xdata *) 0xF00B)
#define    p_reg_aagc_rf_loop_bw_scale_track    0xF00B
#define reg_aagc_rf_loop_bw_scale_track_pos 0
#define reg_aagc_rf_loop_bw_scale_track_len 5
#define reg_aagc_rf_loop_bw_scale_track_lsb 0
#define xd_p_reg_aagc_if_loop_bw_scale_acquire  (*(volatile byte xdata *) 0xF00C)
#define    p_reg_aagc_if_loop_bw_scale_acquire  0xF00C
#define reg_aagc_if_loop_bw_scale_acquire_pos 0
#define reg_aagc_if_loop_bw_scale_acquire_len 5
#define reg_aagc_if_loop_bw_scale_acquire_lsb 0
#define xd_p_reg_aagc_if_loop_bw_scale_track    (*(volatile byte xdata *) 0xF00D)
#define    p_reg_aagc_if_loop_bw_scale_track    0xF00D
#define reg_aagc_if_loop_bw_scale_track_pos 0
#define reg_aagc_if_loop_bw_scale_track_len 5
#define reg_aagc_if_loop_bw_scale_track_lsb 0
#define xd_p_reg_aagc_max_rf_agc_7_0    (*(volatile byte xdata *) 0xF00E)
#define    p_reg_aagc_max_rf_agc_7_0    0xF00E
#define reg_aagc_max_rf_agc_7_0_pos 0
#define reg_aagc_max_rf_agc_7_0_len 8
#define reg_aagc_max_rf_agc_7_0_lsb 0
#define xd_p_reg_aagc_max_rf_agc_9_8    (*(volatile byte xdata *) 0xF00F)
#define    p_reg_aagc_max_rf_agc_9_8    0xF00F
#define reg_aagc_max_rf_agc_9_8_pos 0
#define reg_aagc_max_rf_agc_9_8_len 2
#define reg_aagc_max_rf_agc_9_8_lsb 8
#define xd_p_reg_aagc_min_rf_agc_7_0    (*(volatile byte xdata *) 0xF010)
#define    p_reg_aagc_min_rf_agc_7_0    0xF010
#define reg_aagc_min_rf_agc_7_0_pos 0
#define reg_aagc_min_rf_agc_7_0_len 8
#define reg_aagc_min_rf_agc_7_0_lsb 0
#define xd_p_reg_aagc_min_rf_agc_9_8    (*(volatile byte xdata *) 0xF011)
#define    p_reg_aagc_min_rf_agc_9_8    0xF011
#define reg_aagc_min_rf_agc_9_8_pos 0
#define reg_aagc_min_rf_agc_9_8_len 2
#define reg_aagc_min_rf_agc_9_8_lsb 8
#define xd_p_reg_aagc_max_if_agc_7_0    (*(volatile byte xdata *) 0xF012)
#define    p_reg_aagc_max_if_agc_7_0    0xF012
#define reg_aagc_max_if_agc_7_0_pos 0
#define reg_aagc_max_if_agc_7_0_len 8
#define reg_aagc_max_if_agc_7_0_lsb 0
#define xd_p_reg_aagc_max_if_agc_9_8    (*(volatile byte xdata *) 0xF013)
#define    p_reg_aagc_max_if_agc_9_8    0xF013
#define reg_aagc_max_if_agc_9_8_pos 0
#define reg_aagc_max_if_agc_9_8_len 2
#define reg_aagc_max_if_agc_9_8_lsb 8
#define xd_p_reg_aagc_min_if_agc_7_0    (*(volatile byte xdata *) 0xF014)
#define    p_reg_aagc_min_if_agc_7_0    0xF014
#define reg_aagc_min_if_agc_7_0_pos 0
#define reg_aagc_min_if_agc_7_0_len 8
#define reg_aagc_min_if_agc_7_0_lsb 0
#define xd_p_reg_aagc_min_if_agc_9_8    (*(volatile byte xdata *) 0xF015)
#define    p_reg_aagc_min_if_agc_9_8    0xF015
#define reg_aagc_min_if_agc_9_8_pos 0
#define reg_aagc_min_if_agc_9_8_len 2
#define reg_aagc_min_if_agc_9_8_lsb 8
#define xd_p_reg_aagc_lock_sample_scale (*(volatile byte xdata *) 0xF016)
#define    p_reg_aagc_lock_sample_scale 0xF016
#define reg_aagc_lock_sample_scale_pos 0
#define reg_aagc_lock_sample_scale_len 5
#define reg_aagc_lock_sample_scale_lsb 0
#define xd_p_reg_aagc_rf_agc_lock_scale_acquire (*(volatile byte xdata *) 0xF017)
#define    p_reg_aagc_rf_agc_lock_scale_acquire 0xF017
#define reg_aagc_rf_agc_lock_scale_acquire_pos 0
#define reg_aagc_rf_agc_lock_scale_acquire_len 3
#define reg_aagc_rf_agc_lock_scale_acquire_lsb 0
#define xd_p_reg_aagc_rf_agc_lock_scale_track   (*(volatile byte xdata *) 0xF018)
#define    p_reg_aagc_rf_agc_lock_scale_track   0xF018
#define reg_aagc_rf_agc_lock_scale_track_pos 0
#define reg_aagc_rf_agc_lock_scale_track_len 3
#define reg_aagc_rf_agc_lock_scale_track_lsb 0
#define xd_p_reg_aagc_if_agc_lock_scale_acquire (*(volatile byte xdata *) 0xF019)
#define    p_reg_aagc_if_agc_lock_scale_acquire 0xF019
#define reg_aagc_if_agc_lock_scale_acquire_pos 0
#define reg_aagc_if_agc_lock_scale_acquire_len 3
#define reg_aagc_if_agc_lock_scale_acquire_lsb 0
#define xd_p_reg_aagc_if_agc_lock_scale_track   (*(volatile byte xdata *) 0xF01A)
#define    p_reg_aagc_if_agc_lock_scale_track   0xF01A
#define reg_aagc_if_agc_lock_scale_track_pos 0
#define reg_aagc_if_agc_lock_scale_track_len 3
#define reg_aagc_if_agc_lock_scale_track_lsb 0
#define xd_p_reg_aagc_rf_top_numerator_s_7_0    (*(volatile byte xdata *) 0xF01B)
#define    p_reg_aagc_rf_top_numerator_s_7_0    0xF01B
#define reg_aagc_rf_top_numerator_s_7_0_pos 0
#define reg_aagc_rf_top_numerator_s_7_0_len 8
#define reg_aagc_rf_top_numerator_s_7_0_lsb 0
#define xd_p_reg_aagc_rf_top_numerator_s_9_8    (*(volatile byte xdata *) 0xF01C)
#define    p_reg_aagc_rf_top_numerator_s_9_8    0xF01C
#define reg_aagc_rf_top_numerator_s_9_8_pos 0
#define reg_aagc_rf_top_numerator_s_9_8_len 2
#define reg_aagc_rf_top_numerator_s_9_8_lsb 8
#define xd_p_reg_aagc_if_top_numerator_s_7_0    (*(volatile byte xdata *) 0xF01D)
#define    p_reg_aagc_if_top_numerator_s_7_0    0xF01D
#define reg_aagc_if_top_numerator_s_7_0_pos 0
#define reg_aagc_if_top_numerator_s_7_0_len 8
#define reg_aagc_if_top_numerator_s_7_0_lsb 0
#define xd_p_reg_aagc_if_top_numerator_s_9_8    (*(volatile byte xdata *) 0xF01E)
#define    p_reg_aagc_if_top_numerator_s_9_8    0xF01E
#define reg_aagc_if_top_numerator_s_9_8_pos 0
#define reg_aagc_if_top_numerator_s_9_8_len 2
#define reg_aagc_if_top_numerator_s_9_8_lsb 8
#define xd_p_reg_aagc_adc_out_desired_s_7_0 (*(volatile byte xdata *) 0xF01F)
#define    p_reg_aagc_adc_out_desired_s_7_0 0xF01F
#define reg_aagc_adc_out_desired_s_7_0_pos 0
#define reg_aagc_adc_out_desired_s_7_0_len 8
#define reg_aagc_adc_out_desired_s_7_0_lsb 0
#define xd_p_reg_aagc_adc_out_desired_s_8   (*(volatile byte xdata *) 0xF020)
#define    p_reg_aagc_adc_out_desired_s_8   0xF020
#define reg_aagc_adc_out_desired_s_8_pos 0
#define reg_aagc_adc_out_desired_s_8_len 1
#define reg_aagc_adc_out_desired_s_8_lsb 8
#define xd_p_reg_aagc_lock_count_th (*(volatile byte xdata *) 0xF021)
#define    p_reg_aagc_lock_count_th 0xF021
#define reg_aagc_lock_count_th_pos 0
#define reg_aagc_lock_count_th_len 4
#define reg_aagc_lock_count_th_lsb 0
#define xd_p_reg_aagc_rf_agc_unlock_numerator   (*(volatile byte xdata *) 0xF022)
#define    p_reg_aagc_rf_agc_unlock_numerator   0xF022
#define reg_aagc_rf_agc_unlock_numerator_pos 0
#define reg_aagc_rf_agc_unlock_numerator_len 6
#define reg_aagc_rf_agc_unlock_numerator_lsb 0
#define xd_p_reg_aagc_if_agc_unlock_numerator   (*(volatile byte xdata *) 0xF023)
#define    p_reg_aagc_if_agc_unlock_numerator   0xF023
#define reg_aagc_if_agc_unlock_numerator_pos 0
#define reg_aagc_if_agc_unlock_numerator_len 6
#define reg_aagc_if_agc_unlock_numerator_lsb 0
#define xd_p_reg_aagc_rf_top_numerator_m_7_0    (*(volatile byte xdata *) 0xF025)
#define    p_reg_aagc_rf_top_numerator_m_7_0    0xF025
#define reg_aagc_rf_top_numerator_m_7_0_pos 0
#define reg_aagc_rf_top_numerator_m_7_0_len 8
#define reg_aagc_rf_top_numerator_m_7_0_lsb 0
#define xd_p_reg_aagc_rf_top_numerator_m_9_8    (*(volatile byte xdata *) 0xF026)
#define    p_reg_aagc_rf_top_numerator_m_9_8    0xF026
#define reg_aagc_rf_top_numerator_m_9_8_pos 0
#define reg_aagc_rf_top_numerator_m_9_8_len 2
#define reg_aagc_rf_top_numerator_m_9_8_lsb 8
#define xd_p_reg_aagc_if_top_numerator_m_7_0    (*(volatile byte xdata *) 0xF027)
#define    p_reg_aagc_if_top_numerator_m_7_0    0xF027
#define reg_aagc_if_top_numerator_m_7_0_pos 0
#define reg_aagc_if_top_numerator_m_7_0_len 8
#define reg_aagc_if_top_numerator_m_7_0_lsb 0
#define xd_p_reg_aagc_if_top_numerator_m_9_8    (*(volatile byte xdata *) 0xF028)
#define    p_reg_aagc_if_top_numerator_m_9_8    0xF028
#define reg_aagc_if_top_numerator_m_9_8_pos 0
#define reg_aagc_if_top_numerator_m_9_8_len 2
#define reg_aagc_if_top_numerator_m_9_8_lsb 8
#define xd_p_reg_aagc_adc_out_desired_m_7_0 (*(volatile byte xdata *) 0xF029)
#define    p_reg_aagc_adc_out_desired_m_7_0 0xF029
#define reg_aagc_adc_out_desired_m_7_0_pos 0
#define reg_aagc_adc_out_desired_m_7_0_len 8
#define reg_aagc_adc_out_desired_m_7_0_lsb 0
#define xd_p_reg_aagc_adc_out_desired_m_8   (*(volatile byte xdata *) 0xF02A)
#define    p_reg_aagc_adc_out_desired_m_8   0xF02A
#define reg_aagc_adc_out_desired_m_8_pos 0
#define reg_aagc_adc_out_desired_m_8_len 1
#define reg_aagc_adc_out_desired_m_8_lsb 8
#define xd_p_reg_aagc_mobile_sel    (*(volatile byte xdata *) 0xF02B)
#define    p_reg_aagc_mobile_sel    0xF02B
#define reg_aagc_mobile_sel_pos 0
#define reg_aagc_mobile_sel_len 1
#define reg_aagc_mobile_sel_lsb 0
#define xd_p_reg_aagc_top_reload    (*(volatile byte xdata *) 0xF02C)
#define    p_reg_aagc_top_reload    0xF02C
#define reg_aagc_top_reload_pos 0
#define reg_aagc_top_reload_len 1
#define reg_aagc_top_reload_lsb 0
#define xd_p_reg_aagc_rf_delta_voltage_en   (*(volatile byte xdata *) 0xF02D)
#define    p_reg_aagc_rf_delta_voltage_en   0xF02D
#define reg_aagc_rf_delta_voltage_en_pos 0
#define reg_aagc_rf_delta_voltage_en_len 1
#define reg_aagc_rf_delta_voltage_en_lsb 0
#define xd_p_reg_aagc_rf_voltage_inc    (*(volatile byte xdata *) 0xF02E)
#define    p_reg_aagc_rf_voltage_inc    0xF02E
#define reg_aagc_rf_voltage_inc_pos 0
#define reg_aagc_rf_voltage_inc_len 1
#define reg_aagc_rf_voltage_inc_lsb 0
#define xd_p_reg_aagc_if_delta_voltage_en   (*(volatile byte xdata *) 0xF02F)
#define    p_reg_aagc_if_delta_voltage_en   0xF02F
#define reg_aagc_if_delta_voltage_en_pos 0
#define reg_aagc_if_delta_voltage_en_len 1
#define reg_aagc_if_delta_voltage_en_lsb 0
#define xd_p_reg_aagc_if_voltage_inc    (*(volatile byte xdata *) 0xF030)
#define    p_reg_aagc_if_voltage_inc    0xF030
#define reg_aagc_if_voltage_inc_pos 0
#define reg_aagc_if_voltage_inc_len 1
#define reg_aagc_if_voltage_inc_lsb 0
#define xd_p_reg_aagc_rf_delta_voltage_7_0  (*(volatile byte xdata *) 0xF032)
#define    p_reg_aagc_rf_delta_voltage_7_0  0xF032
#define reg_aagc_rf_delta_voltage_7_0_pos 0
#define reg_aagc_rf_delta_voltage_7_0_len 8
#define reg_aagc_rf_delta_voltage_7_0_lsb 0
#define xd_p_reg_aagc_rf_delta_voltage_15_8 (*(volatile byte xdata *) 0xF033)
#define    p_reg_aagc_rf_delta_voltage_15_8 0xF033
#define reg_aagc_rf_delta_voltage_15_8_pos 0
#define reg_aagc_rf_delta_voltage_15_8_len 8
#define reg_aagc_rf_delta_voltage_15_8_lsb 8
#define xd_p_reg_aagc_rf_delta_voltage_23_16    (*(volatile byte xdata *) 0xF034)
#define    p_reg_aagc_rf_delta_voltage_23_16    0xF034
#define reg_aagc_rf_delta_voltage_23_16_pos 0
#define reg_aagc_rf_delta_voltage_23_16_len 8
#define reg_aagc_rf_delta_voltage_23_16_lsb 16
#define xd_p_reg_aagc_rf_delta_voltage_29_24    (*(volatile byte xdata *) 0xF035)
#define    p_reg_aagc_rf_delta_voltage_29_24    0xF035
#define reg_aagc_rf_delta_voltage_29_24_pos 0
#define reg_aagc_rf_delta_voltage_29_24_len 6
#define reg_aagc_rf_delta_voltage_29_24_lsb 24
#define xd_p_reg_aagc_if_delta_voltage_7_0  (*(volatile byte xdata *) 0xF036)
#define    p_reg_aagc_if_delta_voltage_7_0  0xF036
#define reg_aagc_if_delta_voltage_7_0_pos 0
#define reg_aagc_if_delta_voltage_7_0_len 8
#define reg_aagc_if_delta_voltage_7_0_lsb 0
#define xd_p_reg_aagc_if_delta_voltage_15_8 (*(volatile byte xdata *) 0xF037)
#define    p_reg_aagc_if_delta_voltage_15_8 0xF037
#define reg_aagc_if_delta_voltage_15_8_pos 0
#define reg_aagc_if_delta_voltage_15_8_len 8
#define reg_aagc_if_delta_voltage_15_8_lsb 8
#define xd_p_reg_aagc_if_delta_voltage_23_16    (*(volatile byte xdata *) 0xF038)
#define    p_reg_aagc_if_delta_voltage_23_16    0xF038
#define reg_aagc_if_delta_voltage_23_16_pos 0
#define reg_aagc_if_delta_voltage_23_16_len 8
#define reg_aagc_if_delta_voltage_23_16_lsb 16
#define xd_p_reg_aagc_if_delta_voltage_29_24    (*(volatile byte xdata *) 0xF039)
#define    p_reg_aagc_if_delta_voltage_29_24    0xF039
#define reg_aagc_if_delta_voltage_29_24_pos 0
#define reg_aagc_if_delta_voltage_29_24_len 6
#define reg_aagc_if_delta_voltage_29_24_lsb 24
#define xd_p_reg_aagc_delta_voltage_hold_time   (*(volatile byte xdata *) 0xF03A)
#define    p_reg_aagc_delta_voltage_hold_time   0xF03A
#define reg_aagc_delta_voltage_hold_time_pos 0
#define reg_aagc_delta_voltage_hold_time_len 8
#define reg_aagc_delta_voltage_hold_time_lsb 0
#define xd_p_reg_aagc_top_th_dis    (*(volatile byte xdata *) 0xF041)
#define    p_reg_aagc_top_th_dis    0xF041
#define reg_aagc_top_th_dis_pos 0
#define reg_aagc_top_th_dis_len 1
#define reg_aagc_top_th_dis_lsb 0
#define xd_p_reg_p_aagc_rf_floor_dca    (*(volatile byte xdata *) 0xF042)
#define    p_reg_p_aagc_rf_floor_dca    0xF042
#define reg_p_aagc_rf_floor_dca_pos 0
#define reg_p_aagc_rf_floor_dca_len 8
#define reg_p_aagc_rf_floor_dca_lsb 0
#define xd_p_reg_p_aagc_if_floor_dca    (*(volatile byte xdata *) 0xF043)
#define    p_reg_p_aagc_if_floor_dca    0xF043
#define reg_p_aagc_if_floor_dca_pos 0
#define reg_p_aagc_if_floor_dca_len 8
#define reg_p_aagc_if_floor_dca_lsb 0
#define xd_p_reg_p_aagc_rf_gain_scale_dca   (*(volatile byte xdata *) 0xF044)
#define    p_reg_p_aagc_rf_gain_scale_dca   0xF044
#define reg_p_aagc_rf_gain_scale_dca_pos 0
#define reg_p_aagc_rf_gain_scale_dca_len 3
#define reg_p_aagc_rf_gain_scale_dca_lsb 0
#define xd_p_reg_p_aagc_if_gain_scale_dca   (*(volatile byte xdata *) 0xF045)
#define    p_reg_p_aagc_if_gain_scale_dca   0xF045
#define reg_p_aagc_if_gain_scale_dca_pos 0
#define reg_p_aagc_if_gain_scale_dca_len 3
#define reg_p_aagc_if_gain_scale_dca_lsb 0
#define xd_r_reg_r_aagc_ufl_gain    (*(volatile byte xdata *) 0xF046)
#define    r_reg_r_aagc_ufl_gain    0xF046
#define reg_r_aagc_ufl_gain_pos 0
#define reg_r_aagc_ufl_gain_len 8
#define reg_r_aagc_ufl_gain_lsb 0
#define xd_p_reg_aagc_out_rf_inv    (*(volatile byte xdata *) 0xF047)
#define    p_reg_aagc_out_rf_inv    0xF047
#define reg_aagc_out_rf_inv_pos 0
#define reg_aagc_out_rf_inv_len 1
#define reg_aagc_out_rf_inv_lsb 0
#define xd_p_reg_p_aagc_save_agc_control    (*(volatile byte xdata *) 0xF048)
#define    p_reg_p_aagc_save_agc_control    0xF048
#define reg_p_aagc_save_agc_control_pos 0
#define reg_p_aagc_save_agc_control_len 1
#define reg_p_aagc_save_agc_control_lsb 0
#define xd_p_reg_aagc_fw_sel    (*(volatile byte xdata *) 0xF049)
#define    p_reg_aagc_fw_sel    0xF049
#define reg_aagc_fw_sel_pos 0
#define reg_aagc_fw_sel_len 1
#define reg_aagc_fw_sel_lsb 0
#define xd_r_reg_r_aagc_rf_control_7_0  (*(volatile byte xdata *) 0xF04A)
#define    r_reg_r_aagc_rf_control_7_0  0xF04A
#define reg_r_aagc_rf_control_7_0_pos 0
#define reg_r_aagc_rf_control_7_0_len 8
#define reg_r_aagc_rf_control_7_0_lsb 0
#define xd_r_reg_r_aagc_rf_control_9_8  (*(volatile byte xdata *) 0xF04B)
#define    r_reg_r_aagc_rf_control_9_8  0xF04B
#define reg_r_aagc_rf_control_9_8_pos 0
#define reg_r_aagc_rf_control_9_8_len 2
#define reg_r_aagc_rf_control_9_8_lsb 8
#define xd_r_reg_r_aagc_if_control_7_0  (*(volatile byte xdata *) 0xF04C)
#define    r_reg_r_aagc_if_control_7_0  0xF04C
#define reg_r_aagc_if_control_7_0_pos 0
#define reg_r_aagc_if_control_7_0_len 8
#define reg_r_aagc_if_control_7_0_lsb 0
#define xd_r_reg_r_aagc_if_control_9_8  (*(volatile byte xdata *) 0xF04D)
#define    r_reg_r_aagc_if_control_9_8  0xF04D
#define reg_r_aagc_if_control_9_8_pos 0
#define reg_r_aagc_if_control_9_8_len 2
#define reg_r_aagc_if_control_9_8_lsb 8
#define xd_p_reg_aagc_adc_out_desired_from_fw_7_0   (*(volatile byte xdata *) 0xF04E)
#define    p_reg_aagc_adc_out_desired_from_fw_7_0   0xF04E
#define reg_aagc_adc_out_desired_from_fw_7_0_pos 0
#define reg_aagc_adc_out_desired_from_fw_7_0_len 8
#define reg_aagc_adc_out_desired_from_fw_7_0_lsb 0
#define xd_p_reg_aagc_adc_out_desired_from_fw_8 (*(volatile byte xdata *) 0xF04F)
#define    p_reg_aagc_adc_out_desired_from_fw_8 0xF04F
#define reg_aagc_adc_out_desired_from_fw_8_pos 0
#define reg_aagc_adc_out_desired_from_fw_8_len 1
#define reg_aagc_adc_out_desired_from_fw_8_lsb 8
#define xd_p_reg_aagc_init_rf_agc_7_0   (*(volatile byte xdata *) 0xF050)
#define    p_reg_aagc_init_rf_agc_7_0   0xF050
#define reg_aagc_init_rf_agc_7_0_pos 0
#define reg_aagc_init_rf_agc_7_0_len 8
#define reg_aagc_init_rf_agc_7_0_lsb 0
#define xd_p_reg_aagc_init_rf_agc_9_8   (*(volatile byte xdata *) 0xF051)
#define    p_reg_aagc_init_rf_agc_9_8   0xF051
#define reg_aagc_init_rf_agc_9_8_pos 0
#define reg_aagc_init_rf_agc_9_8_len 2
#define reg_aagc_init_rf_agc_9_8_lsb 8
#define xd_p_reg_aagc_init_if_agc_7_0   (*(volatile byte xdata *) 0xF052)
#define    p_reg_aagc_init_if_agc_7_0   0xF052
#define reg_aagc_init_if_agc_7_0_pos 0
#define reg_aagc_init_if_agc_7_0_len 8
#define reg_aagc_init_if_agc_7_0_lsb 0
#define xd_p_reg_aagc_init_if_agc_9_8   (*(volatile byte xdata *) 0xF053)
#define    p_reg_aagc_init_if_agc_9_8   0xF053
#define reg_aagc_init_if_agc_9_8_pos 0
#define reg_aagc_init_if_agc_9_8_len 2
#define reg_aagc_init_if_agc_9_8_lsb 8
#define xd_p_reg_p_pwm_if_high_unit_num (*(volatile byte xdata *) 0xF054)
#define    p_reg_p_pwm_if_high_unit_num 0xF054
#define reg_p_pwm_if_high_unit_num_pos 0
#define reg_p_pwm_if_high_unit_num_len 8
#define reg_p_pwm_if_high_unit_num_lsb 0
#define xd_p_reg_p_pwm_rf_high_unit_num (*(volatile byte xdata *) 0xF055)
#define    p_reg_p_pwm_rf_high_unit_num 0xF055
#define reg_p_pwm_rf_high_unit_num_pos 0
#define reg_p_pwm_rf_high_unit_num_len 8
#define reg_p_pwm_rf_high_unit_num_lsb 0
#define xd_p_reg_p_pwm_rf_gpio  (*(volatile byte xdata *) 0xF058)
#define    p_reg_p_pwm_rf_gpio  0xF058
#define reg_p_pwm_rf_gpio_pos 0
#define reg_p_pwm_rf_gpio_len 1
#define reg_p_pwm_rf_gpio_lsb 0
#define xd_p_reg_p_pwm_if_gpio  (*(volatile byte xdata *) 0xF058)
#define    p_reg_p_pwm_if_gpio  0xF058
#define reg_p_pwm_if_gpio_pos 1
#define reg_p_pwm_if_gpio_len 1
#define reg_p_pwm_if_gpio_lsb 0
#define xd_p_reg_aagc_in_sat_cnt_7_0    (*(volatile byte xdata *) 0xF05A)
#define    p_reg_aagc_in_sat_cnt_7_0    0xF05A
#define reg_aagc_in_sat_cnt_7_0_pos 0
#define reg_aagc_in_sat_cnt_7_0_len 8
#define reg_aagc_in_sat_cnt_7_0_lsb 0
#define xd_p_reg_aagc_in_sat_cnt_15_8   (*(volatile byte xdata *) 0xF05B)
#define    p_reg_aagc_in_sat_cnt_15_8   0xF05B
#define reg_aagc_in_sat_cnt_15_8_pos 0
#define reg_aagc_in_sat_cnt_15_8_len 8
#define reg_aagc_in_sat_cnt_15_8_lsb 8
#define xd_p_reg_aagc_in_sat_cnt_23_16  (*(volatile byte xdata *) 0xF05C)
#define    p_reg_aagc_in_sat_cnt_23_16  0xF05C
#define reg_aagc_in_sat_cnt_23_16_pos 0
#define reg_aagc_in_sat_cnt_23_16_len 8
#define reg_aagc_in_sat_cnt_23_16_lsb 16
#define xd_p_reg_aagc_in_sat_cnt_31_24  (*(volatile byte xdata *) 0xF05D)
#define    p_reg_aagc_in_sat_cnt_31_24  0xF05D
#define reg_aagc_in_sat_cnt_31_24_pos 0
#define reg_aagc_in_sat_cnt_31_24_len 8
#define reg_aagc_in_sat_cnt_31_24_lsb 24
#define xd_p_reg_p_pwm_cycle_unit   (*(volatile byte xdata *) 0xF05E)
#define    p_reg_p_pwm_cycle_unit   0xF05E
#define reg_p_pwm_cycle_unit_pos 0
#define reg_p_pwm_cycle_unit_len 4
#define reg_p_pwm_cycle_unit_lsb 0
#define xd_p_reg_p_pwm_en   (*(volatile byte xdata *) 0xF05F)
#define    p_reg_p_pwm_en   0xF05F
#define reg_p_pwm_en_pos 0
#define reg_p_pwm_en_len 1
#define reg_p_pwm_en_lsb 0
#define xd_r_reg_aagc_rf_gain   (*(volatile byte xdata *) 0xF060)
#define    r_reg_aagc_rf_gain   0xF060
#define reg_aagc_rf_gain_pos 0
#define reg_aagc_rf_gain_len 8
#define reg_aagc_rf_gain_lsb 0
#define xd_r_reg_aagc_if_gain   (*(volatile byte xdata *) 0xF061)
#define    r_reg_aagc_if_gain   0xF061
#define reg_aagc_if_gain_pos 0
#define reg_aagc_if_gain_len 8
#define reg_aagc_if_gain_lsb 0
#define xd_r_reg_aagc_current_desired_level_7_0 (*(volatile byte xdata *) 0xF062)
#define    r_reg_aagc_current_desired_level_7_0 0xF062
#define reg_aagc_current_desired_level_7_0_pos 0
#define reg_aagc_current_desired_level_7_0_len 8
#define reg_aagc_current_desired_level_7_0_lsb 0
#define xd_r_reg_aagc_current_desired_level_8   (*(volatile byte xdata *) 0xF063)
#define    r_reg_aagc_current_desired_level_8   0xF063
#define reg_aagc_current_desired_level_8_pos 0
#define reg_aagc_current_desired_level_8_len 1
#define reg_aagc_current_desired_level_8_lsb 8
#define xd_p_reg_tinr_fifo_size (*(volatile byte xdata *) 0xF064)
#define    p_reg_tinr_fifo_size 0xF064
#define reg_tinr_fifo_size_pos 0
#define reg_tinr_fifo_size_len 5
#define reg_tinr_fifo_size_lsb 0
#define xd_p_reg_tinr_saturation_th_7_0 (*(volatile byte xdata *) 0xF065)
#define    p_reg_tinr_saturation_th_7_0 0xF065
#define reg_tinr_saturation_th_7_0_pos 0
#define reg_tinr_saturation_th_7_0_len 8
#define reg_tinr_saturation_th_7_0_lsb 0
#define xd_p_reg_tinr_saturation_th_9_8 (*(volatile byte xdata *) 0xF066)
#define    p_reg_tinr_saturation_th_9_8 0xF066
#define reg_tinr_saturation_th_9_8_pos 0
#define reg_tinr_saturation_th_9_8_len 2
#define reg_tinr_saturation_th_9_8_lsb 8
#define xd_p_reg_tinr_saturation_cnt_th (*(volatile byte xdata *) 0xF067)
#define    p_reg_tinr_saturation_cnt_th 0xF067
#define reg_tinr_saturation_cnt_th_pos 0
#define reg_tinr_saturation_cnt_th_len 4
#define reg_tinr_saturation_cnt_th_lsb 0
#define xd_r_reg_tinr_counter_7_0   (*(volatile byte xdata *) 0xF068)
#define    r_reg_tinr_counter_7_0   0xF068
#define reg_tinr_counter_7_0_pos 0
#define reg_tinr_counter_7_0_len 8
#define reg_tinr_counter_7_0_lsb 0
#define xd_r_reg_tinr_counter_15_8  (*(volatile byte xdata *) 0xF069)
#define    r_reg_tinr_counter_15_8  0xF069
#define reg_tinr_counter_15_8_pos 0
#define reg_tinr_counter_15_8_len 8
#define reg_tinr_counter_15_8_lsb 8
#define xd_p_reg_tinr_counter_rst   (*(volatile byte xdata *) 0xF06C)
#define    p_reg_tinr_counter_rst   0xF06C
#define reg_tinr_counter_rst_pos 0
#define reg_tinr_counter_rst_len 1
#define reg_tinr_counter_rst_lsb 0
#define xd_p_reg_tinr_ins_th_7_0    (*(volatile byte xdata *) 0xF06F)
#define    p_reg_tinr_ins_th_7_0    0xF06F
#define reg_tinr_ins_th_7_0_pos 0
#define reg_tinr_ins_th_7_0_len 8
#define reg_tinr_ins_th_7_0_lsb 0
#define xd_p_reg_tinr_ins_th_9_8    (*(volatile byte xdata *) 0xF070)
#define    p_reg_tinr_ins_th_9_8    0xF070
#define reg_tinr_ins_th_9_8_pos 0
#define reg_tinr_ins_th_9_8_len 2
#define reg_tinr_ins_th_9_8_lsb 8
#define xd_p_reg_tinr_ins_en    (*(volatile byte xdata *) 0xF071)
#define    p_reg_tinr_ins_en    0xF071
#define reg_tinr_ins_en_pos 0
#define reg_tinr_ins_en_len 1
#define reg_tinr_ins_en_lsb 0
#define xd_p_reg_tinr_ins_size  (*(volatile byte xdata *) 0xF072)
#define    p_reg_tinr_ins_size  0xF072
#define reg_tinr_ins_size_pos 0
#define reg_tinr_ins_size_len 4
#define reg_tinr_ins_size_lsb 0
#define xd_p_reg_tinr_ins_hnum  (*(volatile byte xdata *) 0xF073)
#define    p_reg_tinr_ins_hnum  0xF073
#define reg_tinr_ins_hnum_pos 0
#define reg_tinr_ins_hnum_len 4
#define reg_tinr_ins_hnum_lsb 0
#define xd_r_reg_tinr_ins_hcnt_7_0  (*(volatile byte xdata *) 0xF074)
#define    r_reg_tinr_ins_hcnt_7_0  0xF074
#define reg_tinr_ins_hcnt_7_0_pos 0
#define reg_tinr_ins_hcnt_7_0_len 8
#define reg_tinr_ins_hcnt_7_0_lsb 0
#define xd_r_reg_tinr_ins_hcnt_15_8 (*(volatile byte xdata *) 0xF075)
#define    r_reg_tinr_ins_hcnt_15_8 0xF075
#define reg_tinr_ins_hcnt_15_8_pos 0
#define reg_tinr_ins_hcnt_15_8_len 8
#define reg_tinr_ins_hcnt_15_8_lsb 8
#define xd_p_reg_tinr_in_conj   (*(volatile byte xdata *) 0xF076)
#define    p_reg_tinr_in_conj   0xF076
#define reg_tinr_in_conj_pos 0
#define reg_tinr_in_conj_len 1
#define reg_tinr_in_conj_lsb 0
#define xd_p_reg_tinr_in_zero_if    (*(volatile byte xdata *) 0xF077)
#define    p_reg_tinr_in_zero_if    0xF077
#define reg_tinr_in_zero_if_pos 0
#define reg_tinr_in_zero_if_len 2
#define reg_tinr_in_zero_if_lsb 0
#define xd_p_reg_tinr_in_shift  (*(volatile byte xdata *) 0xF078)
#define    p_reg_tinr_in_shift  0xF078
#define reg_tinr_in_shift_pos 0
#define reg_tinr_in_shift_len 1
#define reg_tinr_in_shift_lsb 0
#define xd_p_reg_tinr_in_conj_sat_counter_rst   (*(volatile byte xdata *) 0xF079)
#define    p_reg_tinr_in_conj_sat_counter_rst   0xF079
#define reg_tinr_in_conj_sat_counter_rst_pos 0
#define reg_tinr_in_conj_sat_counter_rst_len 1
#define reg_tinr_in_conj_sat_counter_rst_lsb 0
#define xd_r_reg_tinr_in_conj_sat_counter_7_0   (*(volatile byte xdata *) 0xF07A)
#define    r_reg_tinr_in_conj_sat_counter_7_0   0xF07A
#define reg_tinr_in_conj_sat_counter_7_0_pos 0
#define reg_tinr_in_conj_sat_counter_7_0_len 8
#define reg_tinr_in_conj_sat_counter_7_0_lsb 0
#define xd_r_reg_tinr_in_conj_sat_counter_14_8  (*(volatile byte xdata *) 0xF07B)
#define    r_reg_tinr_in_conj_sat_counter_14_8  0xF07B
#define reg_tinr_in_conj_sat_counter_14_8_pos 0
#define reg_tinr_in_conj_sat_counter_14_8_len 7
#define reg_tinr_in_conj_sat_counter_14_8_lsb 8
#define xd_p_reg_p_antif_en (*(volatile byte xdata *) 0xF07C)
#define    p_reg_p_antif_en 0xF07C
#define reg_p_antif_en_pos 0
#define reg_p_antif_en_len 1
#define reg_p_antif_en_lsb 0
#define xd_p_reg_p_antif_rst    (*(volatile byte xdata *) 0xF07D)
#define    p_reg_p_antif_rst    0xF07D
#define reg_p_antif_rst_pos 0
#define reg_p_antif_rst_len 1
#define reg_p_antif_rst_lsb 0
#define xd_p_reg_p_antif_byp    (*(volatile byte xdata *) 0xF07E)
#define    p_reg_p_antif_byp    0xF07E
#define reg_p_antif_byp_pos 0
#define reg_p_antif_byp_len 1
#define reg_p_antif_byp_lsb 0
#define xd_p_reg_p_antif_mode   (*(volatile byte xdata *) 0xF07F)
#define    p_reg_p_antif_mode   0xF07F
#define reg_p_antif_mode_pos 0
#define reg_p_antif_mode_len 1
#define reg_p_antif_mode_lsb 0
#define xd_p_reg_p_ds_byp   (*(volatile byte xdata *) 0xF080)
#define    p_reg_p_ds_byp   0xF080
#define reg_p_ds_byp_pos 0
#define reg_p_ds_byp_len 1
#define reg_p_ds_byp_lsb 0
#define xd_p_reg_p_antif_dagc5_mode (*(volatile byte xdata *) 0xF081)
#define    p_reg_p_antif_dagc5_mode 0xF081
#define reg_p_antif_dagc5_mode_pos 0
#define reg_p_antif_dagc5_mode_len 2
#define reg_p_antif_dagc5_mode_lsb 0
#define xd_p_reg_p_antif_dagc5_desired_level_7_0    (*(volatile byte xdata *) 0xF082)
#define    p_reg_p_antif_dagc5_desired_level_7_0    0xF082
#define reg_p_antif_dagc5_desired_level_7_0_pos 0
#define reg_p_antif_dagc5_desired_level_7_0_len 8
#define reg_p_antif_dagc5_desired_level_7_0_lsb 0
#define xd_p_reg_p_antif_dagc5_desired_level_8  (*(volatile byte xdata *) 0xF083)
#define    p_reg_p_antif_dagc5_desired_level_8  0xF083
#define reg_p_antif_dagc5_desired_level_8_pos 0
#define reg_p_antif_dagc5_desired_level_8_len 1
#define reg_p_antif_dagc5_desired_level_8_lsb 8
#define xd_p_reg_p_antif_dagc5_apply_delay  (*(volatile byte xdata *) 0xF084)
#define    p_reg_p_antif_dagc5_apply_delay  0xF084
#define reg_p_antif_dagc5_apply_delay_pos 0
#define reg_p_antif_dagc5_apply_delay_len 7
#define reg_p_antif_dagc5_apply_delay_lsb 0
#define xd_p_reg_p_antif_dagc5_fixed_gain_7_0   (*(volatile byte xdata *) 0xF085)
#define    p_reg_p_antif_dagc5_fixed_gain_7_0   0xF085
#define reg_p_antif_dagc5_fixed_gain_7_0_pos 0
#define reg_p_antif_dagc5_fixed_gain_7_0_len 8
#define reg_p_antif_dagc5_fixed_gain_7_0_lsb 0
#define xd_p_reg_p_antif_dagc5_fixed_gain_11_8  (*(volatile byte xdata *) 0xF086)
#define    p_reg_p_antif_dagc5_fixed_gain_11_8  0xF086
#define reg_p_antif_dagc5_fixed_gain_11_8_pos 0
#define reg_p_antif_dagc5_fixed_gain_11_8_len 4
#define reg_p_antif_dagc5_fixed_gain_11_8_lsb 8
#define xd_p_reg_p_antif_dagc5_use_despow   (*(volatile byte xdata *) 0xF087)
#define    p_reg_p_antif_dagc5_use_despow   0xF087
#define reg_p_antif_dagc5_use_despow_pos 0
#define reg_p_antif_dagc5_use_despow_len 1
#define reg_p_antif_dagc5_use_despow_lsb 0
#define xd_p_reg_p_antif_dagc5_log_2_accumulate_num (*(volatile byte xdata *) 0xF088)
#define    p_reg_p_antif_dagc5_log_2_accumulate_num 0xF088
#define reg_p_antif_dagc5_log_2_accumulate_num_pos 0
#define reg_p_antif_dagc5_log_2_accumulate_num_len 5
#define reg_p_antif_dagc5_log_2_accumulate_num_lsb 0
#define xd_p_reg_p_antif_dagc5_in_sat_cnt_7_0   (*(volatile byte xdata *) 0xF089)
#define    p_reg_p_antif_dagc5_in_sat_cnt_7_0   0xF089
#define reg_p_antif_dagc5_in_sat_cnt_7_0_pos 0
#define reg_p_antif_dagc5_in_sat_cnt_7_0_len 8
#define reg_p_antif_dagc5_in_sat_cnt_7_0_lsb 0
#define xd_p_reg_p_antif_dagc5_in_sat_cnt_15_8  (*(volatile byte xdata *) 0xF08A)
#define    p_reg_p_antif_dagc5_in_sat_cnt_15_8  0xF08A
#define reg_p_antif_dagc5_in_sat_cnt_15_8_pos 0
#define reg_p_antif_dagc5_in_sat_cnt_15_8_len 8
#define reg_p_antif_dagc5_in_sat_cnt_15_8_lsb 8
#define xd_p_reg_p_antif_dagc5_in_sat_cnt_23_16 (*(volatile byte xdata *) 0xF08B)
#define    p_reg_p_antif_dagc5_in_sat_cnt_23_16 0xF08B
#define reg_p_antif_dagc5_in_sat_cnt_23_16_pos 0
#define reg_p_antif_dagc5_in_sat_cnt_23_16_len 8
#define reg_p_antif_dagc5_in_sat_cnt_23_16_lsb 16
#define xd_p_reg_p_antif_dagc5_in_sat_cnt_31_24 (*(volatile byte xdata *) 0xF08C)
#define    p_reg_p_antif_dagc5_in_sat_cnt_31_24 0xF08C
#define reg_p_antif_dagc5_in_sat_cnt_31_24_pos 0
#define reg_p_antif_dagc5_in_sat_cnt_31_24_len 8
#define reg_p_antif_dagc5_in_sat_cnt_31_24_lsb 24
#define xd_p_reg_p_antif_dagc5_out_sat_cnt_7_0  (*(volatile byte xdata *) 0xF08D)
#define    p_reg_p_antif_dagc5_out_sat_cnt_7_0  0xF08D
#define reg_p_antif_dagc5_out_sat_cnt_7_0_pos 0
#define reg_p_antif_dagc5_out_sat_cnt_7_0_len 8
#define reg_p_antif_dagc5_out_sat_cnt_7_0_lsb 0
#define xd_p_reg_p_antif_dagc5_out_sat_cnt_15_8 (*(volatile byte xdata *) 0xF08E)
#define    p_reg_p_antif_dagc5_out_sat_cnt_15_8 0xF08E
#define reg_p_antif_dagc5_out_sat_cnt_15_8_pos 0
#define reg_p_antif_dagc5_out_sat_cnt_15_8_len 8
#define reg_p_antif_dagc5_out_sat_cnt_15_8_lsb 8
#define xd_p_reg_p_antif_dagc5_out_sat_cnt_23_16    (*(volatile byte xdata *) 0xF08F)
#define    p_reg_p_antif_dagc5_out_sat_cnt_23_16    0xF08F
#define reg_p_antif_dagc5_out_sat_cnt_23_16_pos 0
#define reg_p_antif_dagc5_out_sat_cnt_23_16_len 8
#define reg_p_antif_dagc5_out_sat_cnt_23_16_lsb 16
#define xd_p_reg_p_antif_dagc5_out_sat_cnt_31_24    (*(volatile byte xdata *) 0xF090)
#define    p_reg_p_antif_dagc5_out_sat_cnt_31_24    0xF090
#define reg_p_antif_dagc5_out_sat_cnt_31_24_pos 0
#define reg_p_antif_dagc5_out_sat_cnt_31_24_len 8
#define reg_p_antif_dagc5_out_sat_cnt_31_24_lsb 24
#define xd_p_reg_p_antif_dagc5_rst  (*(volatile byte xdata *) 0xF091)
#define    p_reg_p_antif_dagc5_rst  0xF091
#define reg_p_antif_dagc5_rst_pos 0
#define reg_p_antif_dagc5_rst_len 1
#define reg_p_antif_dagc5_rst_lsb 0
#define xd_p_reg_p_antif_dagc5_en   (*(volatile byte xdata *) 0xF092)
#define    p_reg_p_antif_dagc5_en   0xF092
#define reg_p_antif_dagc5_en_pos 0
#define reg_p_antif_dagc5_en_len 1
#define reg_p_antif_dagc5_en_lsb 0
#define xd_p_reg_p_antif_sc_mode    (*(volatile byte xdata *) 0xF093)
#define    p_reg_p_antif_sc_mode    0xF093
#define reg_p_antif_sc_mode_pos 0
#define reg_p_antif_sc_mode_len 4
#define reg_p_antif_sc_mode_lsb 0
#define xd_p_reg_p_antif_dagc5_done (*(volatile byte xdata *) 0xF094)
#define    p_reg_p_antif_dagc5_done 0xF094
#define reg_p_antif_dagc5_done_pos 0
#define reg_p_antif_dagc5_done_len 1
#define reg_p_antif_dagc5_done_lsb 0
#define xd_r_reg_r_antif_sc_7_0 (*(volatile byte xdata *) 0xF095)
#define    r_reg_r_antif_sc_7_0 0xF095
#define reg_r_antif_sc_7_0_pos 0
#define reg_r_antif_sc_7_0_len 8
#define reg_r_antif_sc_7_0_lsb 0
#define xd_r_reg_r_antif_sc_15_8    (*(volatile byte xdata *) 0xF096)
#define    r_reg_r_antif_sc_15_8    0xF096
#define reg_r_antif_sc_15_8_pos 0
#define reg_r_antif_sc_15_8_len 8
#define reg_r_antif_sc_15_8_lsb 8
#define xd_r_reg_r_antif_dagc5_multiplier_7_0   (*(volatile byte xdata *) 0xF097)
#define    r_reg_r_antif_dagc5_multiplier_7_0   0xF097
#define reg_r_antif_dagc5_multiplier_7_0_pos 0
#define reg_r_antif_dagc5_multiplier_7_0_len 8
#define reg_r_antif_dagc5_multiplier_7_0_lsb 0
#define xd_r_reg_r_antif_dagc5_multiplier_15_8  (*(volatile byte xdata *) 0xF098)
#define    r_reg_r_antif_dagc5_multiplier_15_8  0xF098
#define reg_r_antif_dagc5_multiplier_15_8_pos 0
#define reg_r_antif_dagc5_multiplier_15_8_len 8
#define reg_r_antif_dagc5_multiplier_15_8_lsb 8
#define xd_r_reg_r_antif_dagc5_right_shift_bits (*(volatile byte xdata *) 0xF099)
#define    r_reg_r_antif_dagc5_right_shift_bits 0xF099
#define reg_r_antif_dagc5_right_shift_bits_pos 0
#define reg_r_antif_dagc5_right_shift_bits_len 4
#define reg_r_antif_dagc5_right_shift_bits_lsb 0
#define xd_p_reg_p_antif_dagc5_bypass_scale_ctl (*(volatile byte xdata *) 0xF09A)
#define    p_reg_p_antif_dagc5_bypass_scale_ctl 0xF09A
#define reg_p_antif_dagc5_bypass_scale_ctl_pos 0
#define reg_p_antif_dagc5_bypass_scale_ctl_len 3
#define reg_p_antif_dagc5_bypass_scale_ctl_lsb 0
#define xd_p_reg_mccid_ccirunno_7_0 (*(volatile byte xdata *) 0xF09B)
#define    p_reg_mccid_ccirunno_7_0 0xF09B
#define reg_mccid_ccirunno_7_0_pos 0
#define reg_mccid_ccirunno_7_0_len 8
#define reg_mccid_ccirunno_7_0_lsb 0
#define xd_p_reg_mccid_ccirunno_8   (*(volatile byte xdata *) 0xF09C)
#define    p_reg_mccid_ccirunno_8   0xF09C
#define reg_mccid_ccirunno_8_pos 0
#define reg_mccid_ccirunno_8_len 1
#define reg_mccid_ccirunno_8_lsb 8
#define xd_p_reg_mccid_acirunno_7_0 (*(volatile byte xdata *) 0xF09D)
#define    p_reg_mccid_acirunno_7_0 0xF09D
#define reg_mccid_acirunno_7_0_pos 0
#define reg_mccid_acirunno_7_0_len 8
#define reg_mccid_acirunno_7_0_lsb 0
#define xd_p_reg_mccid_acirunno_8   (*(volatile byte xdata *) 0xF09E)
#define    p_reg_mccid_acirunno_8   0xF09E
#define reg_mccid_acirunno_8_pos 0
#define reg_mccid_acirunno_8_len 1
#define reg_mccid_acirunno_8_lsb 8
#define xd_p_reg_mccid_maxtonenearrange_7_0 (*(volatile byte xdata *) 0xF09F)
#define    p_reg_mccid_maxtonenearrange_7_0 0xF09F
#define reg_mccid_maxtonenearrange_7_0_pos 0
#define reg_mccid_maxtonenearrange_7_0_len 8
#define reg_mccid_maxtonenearrange_7_0_lsb 0
#define xd_p_reg_mccid_maxtonenearrange_8   (*(volatile byte xdata *) 0xF0A0)
#define    p_reg_mccid_maxtonenearrange_8   0xF0A0
#define reg_mccid_maxtonenearrange_8_pos 0
#define reg_mccid_maxtonenearrange_8_len 1
#define reg_mccid_maxtonenearrange_8_lsb 8
#define xd_r_reg_mccid_maxacipower_7_0  (*(volatile byte xdata *) 0xF0A1)
#define    r_reg_mccid_maxacipower_7_0  0xF0A1
#define reg_mccid_maxacipower_7_0_pos 0
#define reg_mccid_maxacipower_7_0_len 8
#define reg_mccid_maxacipower_7_0_lsb 0
#define xd_r_reg_mccid_maxacipower_15_8 (*(volatile byte xdata *) 0xF0A2)
#define    r_reg_mccid_maxacipower_15_8 0xF0A2
#define reg_mccid_maxacipower_15_8_pos 0
#define reg_mccid_maxacipower_15_8_len 8
#define reg_mccid_maxacipower_15_8_lsb 8
#define xd_r_reg_mccid_maxacipower_19_16    (*(volatile byte xdata *) 0xF0A3)
#define    r_reg_mccid_maxacipower_19_16    0xF0A3
#define reg_mccid_maxacipower_19_16_pos 0
#define reg_mccid_maxacipower_19_16_len 4
#define reg_mccid_maxacipower_19_16_lsb 16
#define xd_p_reg_p_dcoe_en  (*(volatile byte xdata *) 0xF0D5)
#define    p_reg_p_dcoe_en  0xF0D5
#define reg_p_dcoe_en_pos 0
#define reg_p_dcoe_en_len 1
#define reg_p_dcoe_en_lsb 0
#define xd_p_reg_p_dcoe_rst (*(volatile byte xdata *) 0xF0D6)
#define    p_reg_p_dcoe_rst 0xF0D6
#define reg_p_dcoe_rst_pos 0
#define reg_p_dcoe_rst_len 1
#define reg_p_dcoe_rst_lsb 0
#define xd_p_reg_p_dcoe_clear   (*(volatile byte xdata *) 0xF0D7)
#define    p_reg_p_dcoe_clear   0xF0D7
#define reg_p_dcoe_clear_pos 0
#define reg_p_dcoe_clear_len 1
#define reg_p_dcoe_clear_lsb 0
#define xd_p_reg_p_dcoe_applyloc_7_0    (*(volatile byte xdata *) 0xF0D8)
#define    p_reg_p_dcoe_applyloc_7_0    0xF0D8
#define reg_p_dcoe_applyloc_7_0_pos 0
#define reg_p_dcoe_applyloc_7_0_len 8
#define reg_p_dcoe_applyloc_7_0_lsb 0
#define xd_p_reg_p_dcoe_applyloc_12_8   (*(volatile byte xdata *) 0xF0D9)
#define    p_reg_p_dcoe_applyloc_12_8   0xF0D9
#define reg_p_dcoe_applyloc_12_8_pos 0
#define reg_p_dcoe_applyloc_12_8_len 5
#define reg_p_dcoe_applyloc_12_8_lsb 8
#define xd_p_reg_p_dcoe_accnums (*(volatile byte xdata *) 0xF0DA)
#define    p_reg_p_dcoe_accnums 0xF0DA
#define reg_p_dcoe_accnums_pos 0
#define reg_p_dcoe_accnums_len 3
#define reg_p_dcoe_accnums_lsb 0
#define xd_p_reg_p_dcoe_accweightsum_sh (*(volatile byte xdata *) 0xF0DB)
#define    p_reg_p_dcoe_accweightsum_sh 0xF0DB
#define reg_p_dcoe_accweightsum_sh_pos 0
#define reg_p_dcoe_accweightsum_sh_len 3
#define reg_p_dcoe_accweightsum_sh_lsb 0
#define xd_p_reg_p_dcoe_accweightcurr   (*(volatile byte xdata *) 0xF0DC)
#define    p_reg_p_dcoe_accweightcurr   0xF0DC
#define reg_p_dcoe_accweightcurr_pos 0
#define reg_p_dcoe_accweightcurr_len 8
#define reg_p_dcoe_accweightcurr_lsb 0
#define xd_p_reg_dcoe_apply_rd  (*(volatile byte xdata *) 0xF0DF)
#define    p_reg_dcoe_apply_rd  0xF0DF
#define reg_dcoe_apply_rd_pos 0
#define reg_dcoe_apply_rd_len 1
#define reg_dcoe_apply_rd_lsb 0
#define xd_r_reg_dcoe_apply_i   (*(volatile byte xdata *) 0xF0E0)
#define    r_reg_dcoe_apply_i   0xF0E0
#define reg_dcoe_apply_i_pos 0
#define reg_dcoe_apply_i_len 8
#define reg_dcoe_apply_i_lsb 0
#define xd_r_reg_dcoe_apply_q   (*(volatile byte xdata *) 0xF0E1)
#define    r_reg_dcoe_apply_q   0xF0E1
#define reg_dcoe_apply_q_pos 0
#define reg_dcoe_apply_q_len 8
#define reg_dcoe_apply_q_lsb 0
#define xd_p_reg_p_dcrm_en  (*(volatile byte xdata *) 0xF0E2)
#define    p_reg_p_dcrm_en  0xF0E2
#define reg_p_dcrm_en_pos 0
#define reg_p_dcrm_en_len 1
#define reg_p_dcrm_en_lsb 0
#define xd_p_reg_p_dcrm_fir (*(volatile byte xdata *) 0xF0E3)
#define    p_reg_p_dcrm_fir 0xF0E3
#define reg_p_dcrm_fir_pos 0
#define reg_p_dcrm_fir_len 1
#define reg_p_dcrm_fir_lsb 0
#define xd_p_reg_p_dcrm_log2_firlen (*(volatile byte xdata *) 0xF0E4)
#define    p_reg_p_dcrm_log2_firlen 0xF0E4
#define reg_p_dcrm_log2_firlen_pos 0
#define reg_p_dcrm_log2_firlen_len 3
#define reg_p_dcrm_log2_firlen_lsb 0
#define xd_r_reg_dcoe_apply_fir_i   (*(volatile byte xdata *) 0xF0E5)
#define    r_reg_dcoe_apply_fir_i   0xF0E5
#define reg_dcoe_apply_fir_i_pos 0
#define reg_dcoe_apply_fir_i_len 8
#define reg_dcoe_apply_fir_i_lsb 0
#define xd_r_reg_dcoe_apply_fir_q   (*(volatile byte xdata *) 0xF0E6)
#define    r_reg_dcoe_apply_fir_q   0xF0E6
#define reg_dcoe_apply_fir_q_pos 0
#define reg_dcoe_apply_fir_q_len 8
#define reg_dcoe_apply_fir_q_lsb 0
#define xd_p_reg_p_dcrm_force_en    (*(volatile byte xdata *) 0xF0E7)
#define    p_reg_p_dcrm_force_en    0xF0E7
#define reg_p_dcrm_force_en_pos 0
#define reg_p_dcrm_force_en_len 1
#define reg_p_dcrm_force_en_lsb 0
#define xd_p_reg_p_dcrm_force_value_i   (*(volatile byte xdata *) 0xF0E8)
#define    p_reg_p_dcrm_force_value_i   0xF0E8
#define reg_p_dcrm_force_value_i_pos 0
#define reg_p_dcrm_force_value_i_len 8
#define reg_p_dcrm_force_value_i_lsb 0
#define xd_p_reg_p_dcrm_force_value_q   (*(volatile byte xdata *) 0xF0E9)
#define    p_reg_p_dcrm_force_value_q   0xF0E9
#define reg_p_dcrm_force_value_q_pos 0
#define reg_p_dcrm_force_value_q_len 8
#define reg_p_dcrm_force_value_q_lsb 0
#define xd_p_reg_p_iqip_en  (*(volatile byte xdata *) 0xF0EA)
#define    p_reg_p_iqip_en  0xF0EA
#define reg_p_iqip_en_pos 0
#define reg_p_iqip_en_len 1
#define reg_p_iqip_en_lsb 0
#define xd_p_reg_p_iqip_rst (*(volatile byte xdata *) 0xF0EB)
#define    p_reg_p_iqip_rst 0xF0EB
#define reg_p_iqip_rst_pos 0
#define reg_p_iqip_rst_len 1
#define reg_p_iqip_rst_lsb 0
#define xd_p_reg_iqip_mu_ld (*(volatile byte xdata *) 0xF0EC)
#define    p_reg_iqip_mu_ld 0xF0EC
#define reg_iqip_mu_ld_pos 0
#define reg_iqip_mu_ld_len 1
#define reg_iqip_mu_ld_lsb 0
#define xd_p_reg_p_iqip_mu_7_0  (*(volatile byte xdata *) 0xF0ED)
#define    p_reg_p_iqip_mu_7_0  0xF0ED
#define reg_p_iqip_mu_7_0_pos 0
#define reg_p_iqip_mu_7_0_len 8
#define reg_p_iqip_mu_7_0_lsb 0
#define xd_p_reg_p_iqip_mu_11_8 (*(volatile byte xdata *) 0xF0EE)
#define    p_reg_p_iqip_mu_11_8 0xF0EE
#define reg_p_iqip_mu_11_8_pos 0
#define reg_p_iqip_mu_11_8_len 4
#define reg_p_iqip_mu_11_8_lsb 8
#define xd_p_reg_iqip_gs_ld (*(volatile byte xdata *) 0xF0EF)
#define    p_reg_iqip_gs_ld 0xF0EF
#define reg_iqip_gs_ld_pos 0
#define reg_iqip_gs_ld_len 1
#define reg_iqip_gs_ld_lsb 0
#define xd_p_reg_p_iqip_gsnums  (*(volatile byte xdata *) 0xF0F0)
#define    p_reg_p_iqip_gsnums  0xF0F0
#define reg_p_iqip_gsnums_pos 0
#define reg_p_iqip_gsnums_len 4
#define reg_p_iqip_gsnums_lsb 0
#define xd_p_reg_p_iqip_gsites_7_0  (*(volatile byte xdata *) 0xF0F1)
#define    p_reg_p_iqip_gsites_7_0  0xF0F1
#define reg_p_iqip_gsites_7_0_pos 0
#define reg_p_iqip_gsites_7_0_len 8
#define reg_p_iqip_gsites_7_0_lsb 0
#define xd_p_reg_p_iqip_gsites_15_8 (*(volatile byte xdata *) 0xF0F2)
#define    p_reg_p_iqip_gsites_15_8 0xF0F2
#define reg_p_iqip_gsites_15_8_pos 0
#define reg_p_iqip_gsites_15_8_len 8
#define reg_p_iqip_gsites_15_8_lsb 8
#define xd_p_reg_iqip_w_ld  (*(volatile byte xdata *) 0xF0F3)
#define    p_reg_iqip_w_ld  0xF0F3
#define reg_iqip_w_ld_pos 0
#define reg_iqip_w_ld_len 1
#define reg_iqip_w_ld_lsb 0
#define xd_p_reg_p_iqip_w_re_7_0    (*(volatile byte xdata *) 0xF0F4)
#define    p_reg_p_iqip_w_re_7_0    0xF0F4
#define reg_p_iqip_w_re_7_0_pos 0
#define reg_p_iqip_w_re_7_0_len 8
#define reg_p_iqip_w_re_7_0_lsb 0
#define xd_p_reg_p_iqip_w_re_15_8   (*(volatile byte xdata *) 0xF0F5)
#define    p_reg_p_iqip_w_re_15_8   0xF0F5
#define reg_p_iqip_w_re_15_8_pos 0
#define reg_p_iqip_w_re_15_8_len 8
#define reg_p_iqip_w_re_15_8_lsb 8
#define xd_p_reg_p_iqip_w_re_16 (*(volatile byte xdata *) 0xF0F6)
#define    p_reg_p_iqip_w_re_16 0xF0F6
#define reg_p_iqip_w_re_16_pos 0
#define reg_p_iqip_w_re_16_len 1
#define reg_p_iqip_w_re_16_lsb 16
#define xd_p_reg_p_iqip_w_im_7_0    (*(volatile byte xdata *) 0xF0F7)
#define    p_reg_p_iqip_w_im_7_0    0xF0F7
#define reg_p_iqip_w_im_7_0_pos 0
#define reg_p_iqip_w_im_7_0_len 8
#define reg_p_iqip_w_im_7_0_lsb 0
#define xd_p_reg_p_iqip_w_im_15_8   (*(volatile byte xdata *) 0xF0F8)
#define    p_reg_p_iqip_w_im_15_8   0xF0F8
#define reg_p_iqip_w_im_15_8_pos 0
#define reg_p_iqip_w_im_15_8_len 8
#define reg_p_iqip_w_im_15_8_lsb 8
#define xd_p_reg_p_iqip_w_im_16 (*(volatile byte xdata *) 0xF0F9)
#define    p_reg_p_iqip_w_im_16 0xF0F9
#define reg_p_iqip_w_im_16_pos 0
#define reg_p_iqip_w_im_16_len 1
#define reg_p_iqip_w_im_16_lsb 16
#define xd_p_reg_iqip_accnums_rd    (*(volatile byte xdata *) 0xF0FA)
#define    p_reg_iqip_accnums_rd    0xF0FA
#define reg_iqip_accnums_rd_pos 0
#define reg_iqip_accnums_rd_len 1
#define reg_iqip_accnums_rd_lsb 0
#define xd_p_reg_p_iqip_accnums (*(volatile byte xdata *) 0xF0FB)
#define    p_reg_p_iqip_accnums 0xF0FB
#define reg_p_iqip_accnums_pos 0
#define reg_p_iqip_accnums_len 2
#define reg_p_iqip_accnums_lsb 0
#define xd_p_reg_iqip_accnums_rdy   (*(volatile byte xdata *) 0xF0FC)
#define    p_reg_iqip_accnums_rdy   0xF0FC
#define reg_iqip_accnums_rdy_pos 0
#define reg_iqip_accnums_rdy_len 1
#define reg_iqip_accnums_rdy_lsb 0
#define xd_r_reg_r_iqip_wacc_re_7_0 (*(volatile byte xdata *) 0xF0FD)
#define    r_reg_r_iqip_wacc_re_7_0 0xF0FD
#define reg_r_iqip_wacc_re_7_0_pos 0
#define reg_r_iqip_wacc_re_7_0_len 8
#define reg_r_iqip_wacc_re_7_0_lsb 0
#define xd_r_reg_r_iqip_wacc_re_15_8    (*(volatile byte xdata *) 0xF0FE)
#define    r_reg_r_iqip_wacc_re_15_8    0xF0FE
#define reg_r_iqip_wacc_re_15_8_pos 0
#define reg_r_iqip_wacc_re_15_8_len 8
#define reg_r_iqip_wacc_re_15_8_lsb 8
#define xd_r_reg_r_iqip_wacc_re_16  (*(volatile byte xdata *) 0xF0FF)
#define    r_reg_r_iqip_wacc_re_16  0xF0FF
#define reg_r_iqip_wacc_re_16_pos 0
#define reg_r_iqip_wacc_re_16_len 1
#define reg_r_iqip_wacc_re_16_lsb 16
#define xd_r_reg_r_iqip_wacc_im_7_0 (*(volatile byte xdata *) 0xF100)
#define    r_reg_r_iqip_wacc_im_7_0 0xF100
#define reg_r_iqip_wacc_im_7_0_pos 0
#define reg_r_iqip_wacc_im_7_0_len 8
#define reg_r_iqip_wacc_im_7_0_lsb 0
#define xd_r_reg_r_iqip_wacc_im_15_8    (*(volatile byte xdata *) 0xF101)
#define    r_reg_r_iqip_wacc_im_15_8    0xF101
#define reg_r_iqip_wacc_im_15_8_pos 0
#define reg_r_iqip_wacc_im_15_8_len 8
#define reg_r_iqip_wacc_im_15_8_lsb 8
#define xd_r_reg_r_iqip_wacc_im_16  (*(volatile byte xdata *) 0xF102)
#define    r_reg_r_iqip_wacc_im_16  0xF102
#define reg_r_iqip_wacc_im_16_pos 0
#define reg_r_iqip_wacc_im_16_len 1
#define reg_r_iqip_wacc_im_16_lsb 16
#define xd_r_reg_r_iqip_out2cacc_re_7_0 (*(volatile byte xdata *) 0xF103)
#define    r_reg_r_iqip_out2cacc_re_7_0 0xF103
#define reg_r_iqip_out2cacc_re_7_0_pos 0
#define reg_r_iqip_out2cacc_re_7_0_len 8
#define reg_r_iqip_out2cacc_re_7_0_lsb 0
#define xd_r_reg_r_iqip_out2cacc_re_15_8    (*(volatile byte xdata *) 0xF104)
#define    r_reg_r_iqip_out2cacc_re_15_8    0xF104
#define reg_r_iqip_out2cacc_re_15_8_pos 0
#define reg_r_iqip_out2cacc_re_15_8_len 8
#define reg_r_iqip_out2cacc_re_15_8_lsb 8
#define xd_r_reg_r_iqip_out2cacc_re_21_16   (*(volatile byte xdata *) 0xF105)
#define    r_reg_r_iqip_out2cacc_re_21_16   0xF105
#define reg_r_iqip_out2cacc_re_21_16_pos 0
#define reg_r_iqip_out2cacc_re_21_16_len 6
#define reg_r_iqip_out2cacc_re_21_16_lsb 16
#define xd_r_reg_r_iqip_out2cacc_im_7_0 (*(volatile byte xdata *) 0xF106)
#define    r_reg_r_iqip_out2cacc_im_7_0 0xF106
#define reg_r_iqip_out2cacc_im_7_0_pos 0
#define reg_r_iqip_out2cacc_im_7_0_len 8
#define reg_r_iqip_out2cacc_im_7_0_lsb 0
#define xd_r_reg_r_iqip_out2cacc_im_15_8    (*(volatile byte xdata *) 0xF107)
#define    r_reg_r_iqip_out2cacc_im_15_8    0xF107
#define reg_r_iqip_out2cacc_im_15_8_pos 0
#define reg_r_iqip_out2cacc_im_15_8_len 8
#define reg_r_iqip_out2cacc_im_15_8_lsb 8
#define xd_r_reg_r_iqip_out2cacc_im_21_16   (*(volatile byte xdata *) 0xF108)
#define    r_reg_r_iqip_out2cacc_im_21_16   0xF108
#define reg_r_iqip_out2cacc_im_21_16_pos 0
#define reg_r_iqip_out2cacc_im_21_16_len 6
#define reg_r_iqip_out2cacc_im_21_16_lsb 16
#define xd_p_reg_mccid_ccif0_scstrobe   (*(volatile byte xdata *) 0xF109)
#define    p_reg_mccid_ccif0_scstrobe   0xF109
#define reg_mccid_ccif0_scstrobe_pos 0
#define reg_mccid_ccif0_scstrobe_len 7
#define reg_mccid_ccif0_scstrobe_lsb 0
#define xd_p_reg_mccid_cciftrigger  (*(volatile byte xdata *) 0xF10A)
#define    p_reg_mccid_cciftrigger  0xF10A
#define reg_mccid_cciftrigger_pos 0
#define reg_mccid_cciftrigger_len 1
#define reg_mccid_cciftrigger_lsb 0
#define xd_p_reg_mccid_ccif1_scstrobe   (*(volatile byte xdata *) 0xF10B)
#define    p_reg_mccid_ccif1_scstrobe   0xF10B
#define reg_mccid_ccif1_scstrobe_pos 0
#define reg_mccid_ccif1_scstrobe_len 7
#define reg_mccid_ccif1_scstrobe_lsb 0
#define xd_p_reg_mccid_ccif0_fcwccif_7_0    (*(volatile byte xdata *) 0xF10E)
#define    p_reg_mccid_ccif0_fcwccif_7_0    0xF10E
#define reg_mccid_ccif0_fcwccif_7_0_pos 0
#define reg_mccid_ccif0_fcwccif_7_0_len 8
#define reg_mccid_ccif0_fcwccif_7_0_lsb 0
#define xd_p_reg_mccid_ccif0_fcwccif_13_8   (*(volatile byte xdata *) 0xF10F)
#define    p_reg_mccid_ccif0_fcwccif_13_8   0xF10F
#define reg_mccid_ccif0_fcwccif_13_8_pos 0
#define reg_mccid_ccif0_fcwccif_13_8_len 6
#define reg_mccid_ccif0_fcwccif_13_8_lsb 8
#define xd_p_reg_mccid_ccif0_state  (*(volatile byte xdata *) 0xF110)
#define    p_reg_mccid_ccif0_state  0xF110
#define reg_mccid_ccif0_state_pos 0
#define reg_mccid_ccif0_state_len 1
#define reg_mccid_ccif0_state_lsb 0
#define xd_p_reg_mccid_ccif0_acistate   (*(volatile byte xdata *) 0xF111)
#define    p_reg_mccid_ccif0_acistate   0xF111
#define reg_mccid_ccif0_acistate_pos 0
#define reg_mccid_ccif0_acistate_len 1
#define reg_mccid_ccif0_acistate_lsb 0
#define xd_p_reg_mccid_ccif1_fcwccif_7_0    (*(volatile byte xdata *) 0xF112)
#define    p_reg_mccid_ccif1_fcwccif_7_0    0xF112
#define reg_mccid_ccif1_fcwccif_7_0_pos 0
#define reg_mccid_ccif1_fcwccif_7_0_len 8
#define reg_mccid_ccif1_fcwccif_7_0_lsb 0
#define xd_p_reg_mccid_ccif1_fcwccif_13_8   (*(volatile byte xdata *) 0xF113)
#define    p_reg_mccid_ccif1_fcwccif_13_8   0xF113
#define reg_mccid_ccif1_fcwccif_13_8_pos 0
#define reg_mccid_ccif1_fcwccif_13_8_len 6
#define reg_mccid_ccif1_fcwccif_13_8_lsb 8
#define xd_p_reg_mccid_ccif1_state  (*(volatile byte xdata *) 0xF114)
#define    p_reg_mccid_ccif1_state  0xF114
#define reg_mccid_ccif1_state_pos 0
#define reg_mccid_ccif1_state_len 1
#define reg_mccid_ccif1_state_lsb 0
#define xd_p_reg_mccid_ccif1_acistate   (*(volatile byte xdata *) 0xF115)
#define    p_reg_mccid_ccif1_acistate   0xF115
#define reg_mccid_ccif1_acistate_pos 0
#define reg_mccid_ccif1_acistate_len 1
#define reg_mccid_ccif1_acistate_lsb 0
#define xd_r_reg_r_acif_saturate    (*(volatile byte xdata *) 0xF117)
#define    r_reg_r_acif_saturate    0xF117
#define reg_r_acif_saturate_pos 0
#define reg_r_acif_saturate_len 8
#define reg_r_acif_saturate_lsb 0
#define xd_p_reg_tmr_timer0_threshold_7_0   (*(volatile byte xdata *) 0xF118)
#define    p_reg_tmr_timer0_threshold_7_0   0xF118
#define reg_tmr_timer0_threshold_7_0_pos 0
#define reg_tmr_timer0_threshold_7_0_len 8
#define reg_tmr_timer0_threshold_7_0_lsb 0
#define xd_p_reg_tmr_timer0_threshold_15_8  (*(volatile byte xdata *) 0xF119)
#define    p_reg_tmr_timer0_threshold_15_8  0xF119
#define reg_tmr_timer0_threshold_15_8_pos 0
#define reg_tmr_timer0_threshold_15_8_len 8
#define reg_tmr_timer0_threshold_15_8_lsb 8
#define xd_p_reg_tmr_timer0_enable  (*(volatile byte xdata *) 0xF11A)
#define    p_reg_tmr_timer0_enable  0xF11A
#define reg_tmr_timer0_enable_pos 0
#define reg_tmr_timer0_enable_len 1
#define reg_tmr_timer0_enable_lsb 0
#define xd_p_reg_tmr_timer0_clk_sel (*(volatile byte xdata *) 0xF11B)
#define    p_reg_tmr_timer0_clk_sel 0xF11B
#define reg_tmr_timer0_clk_sel_pos 0
#define reg_tmr_timer0_clk_sel_len 1
#define reg_tmr_timer0_clk_sel_lsb 0
#define xd_p_reg_tmr_timer0_int (*(volatile byte xdata *) 0xF11C)
#define    p_reg_tmr_timer0_int 0xF11C
#define reg_tmr_timer0_int_pos 0
#define reg_tmr_timer0_int_len 1
#define reg_tmr_timer0_int_lsb 0
#define xd_p_reg_tmr_timer0_rst (*(volatile byte xdata *) 0xF11D)
#define    p_reg_tmr_timer0_rst 0xF11D
#define reg_tmr_timer0_rst_pos 0
#define reg_tmr_timer0_rst_len 1
#define reg_tmr_timer0_rst_lsb 0
#define xd_r_reg_tmr_timer0_count_7_0   (*(volatile byte xdata *) 0xF11E)
#define    r_reg_tmr_timer0_count_7_0   0xF11E
#define reg_tmr_timer0_count_7_0_pos 0
#define reg_tmr_timer0_count_7_0_len 8
#define reg_tmr_timer0_count_7_0_lsb 0
#define xd_r_reg_tmr_timer0_count_15_8  (*(volatile byte xdata *) 0xF11F)
#define    r_reg_tmr_timer0_count_15_8  0xF11F
#define reg_tmr_timer0_count_15_8_pos 0
#define reg_tmr_timer0_count_15_8_len 8
#define reg_tmr_timer0_count_15_8_lsb 8
#define xd_p_reg_suspend    (*(volatile byte xdata *) 0xF120)
#define    p_reg_suspend    0xF120
#define reg_suspend_pos 0
#define reg_suspend_len 1
#define reg_suspend_lsb 0
#define xd_p_reg_suspend_rdy    (*(volatile byte xdata *) 0xF121)
#define    p_reg_suspend_rdy    0xF121
#define reg_suspend_rdy_pos 0
#define reg_suspend_rdy_len 1
#define reg_suspend_rdy_lsb 0
#define xd_p_reg_resume (*(volatile byte xdata *) 0xF122)
#define    p_reg_resume 0xF122
#define reg_resume_pos 0
#define reg_resume_len 1
#define reg_resume_lsb 0
#define xd_p_reg_resume_rdy (*(volatile byte xdata *) 0xF123)
#define    p_reg_resume_rdy 0xF123
#define reg_resume_rdy_pos 0
#define reg_resume_rdy_len 1
#define reg_resume_rdy_lsb 0
#define xd_p_reg_gp_trigger (*(volatile byte xdata *) 0xF124)
#define    p_reg_gp_trigger 0xF124
#define reg_gp_trigger_pos 0
#define reg_gp_trigger_len 1
#define reg_gp_trigger_lsb 0
#define xd_p_reg_trigger_sel    (*(volatile byte xdata *) 0xF125)
#define    p_reg_trigger_sel    0xF125
#define reg_trigger_sel_pos 0
#define reg_trigger_sel_len 2
#define reg_trigger_sel_lsb 0
#define xd_p_reg_debug_ofdm (*(volatile byte xdata *) 0xF126)
#define    p_reg_debug_ofdm 0xF126
#define reg_debug_ofdm_pos 0
#define reg_debug_ofdm_len 2
#define reg_debug_ofdm_lsb 0
#define xd_p_reg_trigger_module_sel (*(volatile byte xdata *) 0xF127)
#define    p_reg_trigger_module_sel 0xF127
#define reg_trigger_module_sel_pos 0
#define reg_trigger_module_sel_len 6
#define reg_trigger_module_sel_lsb 0
#define xd_p_reg_trigger_set_sel    (*(volatile byte xdata *) 0xF128)
#define    p_reg_trigger_set_sel    0xF128
#define reg_trigger_set_sel_pos 0
#define reg_trigger_set_sel_len 6
#define reg_trigger_set_sel_lsb 0
#define xd_p_reg_fw_int_mask_n  (*(volatile byte xdata *) 0xF129)
#define    p_reg_fw_int_mask_n  0xF129
#define reg_fw_int_mask_n_pos 0
#define reg_fw_int_mask_n_len 1
#define reg_fw_int_mask_n_lsb 0
#define xd_p_reg_dioif_rst  (*(volatile byte xdata *) 0xF12A)
#define    p_reg_dioif_rst  0xF12A
#define reg_dioif_rst_pos 0
#define reg_dioif_rst_len 1
#define reg_dioif_rst_lsb 0
#define xd_p_reg_debug_group    (*(volatile byte xdata *) 0xF12B)
#define    p_reg_debug_group    0xF12B
#define reg_debug_group_pos 0
#define reg_debug_group_len 4
#define reg_debug_group_lsb 0
#define xd_p_reg_odbg_clk_sel   (*(volatile byte xdata *) 0xF12C)
#define    p_reg_odbg_clk_sel   0xF12C
#define reg_odbg_clk_sel_pos 0
#define reg_odbg_clk_sel_len 3
#define reg_odbg_clk_sel_lsb 0
#define xd_p_reg_p_ccif_shift_fre   (*(volatile byte xdata *) 0xF12F)
#define    p_reg_p_ccif_shift_fre   0xF12F
#define reg_p_ccif_shift_fre_pos 0
#define reg_p_ccif_shift_fre_len 1
#define reg_p_ccif_shift_fre_lsb 0
#define xd_p_reg_p_ccif_bandwidth_factor    (*(volatile byte xdata *) 0xF130)
#define    p_reg_p_ccif_bandwidth_factor    0xF130
#define reg_p_ccif_bandwidth_factor_pos 0
#define reg_p_ccif_bandwidth_factor_len 3
#define reg_p_ccif_bandwidth_factor_lsb 0
#define xd_p_reg_ccif_rst   (*(volatile byte xdata *) 0xF131)
#define    p_reg_ccif_rst   0xF131
#define reg_ccif_rst_pos 0
#define reg_ccif_rst_len 1
#define reg_ccif_rst_lsb 0
#define xd_p_reg_p_ccif_min_bandwidth   (*(volatile byte xdata *) 0xF132)
#define    p_reg_p_ccif_min_bandwidth   0xF132
#define reg_p_ccif_min_bandwidth_pos 0
#define reg_p_ccif_min_bandwidth_len 7
#define reg_p_ccif_min_bandwidth_lsb 0
#define xd_p_reg_ccif_bq0_state (*(volatile byte xdata *) 0xF133)
#define    p_reg_ccif_bq0_state 0xF133
#define reg_ccif_bq0_state_pos 0
#define reg_ccif_bq0_state_len 1
#define reg_ccif_bq0_state_lsb 0
#define xd_p_reg_ccif_bq0_outputscaling (*(volatile byte xdata *) 0xF134)
#define    p_reg_ccif_bq0_outputscaling 0xF134
#define reg_ccif_bq0_outputscaling_pos 0
#define reg_ccif_bq0_outputscaling_len 5
#define reg_ccif_bq0_outputscaling_lsb 0
#define xd_p_reg_ccif_bq1_state (*(volatile byte xdata *) 0xF135)
#define    p_reg_ccif_bq1_state 0xF135
#define reg_ccif_bq1_state_pos 0
#define reg_ccif_bq1_state_len 1
#define reg_ccif_bq1_state_lsb 0
#define xd_p_reg_ccif_bq1_outputscaling (*(volatile byte xdata *) 0xF136)
#define    p_reg_ccif_bq1_outputscaling 0xF136
#define reg_ccif_bq1_outputscaling_pos 0
#define reg_ccif_bq1_outputscaling_len 5
#define reg_ccif_bq1_outputscaling_lsb 0
#define xd_p_reg_ccif_bq0_a1_7_0    (*(volatile byte xdata *) 0xF137)
#define    p_reg_ccif_bq0_a1_7_0    0xF137
#define reg_ccif_bq0_a1_7_0_pos 0
#define reg_ccif_bq0_a1_7_0_len 8
#define reg_ccif_bq0_a1_7_0_lsb 0
#define xd_p_reg_ccif_bq0_a1_13_8   (*(volatile byte xdata *) 0xF138)
#define    p_reg_ccif_bq0_a1_13_8   0xF138
#define reg_ccif_bq0_a1_13_8_pos 0
#define reg_ccif_bq0_a1_13_8_len 6
#define reg_ccif_bq0_a1_13_8_lsb 8
#define xd_p_reg_ccif_bq1_a1_7_0    (*(volatile byte xdata *) 0xF139)
#define    p_reg_ccif_bq1_a1_7_0    0xF139
#define reg_ccif_bq1_a1_7_0_pos 0
#define reg_ccif_bq1_a1_7_0_len 8
#define reg_ccif_bq1_a1_7_0_lsb 0
#define xd_p_reg_ccif_bq1_a1_13_8   (*(volatile byte xdata *) 0xF13A)
#define    p_reg_ccif_bq1_a1_13_8   0xF13A
#define reg_ccif_bq1_a1_13_8_pos 0
#define reg_ccif_bq1_a1_13_8_len 6
#define reg_ccif_bq1_a1_13_8_lsb 8
#define xd_p_reg_ccif_bq0_b1_7_0    (*(volatile byte xdata *) 0xF13B)
#define    p_reg_ccif_bq0_b1_7_0    0xF13B
#define reg_ccif_bq0_b1_7_0_pos 0
#define reg_ccif_bq0_b1_7_0_len 8
#define reg_ccif_bq0_b1_7_0_lsb 0
#define xd_p_reg_ccif_bq0_b1_13_8   (*(volatile byte xdata *) 0xF13C)
#define    p_reg_ccif_bq0_b1_13_8   0xF13C
#define reg_ccif_bq0_b1_13_8_pos 0
#define reg_ccif_bq0_b1_13_8_len 6
#define reg_ccif_bq0_b1_13_8_lsb 8
#define xd_p_reg_ccif_bq1_b1_7_0    (*(volatile byte xdata *) 0xF13D)
#define    p_reg_ccif_bq1_b1_7_0    0xF13D
#define reg_ccif_bq1_b1_7_0_pos 0
#define reg_ccif_bq1_b1_7_0_len 8
#define reg_ccif_bq1_b1_7_0_lsb 0
#define xd_p_reg_ccif_bq1_b1_13_8   (*(volatile byte xdata *) 0xF13E)
#define    p_reg_ccif_bq1_b1_13_8   0xF13E
#define reg_ccif_bq1_b1_13_8_pos 0
#define reg_ccif_bq1_b1_13_8_len 6
#define reg_ccif_bq1_b1_13_8_lsb 8
#define xd_p_reg_ccif_bq0_b2_7_0    (*(volatile byte xdata *) 0xF13F)
#define    p_reg_ccif_bq0_b2_7_0    0xF13F
#define reg_ccif_bq0_b2_7_0_pos 0
#define reg_ccif_bq0_b2_7_0_len 8
#define reg_ccif_bq0_b2_7_0_lsb 0
#define xd_p_reg_ccif_bq0_b2_13_8   (*(volatile byte xdata *) 0xF140)
#define    p_reg_ccif_bq0_b2_13_8   0xF140
#define reg_ccif_bq0_b2_13_8_pos 0
#define reg_ccif_bq0_b2_13_8_len 6
#define reg_ccif_bq0_b2_13_8_lsb 8
#define xd_p_reg_ccif_bq1_b2_7_0    (*(volatile byte xdata *) 0xF141)
#define    p_reg_ccif_bq1_b2_7_0    0xF141
#define reg_ccif_bq1_b2_7_0_pos 0
#define reg_ccif_bq1_b2_7_0_len 8
#define reg_ccif_bq1_b2_7_0_lsb 0
#define xd_p_reg_ccif_bq1_b2_13_8   (*(volatile byte xdata *) 0xF142)
#define    p_reg_ccif_bq1_b2_13_8   0xF142
#define reg_ccif_bq1_b2_13_8_pos 0
#define reg_ccif_bq1_b2_13_8_len 6
#define reg_ccif_bq1_b2_13_8_lsb 8
#define xd_p_reg_ccif_debug_rst (*(volatile byte xdata *) 0xF143)
#define    p_reg_ccif_debug_rst 0xF143
#define reg_ccif_debug_rst_pos 0
#define reg_ccif_debug_rst_len 1
#define reg_ccif_debug_rst_lsb 0
#define xd_p_reg_mccid_defaultccifscstrobe  (*(volatile byte xdata *) 0xF144)
#define    p_reg_mccid_defaultccifscstrobe  0xF144
#define reg_mccid_defaultccifscstrobe_pos 0
#define reg_mccid_defaultccifscstrobe_len 7
#define reg_mccid_defaultccifscstrobe_lsb 0
#define xd_p_reg_mccid_monitoringaci    (*(volatile byte xdata *) 0xF145)
#define    p_reg_mccid_monitoringaci    0xF145
#define reg_mccid_monitoringaci_pos 0
#define reg_mccid_monitoringaci_len 1
#define reg_mccid_monitoringaci_lsb 0
#define xd_p_reg_mccid_ispassmode   (*(volatile byte xdata *) 0xF146)
#define    p_reg_mccid_ispassmode   0xF146
#define reg_mccid_ispassmode_pos 0
#define reg_mccid_ispassmode_len 1
#define reg_mccid_ispassmode_lsb 0
#define xd_p_reg_mccid_issteadystatemode    (*(volatile byte xdata *) 0xF147)
#define    p_reg_mccid_issteadystatemode    0xF147
#define reg_mccid_issteadystatemode_pos 0
#define reg_mccid_issteadystatemode_len 1
#define reg_mccid_issteadystatemode_lsb 0
#define xd_p_reg_mccid_fixedgaincmp (*(volatile byte xdata *) 0xF148)
#define    p_reg_mccid_fixedgaincmp 0xF148
#define reg_mccid_fixedgaincmp_pos 0
#define reg_mccid_fixedgaincmp_len 1
#define reg_mccid_fixedgaincmp_lsb 0
#define xd_p_reg_mccid_misscounter_reset    (*(volatile byte xdata *) 0xF149)
#define    p_reg_mccid_misscounter_reset    0xF149
#define reg_mccid_misscounter_reset_pos 0
#define reg_mccid_misscounter_reset_len 1
#define reg_mccid_misscounter_reset_lsb 0
#define xd_p_reg_mccid_acwgcheckcciexist    (*(volatile byte xdata *) 0xF14A)
#define    p_reg_mccid_acwgcheckcciexist    0xF14A
#define reg_mccid_acwgcheckcciexist_pos 0
#define reg_mccid_acwgcheckcciexist_len 1
#define reg_mccid_acwgcheckcciexist_lsb 0
#define xd_p_reg_mccid_acidone  (*(volatile byte xdata *) 0xF14B)
#define    p_reg_mccid_acidone  0xF14B
#define reg_mccid_acidone_pos 0
#define reg_mccid_acidone_len 1
#define reg_mccid_acidone_lsb 0
#define xd_p_reg_mccid_sxdesiredpower_7_0   (*(volatile byte xdata *) 0xF14C)
#define    p_reg_mccid_sxdesiredpower_7_0   0xF14C
#define reg_mccid_sxdesiredpower_7_0_pos 0
#define reg_mccid_sxdesiredpower_7_0_len 8
#define reg_mccid_sxdesiredpower_7_0_lsb 0
#define xd_p_reg_mccid_sxdesiredpower_9_8   (*(volatile byte xdata *) 0xF14D)
#define    p_reg_mccid_sxdesiredpower_9_8   0xF14D
#define reg_mccid_sxdesiredpower_9_8_pos 0
#define reg_mccid_sxdesiredpower_9_8_len 2
#define reg_mccid_sxdesiredpower_9_8_lsb 8
#define xd_p_reg_mccid_defaultccitimertriggerno (*(volatile byte xdata *) 0xF14E)
#define    p_reg_mccid_defaultccitimertriggerno 0xF14E
#define reg_mccid_defaultccitimertriggerno_pos 0
#define reg_mccid_defaultccitimertriggerno_len 8
#define reg_mccid_defaultccitimertriggerno_lsb 0
#define xd_p_reg_mccid_detectedmaxtonecountshift    (*(volatile byte xdata *) 0xF14F)
#define    p_reg_mccid_detectedmaxtonecountshift    0xF14F
#define reg_mccid_detectedmaxtonecountshift_pos 0
#define reg_mccid_detectedmaxtonecountshift_len 3
#define reg_mccid_detectedmaxtonecountshift_lsb 0
#define xd_p_reg_mccid_moveffttoccif_en (*(volatile byte xdata *) 0xF151)
#define    p_reg_mccid_moveffttoccif_en 0xF151
#define reg_mccid_moveffttoccif_en_pos 0
#define reg_mccid_moveffttoccif_en_len 1
#define reg_mccid_moveffttoccif_en_lsb 0
#define xd_p_reg_mccid_fftindextobfsfcwfactor_7_0   (*(volatile byte xdata *) 0xF152)
#define    p_reg_mccid_fftindextobfsfcwfactor_7_0   0xF152
#define reg_mccid_fftindextobfsfcwfactor_7_0_pos 0
#define reg_mccid_fftindextobfsfcwfactor_7_0_len 8
#define reg_mccid_fftindextobfsfcwfactor_7_0_lsb 0
#define xd_p_reg_mccid_fftindextobfsfcwfactor_9_8   (*(volatile byte xdata *) 0xF153)
#define    p_reg_mccid_fftindextobfsfcwfactor_9_8   0xF153
#define reg_mccid_fftindextobfsfcwfactor_9_8_pos 0
#define reg_mccid_fftindextobfsfcwfactor_9_8_len 2
#define reg_mccid_fftindextobfsfcwfactor_9_8_lsb 8
#define xd_p_reg_mccid_bfsfcwffttoindexfactor_7_0   (*(volatile byte xdata *) 0xF154)
#define    p_reg_mccid_bfsfcwffttoindexfactor_7_0   0xF154
#define reg_mccid_bfsfcwffttoindexfactor_7_0_pos 0
#define reg_mccid_bfsfcwffttoindexfactor_7_0_len 8
#define reg_mccid_bfsfcwffttoindexfactor_7_0_lsb 0
#define xd_p_reg_mccid_bfsfcwffttoindexfactor_10_8  (*(volatile byte xdata *) 0xF155)
#define    p_reg_mccid_bfsfcwffttoindexfactor_10_8  0xF155
#define reg_mccid_bfsfcwffttoindexfactor_10_8_pos 0
#define reg_mccid_bfsfcwffttoindexfactor_10_8_len 3
#define reg_mccid_bfsfcwffttoindexfactor_10_8_lsb 8
#define xd_p_reg_mccid_detectedaci  (*(volatile byte xdata *) 0xF156)
#define    p_reg_mccid_detectedaci  0xF156
#define reg_mccid_detectedaci_pos 0
#define reg_mccid_detectedaci_len 1
#define reg_mccid_detectedaci_lsb 0
#define xd_r_reg_mccid_filter_enable    (*(volatile byte xdata *) 0xF157)
#define    r_reg_mccid_filter_enable    0xF157
#define reg_mccid_filter_enable_pos 0
#define reg_mccid_filter_enable_len 1
#define reg_mccid_filter_enable_lsb 0
#define xd_p_reg_mccid_aciscstrobe  (*(volatile byte xdata *) 0xF158)
#define    p_reg_mccid_aciscstrobe  0xF158
#define reg_mccid_aciscstrobe_pos 0
#define reg_mccid_aciscstrobe_len 7
#define reg_mccid_aciscstrobe_lsb 0
#define xd_p_reg_mccid_scanningaci  (*(volatile byte xdata *) 0xF159)
#define    p_reg_mccid_scanningaci  0xF159
#define reg_mccid_scanningaci_pos 0
#define reg_mccid_scanningaci_len 1
#define reg_mccid_scanningaci_lsb 0
#define xd_p_reg_mccid_windowsizeacciwdcount_7_0    (*(volatile byte xdata *) 0xF15A)
#define    p_reg_mccid_windowsizeacciwdcount_7_0    0xF15A
#define reg_mccid_windowsizeacciwdcount_7_0_pos 0
#define reg_mccid_windowsizeacciwdcount_7_0_len 8
#define reg_mccid_windowsizeacciwdcount_7_0_lsb 0
#define xd_p_reg_mccid_windowsizeacciwdcount_12_8   (*(volatile byte xdata *) 0xF15B)
#define    p_reg_mccid_windowsizeacciwdcount_12_8   0xF15B
#define reg_mccid_windowsizeacciwdcount_12_8_pos 0
#define reg_mccid_windowsizeacciwdcount_12_8_len 5
#define reg_mccid_windowsizeacciwdcount_12_8_lsb 8
#define xd_p_reg_mccid_scannedacionly   (*(volatile byte xdata *) 0xF15C)
#define    p_reg_mccid_scannedacionly   0xF15C
#define reg_mccid_scannedacionly_pos 0
#define reg_mccid_scannedacionly_len 1
#define reg_mccid_scannedacionly_lsb 0
#define xd_p_reg_mccid_scfactor (*(volatile byte xdata *) 0xF15D)
#define    p_reg_mccid_scfactor 0xF15D
#define reg_mccid_scfactor_pos 0
#define reg_mccid_scfactor_len 5
#define reg_mccid_scfactor_lsb 0
#define xd_p_reg_mccid_defaultevaluatingbandwidthfactor (*(volatile byte xdata *) 0xF15E)
#define    p_reg_mccid_defaultevaluatingbandwidthfactor 0xF15E
#define reg_mccid_defaultevaluatingbandwidthfactor_pos 0
#define reg_mccid_defaultevaluatingbandwidthfactor_len 3
#define reg_mccid_defaultevaluatingbandwidthfactor_lsb 0
#define xd_p_reg_mccid_defaultacipowerlevel (*(volatile byte xdata *) 0xF15F)
#define    p_reg_mccid_defaultacipowerlevel 0xF15F
#define reg_mccid_defaultacipowerlevel_pos 0
#define reg_mccid_defaultacipowerlevel_len 3
#define reg_mccid_defaultacipowerlevel_lsb 0
#define xd_r_reg_mccid_outputdagc1gain_7_0  (*(volatile byte xdata *) 0xF160)
#define    r_reg_mccid_outputdagc1gain_7_0  0xF160
#define reg_mccid_outputdagc1gain_7_0_pos 0
#define reg_mccid_outputdagc1gain_7_0_len 8
#define reg_mccid_outputdagc1gain_7_0_lsb 0
#define xd_r_reg_mccid_outputdagc1gain_9_8  (*(volatile byte xdata *) 0xF161)
#define    r_reg_mccid_outputdagc1gain_9_8  0xF161
#define reg_mccid_outputdagc1gain_9_8_pos 0
#define reg_mccid_outputdagc1gain_9_8_len 2
#define reg_mccid_outputdagc1gain_9_8_lsb 8
#define xd_r_reg_mccid_outputdagc1gainshift (*(volatile byte xdata *) 0xF162)
#define    r_reg_mccid_outputdagc1gainshift 0xF162
#define reg_mccid_outputdagc1gainshift_pos 0
#define reg_mccid_outputdagc1gainshift_len 4
#define reg_mccid_outputdagc1gainshift_lsb 0
#define xd_p_reg_mccid_defaultacwgcheckccipowerlevel    (*(volatile byte xdata *) 0xF163)
#define    p_reg_mccid_defaultacwgcheckccipowerlevel    0xF163
#define reg_mccid_defaultacwgcheckccipowerlevel_pos 0
#define reg_mccid_defaultacwgcheckccipowerlevel_len 3
#define reg_mccid_defaultacwgcheckccipowerlevel_lsb 0
#define xd_p_reg_mccid_ccipowerlevelfactor  (*(volatile byte xdata *) 0xF166)
#define    p_reg_mccid_ccipowerlevelfactor  0xF166
#define reg_mccid_ccipowerlevelfactor_pos 0
#define reg_mccid_ccipowerlevelfactor_len 3
#define reg_mccid_ccipowerlevelfactor_lsb 0
#define xd_p_reg_mccid_scstrobesearchingrange   (*(volatile byte xdata *) 0xF167)
#define    p_reg_mccid_scstrobesearchingrange   0xF167
#define reg_mccid_scstrobesearchingrange_pos 0
#define reg_mccid_scstrobesearchingrange_len 8
#define reg_mccid_scstrobesearchingrange_lsb 0
#define xd_p_reg_mccid_searchingno  (*(volatile byte xdata *) 0xF168)
#define    p_reg_mccid_searchingno  0xF168
#define reg_mccid_searchingno_pos 0
#define reg_mccid_searchingno_len 6
#define reg_mccid_searchingno_lsb 0
#define xd_p_reg_mccid_scannedacifrequencyresolution    (*(volatile byte xdata *) 0xF169)
#define    p_reg_mccid_scannedacifrequencyresolution    0xF169
#define reg_mccid_scannedacifrequencyresolution_pos 0
#define reg_mccid_scannedacifrequencyresolution_len 4
#define reg_mccid_scannedacifrequencyresolution_lsb 0
#define xd_p_reg_mccid_fft0_maskmaxtoneindex_7_0    (*(volatile byte xdata *) 0xF16A)
#define    p_reg_mccid_fft0_maskmaxtoneindex_7_0    0xF16A
#define reg_mccid_fft0_maskmaxtoneindex_7_0_pos 0
#define reg_mccid_fft0_maskmaxtoneindex_7_0_len 8
#define reg_mccid_fft0_maskmaxtoneindex_7_0_lsb 0
#define xd_p_reg_mccid_fft0_maskmaxtoneindex_12_8   (*(volatile byte xdata *) 0xF16B)
#define    p_reg_mccid_fft0_maskmaxtoneindex_12_8   0xF16B
#define reg_mccid_fft0_maskmaxtoneindex_12_8_pos 0
#define reg_mccid_fft0_maskmaxtoneindex_12_8_len 5
#define reg_mccid_fft0_maskmaxtoneindex_12_8_lsb 8
#define xd_p_reg_mccid_fft0_state   (*(volatile byte xdata *) 0xF16C)
#define    p_reg_mccid_fft0_state   0xF16C
#define reg_mccid_fft0_state_pos 0
#define reg_mccid_fft0_state_len 1
#define reg_mccid_fft0_state_lsb 0
#define xd_p_reg_mccid_fft1_state   (*(volatile byte xdata *) 0xF16D)
#define    p_reg_mccid_fft1_state   0xF16D
#define reg_mccid_fft1_state_pos 0
#define reg_mccid_fft1_state_len 1
#define reg_mccid_fft1_state_lsb 0
#define xd_p_reg_mccid_fft0_maskmintoneindex_7_0    (*(volatile byte xdata *) 0xF16E)
#define    p_reg_mccid_fft0_maskmintoneindex_7_0    0xF16E
#define reg_mccid_fft0_maskmintoneindex_7_0_pos 0
#define reg_mccid_fft0_maskmintoneindex_7_0_len 8
#define reg_mccid_fft0_maskmintoneindex_7_0_lsb 0
#define xd_p_reg_mccid_fft0_maskmintoneindex_12_8   (*(volatile byte xdata *) 0xF16F)
#define    p_reg_mccid_fft0_maskmintoneindex_12_8   0xF16F
#define reg_mccid_fft0_maskmintoneindex_12_8_pos 0
#define reg_mccid_fft0_maskmintoneindex_12_8_len 5
#define reg_mccid_fft0_maskmintoneindex_12_8_lsb 8
#define xd_p_reg_mccid_acipowerlevelfactor  (*(volatile byte xdata *) 0xF170)
#define    p_reg_mccid_acipowerlevelfactor  0xF170
#define reg_mccid_acipowerlevelfactor_pos 0
#define reg_mccid_acipowerlevelfactor_len 3
#define reg_mccid_acipowerlevelfactor_lsb 0
#define xd_p_reg_mccid_fft1_maskmaxtoneindex_7_0    (*(volatile byte xdata *) 0xF171)
#define    p_reg_mccid_fft1_maskmaxtoneindex_7_0    0xF171
#define reg_mccid_fft1_maskmaxtoneindex_7_0_pos 0
#define reg_mccid_fft1_maskmaxtoneindex_7_0_len 8
#define reg_mccid_fft1_maskmaxtoneindex_7_0_lsb 0
#define xd_p_reg_mccid_fft1_maskmaxtoneindex_12_8   (*(volatile byte xdata *) 0xF172)
#define    p_reg_mccid_fft1_maskmaxtoneindex_12_8   0xF172
#define reg_mccid_fft1_maskmaxtoneindex_12_8_pos 0
#define reg_mccid_fft1_maskmaxtoneindex_12_8_len 5
#define reg_mccid_fft1_maskmaxtoneindex_12_8_lsb 8
#define xd_p_reg_mccid_fft1_maskmintoneindex_7_0    (*(volatile byte xdata *) 0xF173)
#define    p_reg_mccid_fft1_maskmintoneindex_7_0    0xF173
#define reg_mccid_fft1_maskmintoneindex_7_0_pos 0
#define reg_mccid_fft1_maskmintoneindex_7_0_len 8
#define reg_mccid_fft1_maskmintoneindex_7_0_lsb 0
#define xd_p_reg_mccid_fft1_maskmintoneindex_12_8   (*(volatile byte xdata *) 0xF174)
#define    p_reg_mccid_fft1_maskmintoneindex_12_8   0xF174
#define reg_mccid_fft1_maskmintoneindex_12_8_pos 0
#define reg_mccid_fft1_maskmintoneindex_12_8_len 5
#define reg_mccid_fft1_maskmintoneindex_12_8_lsb 8
#define xd_p_reg_mccid_reset    (*(volatile byte xdata *) 0xF175)
#define    p_reg_mccid_reset    0xF175
#define reg_mccid_reset_pos 0
#define reg_mccid_reset_len 1
#define reg_mccid_reset_lsb 0
#define xd_p_reg_mccid_gaincmpreset (*(volatile byte xdata *) 0xF176)
#define    p_reg_mccid_gaincmpreset 0xF176
#define reg_mccid_gaincmpreset_pos 0
#define reg_mccid_gaincmpreset_len 1
#define reg_mccid_gaincmpreset_lsb 0
#define xd_p_reg_mccid_acwgreset    (*(volatile byte xdata *) 0xF177)
#define    p_reg_mccid_acwgreset    0xF177
#define reg_mccid_acwgreset_pos 0
#define reg_mccid_acwgreset_len 1
#define reg_mccid_acwgreset_lsb 0
#define xd_p_reg_mccid_ccif0_ofsmstateenable    (*(volatile byte xdata *) 0xF178)
#define    p_reg_mccid_ccif0_ofsmstateenable    0xF178
#define reg_mccid_ccif0_ofsmstateenable_pos 0
#define reg_mccid_ccif0_ofsmstateenable_len 1
#define reg_mccid_ccif0_ofsmstateenable_lsb 0
#define xd_p_reg_mccid_ccif1_ofsmstateenable    (*(volatile byte xdata *) 0xF179)
#define    p_reg_mccid_ccif1_ofsmstateenable    0xF179
#define reg_mccid_ccif1_ofsmstateenable_pos 0
#define reg_mccid_ccif1_ofsmstateenable_len 1
#define reg_mccid_ccif1_ofsmstateenable_lsb 0
#define xd_p_reg_mccid_fft0_ofsmstateenable (*(volatile byte xdata *) 0xF17A)
#define    p_reg_mccid_fft0_ofsmstateenable 0xF17A
#define reg_mccid_fft0_ofsmstateenable_pos 0
#define reg_mccid_fft0_ofsmstateenable_len 1
#define reg_mccid_fft0_ofsmstateenable_lsb 0
#define xd_p_reg_mccid_fft1_ofsmstateenable (*(volatile byte xdata *) 0xF17B)
#define    p_reg_mccid_fft1_ofsmstateenable 0xF17B
#define reg_mccid_fft1_ofsmstateenable_pos 0
#define reg_mccid_fft1_ofsmstateenable_len 1
#define reg_mccid_fft1_ofsmstateenable_lsb 0
#define xd_p_reg_mccid_fftfiltermaskchange  (*(volatile byte xdata *) 0xF17C)
#define    p_reg_mccid_fftfiltermaskchange  0xF17C
#define reg_mccid_fftfiltermaskchange_pos 0
#define reg_mccid_fftfiltermaskchange_len 1
#define reg_mccid_fftfiltermaskchange_lsb 0
#define xd_r_reg_mccid_maxacipowertone_7_0  (*(volatile byte xdata *) 0xF17D)
#define    r_reg_mccid_maxacipowertone_7_0  0xF17D
#define reg_mccid_maxacipowertone_7_0_pos 0
#define reg_mccid_maxacipowertone_7_0_len 8
#define reg_mccid_maxacipowertone_7_0_lsb 0
#define xd_r_reg_mccid_maxacipowertone_12_8 (*(volatile byte xdata *) 0xF17E)
#define    r_reg_mccid_maxacipowertone_12_8 0xF17E
#define reg_mccid_maxacipowertone_12_8_pos 0
#define reg_mccid_maxacipowertone_12_8_len 5
#define reg_mccid_maxacipowertone_12_8_lsb 8
#define xd_r_reg_mccid_ccidisappear (*(volatile byte xdata *) 0xF17F)
#define    r_reg_mccid_ccidisappear 0xF17F
#define reg_mccid_ccidisappear_pos 0
#define reg_mccid_ccidisappear_len 1
#define reg_mccid_ccidisappear_lsb 0
#define xd_r_reg_mccid_ccilocatordone   (*(volatile byte xdata *) 0xF182)
#define    r_reg_mccid_ccilocatordone   0xF182
#define reg_mccid_ccilocatordone_pos 0
#define reg_mccid_ccilocatordone_len 1
#define reg_mccid_ccilocatordone_lsb 0
#define xd_p_reg_mccid_enablecciftrigger    (*(volatile byte xdata *) 0xF183)
#define    p_reg_mccid_enablecciftrigger    0xF183
#define reg_mccid_enablecciftrigger_pos 0
#define reg_mccid_enablecciftrigger_len 1
#define reg_mccid_enablecciftrigger_lsb 0
#define xd_p_reg_mccid_disableacwglaunchevaluationbandwidthtrigger  (*(volatile byte xdata *) 0xF184)
#define    p_reg_mccid_disableacwglaunchevaluationbandwidthtrigger  0xF184
#define reg_mccid_disableacwglaunchevaluationbandwidthtrigger_pos 0
#define reg_mccid_disableacwglaunchevaluationbandwidthtrigger_len 1
#define reg_mccid_disableacwglaunchevaluationbandwidthtrigger_lsb 0
#define xd_p_reg_mccid_control_by_ofsm  (*(volatile byte xdata *) 0xF185)
#define    p_reg_mccid_control_by_ofsm  0xF185
#define reg_mccid_control_by_ofsm_pos 0
#define reg_mccid_control_by_ofsm_len 1
#define reg_mccid_control_by_ofsm_lsb 0
#define xd_p_reg_mccid_ofsmcontrolccilocator    (*(volatile byte xdata *) 0xF186)
#define    p_reg_mccid_ofsmcontrolccilocator    0xF186
#define reg_mccid_ofsmcontrolccilocator_pos 0
#define reg_mccid_ofsmcontrolccilocator_len 1
#define reg_mccid_ofsmcontrolccilocator_lsb 0
#define xd_p_reg_mccid_disablepotentialccitriggerccilocator (*(volatile byte xdata *) 0xF187)
#define    p_reg_mccid_disablepotentialccitriggerccilocator 0xF187
#define reg_mccid_disablepotentialccitriggerccilocator_pos 0
#define reg_mccid_disablepotentialccitriggerccilocator_len 1
#define reg_mccid_disablepotentialccitriggerccilocator_lsb 0
#define xd_p_reg_mccid_ofsmcontrolccitesting    (*(volatile byte xdata *) 0xF188)
#define    p_reg_mccid_ofsmcontrolccitesting    0xF188
#define reg_mccid_ofsmcontrolccitesting_pos 0
#define reg_mccid_ofsmcontrolccitesting_len 1
#define reg_mccid_ofsmcontrolccitesting_lsb 0
#define xd_p_reg_mccid_disableccitestingtriggercheckcci (*(volatile byte xdata *) 0xF189)
#define    p_reg_mccid_disableccitestingtriggercheckcci 0xF189
#define reg_mccid_disableccitestingtriggercheckcci_pos 0
#define reg_mccid_disableccitestingtriggercheckcci_len 1
#define reg_mccid_disableccitestingtriggercheckcci_lsb 0
#define xd_p_reg_mccid_ofsmcontrolacwgsetccifscstrobe   (*(volatile byte xdata *) 0xF18A)
#define    p_reg_mccid_ofsmcontrolacwgsetccifscstrobe   0xF18A
#define reg_mccid_ofsmcontrolacwgsetccifscstrobe_pos 0
#define reg_mccid_ofsmcontrolacwgsetccifscstrobe_len 1
#define reg_mccid_ofsmcontrolacwgsetccifscstrobe_lsb 0
#define xd_p_reg_mccid_disableacwgevaluatingbandwidthtrigger    (*(volatile byte xdata *) 0xF18B)
#define    p_reg_mccid_disableacwgevaluatingbandwidthtrigger    0xF18B
#define reg_mccid_disableacwgevaluatingbandwidthtrigger_pos 0
#define reg_mccid_disableacwgevaluatingbandwidthtrigger_len 1
#define reg_mccid_disableacwgevaluatingbandwidthtrigger_lsb 0
#define xd_p_reg_mccid_ofsmcontrolevaluatingbandwidth   (*(volatile byte xdata *) 0xF18C)
#define    p_reg_mccid_ofsmcontrolevaluatingbandwidth   0xF18C
#define reg_mccid_ofsmcontrolevaluatingbandwidth_pos 0
#define reg_mccid_ofsmcontrolevaluatingbandwidth_len 1
#define reg_mccid_ofsmcontrolevaluatingbandwidth_lsb 0
#define xd_p_reg_mccid_ofsmcontrolscanningaci   (*(volatile byte xdata *) 0xF18D)
#define    p_reg_mccid_ofsmcontrolscanningaci   0xF18D
#define reg_mccid_ofsmcontrolscanningaci_pos 0
#define reg_mccid_ofsmcontrolscanningaci_len 1
#define reg_mccid_ofsmcontrolscanningaci_lsb 0
#define xd_p_reg_mccid_disablescanningaci   (*(volatile byte xdata *) 0xF18E)
#define    p_reg_mccid_disablescanningaci   0xF18E
#define reg_mccid_disablescanningaci_pos 0
#define reg_mccid_disablescanningaci_len 1
#define reg_mccid_disablescanningaci_lsb 0
#define xd_p_reg_mccid_disableacwgccidetecting  (*(volatile byte xdata *) 0xF18F)
#define    p_reg_mccid_disableacwgccidetecting  0xF18F
#define reg_mccid_disableacwgccidetecting_pos 0
#define reg_mccid_disableacwgccidetecting_len 1
#define reg_mccid_disableacwgccidetecting_lsb 0
#define xd_p_reg_mccid_ofsmcontrolccitimertrigger   (*(volatile byte xdata *) 0xF190)
#define    p_reg_mccid_ofsmcontrolccitimertrigger   0xF190
#define reg_mccid_ofsmcontrolccitimertrigger_pos 0
#define reg_mccid_ofsmcontrolccitimertrigger_len 1
#define reg_mccid_ofsmcontrolccitimertrigger_lsb 0
#define xd_p_reg_mccid_disableccitimertrigger   (*(volatile byte xdata *) 0xF191)
#define    p_reg_mccid_disableccitimertrigger   0xF191
#define reg_mccid_disableccitimertrigger_pos 0
#define reg_mccid_disableccitimertrigger_len 1
#define reg_mccid_disableccitimertrigger_lsb 0
#define xd_p_reg_mccid_ofsmdisableccitriggercounting    (*(volatile byte xdata *) 0xF192)
#define    p_reg_mccid_ofsmdisableccitriggercounting    0xF192
#define reg_mccid_ofsmdisableccitriggercounting_pos 0
#define reg_mccid_ofsmdisableccitriggercounting_len 1
#define reg_mccid_ofsmdisableccitriggercounting_lsb 0
#define xd_p_reg_mccid_enableccifilteraci   (*(volatile byte xdata *) 0xF193)
#define    p_reg_mccid_enableccifilteraci   0xF193
#define reg_mccid_enableccifilteraci_pos 0
#define reg_mccid_enableccifilteraci_len 1
#define reg_mccid_enableccifilteraci_lsb 0
#define xd_p_reg_mccid_scannedfcwbfs_7_0    (*(volatile byte xdata *) 0xF194)
#define    p_reg_mccid_scannedfcwbfs_7_0    0xF194
#define reg_mccid_scannedfcwbfs_7_0_pos 0
#define reg_mccid_scannedfcwbfs_7_0_len 8
#define reg_mccid_scannedfcwbfs_7_0_lsb 0
#define xd_p_reg_mccid_scannedfcwbfs_13_8   (*(volatile byte xdata *) 0xF195)
#define    p_reg_mccid_scannedfcwbfs_13_8   0xF195
#define reg_mccid_scannedfcwbfs_13_8_pos 0
#define reg_mccid_scannedfcwbfs_13_8_len 6
#define reg_mccid_scannedfcwbfs_13_8_lsb 8
#define xd_p_reg_mccid_acwgevaluatingbandwidth  (*(volatile byte xdata *) 0xF196)
#define    p_reg_mccid_acwgevaluatingbandwidth  0xF196
#define reg_mccid_acwgevaluatingbandwidth_pos 0
#define reg_mccid_acwgevaluatingbandwidth_len 1
#define reg_mccid_acwgevaluatingbandwidth_lsb 0
#define xd_p_reg_mccid_acwglaunchevaluationbandwidth    (*(volatile byte xdata *) 0xF197)
#define    p_reg_mccid_acwglaunchevaluationbandwidth    0xF197
#define reg_mccid_acwglaunchevaluationbandwidth_pos 0
#define reg_mccid_acwglaunchevaluationbandwidth_len 1
#define reg_mccid_acwglaunchevaluationbandwidth_lsb 0
#define xd_p_reg_mccid_scannedcandidate (*(volatile byte xdata *) 0xF198)
#define    p_reg_mccid_scannedcandidate 0xF198
#define reg_mccid_scannedcandidate_pos 0
#define reg_mccid_scannedcandidate_len 3
#define reg_mccid_scannedcandidate_lsb 0
#define xd_p_reg_mccid_scstrobesearchingcandidate   (*(volatile byte xdata *) 0xF199)
#define    p_reg_mccid_scstrobesearchingcandidate   0xF199
#define reg_mccid_scstrobesearchingcandidate_pos 0
#define reg_mccid_scstrobesearchingcandidate_len 2
#define reg_mccid_scstrobesearchingcandidate_lsb 0
#define xd_p_reg_mccid_potentialcci (*(volatile byte xdata *) 0xF19A)
#define    p_reg_mccid_potentialcci 0xF19A
#define reg_mccid_potentialcci_pos 0
#define reg_mccid_potentialcci_len 1
#define reg_mccid_potentialcci_lsb 0
#define xd_p_reg_mccid_cciftimertrigger (*(volatile byte xdata *) 0xF19B)
#define    p_reg_mccid_cciftimertrigger 0xF19B
#define reg_mccid_cciftimertrigger_pos 0
#define reg_mccid_cciftimertrigger_len 1
#define reg_mccid_cciftimertrigger_lsb 0
#define xd_p_reg_mccid_ccitesting   (*(volatile byte xdata *) 0xF19C)
#define    p_reg_mccid_ccitesting   0xF19C
#define reg_mccid_ccitesting_pos 0
#define reg_mccid_ccitesting_len 1
#define reg_mccid_ccitesting_lsb 0
#define xd_p_reg_mccid_defaultccilocatormissno  (*(volatile byte xdata *) 0xF19D)
#define    p_reg_mccid_defaultccilocatormissno  0xF19D
#define reg_mccid_defaultccilocatormissno_pos 0
#define reg_mccid_defaultccilocatormissno_len 8
#define reg_mccid_defaultccilocatormissno_lsb 0
#define xd_p_reg_mccid_dagc1_use_despow (*(volatile byte xdata *) 0xF19E)
#define    p_reg_mccid_dagc1_use_despow 0xF19E
#define reg_mccid_dagc1_use_despow_pos 0
#define reg_mccid_dagc1_use_despow_len 1
#define reg_mccid_dagc1_use_despow_lsb 0
#define xd_p_reg_mccid_scannedacifrequencybegin_7_0 (*(volatile byte xdata *) 0xF19F)
#define    p_reg_mccid_scannedacifrequencybegin_7_0 0xF19F
#define reg_mccid_scannedacifrequencybegin_7_0_pos 0
#define reg_mccid_scannedacifrequencybegin_7_0_len 8
#define reg_mccid_scannedacifrequencybegin_7_0_lsb 0
#define xd_p_reg_mccid_scannedacifrequencybegin_13_8    (*(volatile byte xdata *) 0xF1A0)
#define    p_reg_mccid_scannedacifrequencybegin_13_8    0xF1A0
#define reg_mccid_scannedacifrequencybegin_13_8_pos 0
#define reg_mccid_scannedacifrequencybegin_13_8_len 6
#define reg_mccid_scannedacifrequencybegin_13_8_lsb 8
#define xd_p_reg_mccid_scannedacifrequencyend_7_0   (*(volatile byte xdata *) 0xF1A1)
#define    p_reg_mccid_scannedacifrequencyend_7_0   0xF1A1
#define reg_mccid_scannedacifrequencyend_7_0_pos 0
#define reg_mccid_scannedacifrequencyend_7_0_len 8
#define reg_mccid_scannedacifrequencyend_7_0_lsb 0
#define xd_p_reg_mccid_scannedacifrequencyend_13_8  (*(volatile byte xdata *) 0xF1A2)
#define    p_reg_mccid_scannedacifrequencyend_13_8  0xF1A2
#define reg_mccid_scannedacifrequencyend_13_8_pos 0
#define reg_mccid_scannedacifrequencyend_13_8_len 6
#define reg_mccid_scannedacifrequencyend_13_8_lsb 8
#define xd_p_reg_bfs_fcw_7_0    (*(volatile byte xdata *) 0xF1A3)
#define    p_reg_bfs_fcw_7_0    0xF1A3
#define reg_bfs_fcw_7_0_pos 0
#define reg_bfs_fcw_7_0_len 8
#define reg_bfs_fcw_7_0_lsb 0
#define xd_p_reg_bfs_fcw_15_8   (*(volatile byte xdata *) 0xF1A4)
#define    p_reg_bfs_fcw_15_8   0xF1A4
#define reg_bfs_fcw_15_8_pos 0
#define reg_bfs_fcw_15_8_len 8
#define reg_bfs_fcw_15_8_lsb 8
#define xd_p_reg_bfs_fcw_22_16  (*(volatile byte xdata *) 0xF1A5)
#define    p_reg_bfs_fcw_22_16  0xF1A5
#define reg_bfs_fcw_22_16_pos 0
#define reg_bfs_fcw_22_16_len 7
#define reg_bfs_fcw_22_16_lsb 16
#define xd_p_reg_cfoe_fcw_inv   (*(volatile byte xdata *) 0xF1A6)
#define    p_reg_cfoe_fcw_inv   0xF1A6
#define reg_cfoe_fcw_inv_pos 0
#define reg_cfoe_fcw_inv_len 1
#define reg_cfoe_fcw_inv_lsb 0
#define xd_p_reg_bfs_0if    (*(volatile byte xdata *) 0xF1A7)
#define    p_reg_bfs_0if    0xF1A7
#define reg_bfs_0if_pos 0
#define reg_bfs_0if_len 1
#define reg_bfs_0if_lsb 0
#define xd_p_reg_sadc_clk   (*(volatile byte xdata *) 0xF1A9)
#define    p_reg_sadc_clk   0xF1A9
#define reg_sadc_clk_pos 0
#define reg_sadc_clk_len 1
#define reg_sadc_clk_lsb 0
#define xd_p_reg_sadc_tx    (*(volatile byte xdata *) 0xF1AA)
#define    p_reg_sadc_tx    0xF1AA
#define reg_sadc_tx_pos 0
#define reg_sadc_tx_len 1
#define reg_sadc_tx_lsb 0
#define xd_p_reg_sadc_rx    (*(volatile byte xdata *) 0xF1AB)
#define    p_reg_sadc_rx    0xF1AB
#define reg_sadc_rx_pos 0
#define reg_sadc_rx_len 1
#define reg_sadc_rx_lsb 0
#define xd_p_reg_sadc_cs    (*(volatile byte xdata *) 0xF1AC)
#define    p_reg_sadc_cs    0xF1AC
#define reg_sadc_cs_pos 0
#define reg_sadc_cs_len 1
#define reg_sadc_cs_lsb 0
#define xd_p_reg_fix_fcw_7_0    (*(volatile byte xdata *) 0xF1AD)
#define    p_reg_fix_fcw_7_0    0xF1AD
#define reg_fix_fcw_7_0_pos 0
#define reg_fix_fcw_7_0_len 8
#define reg_fix_fcw_7_0_lsb 0
#define xd_p_reg_fix_fcw_15_8   (*(volatile byte xdata *) 0xF1AE)
#define    p_reg_fix_fcw_15_8   0xF1AE
#define reg_fix_fcw_15_8_pos 0
#define reg_fix_fcw_15_8_len 8
#define reg_fix_fcw_15_8_lsb 8
#define xd_p_reg_fix_fcw_22_16  (*(volatile byte xdata *) 0xF1AF)
#define    p_reg_fix_fcw_22_16  0xF1AF
#define reg_fix_fcw_22_16_pos 0
#define reg_fix_fcw_22_16_len 7
#define reg_fix_fcw_22_16_lsb 16
#define xd_r_reg_bfs_fcw_offset_7_0 (*(volatile byte xdata *) 0xF1B0)
#define    r_reg_bfs_fcw_offset_7_0 0xF1B0
#define reg_bfs_fcw_offset_7_0_pos 0
#define reg_bfs_fcw_offset_7_0_len 8
#define reg_bfs_fcw_offset_7_0_lsb 0
#define xd_r_reg_bfs_fcw_offset_15_8    (*(volatile byte xdata *) 0xF1B1)
#define    r_reg_bfs_fcw_offset_15_8    0xF1B1
#define reg_bfs_fcw_offset_15_8_pos 0
#define reg_bfs_fcw_offset_15_8_len 8
#define reg_bfs_fcw_offset_15_8_lsb 8
#define xd_r_reg_bfs_fcw_offset_22_16   (*(volatile byte xdata *) 0xF1B2)
#define    r_reg_bfs_fcw_offset_22_16   0xF1B2
#define reg_bfs_fcw_offset_22_16_pos 0
#define reg_bfs_fcw_offset_22_16_len 7
#define reg_bfs_fcw_offset_22_16_lsb 16
#define xd_r_bfs_fcw_q_7_0  (*(volatile byte xdata *) 0xF1B3)
#define    r_bfs_fcw_q_7_0  0xF1B3
#define bfs_fcw_q_7_0_pos 0
#define bfs_fcw_q_7_0_len 8
#define bfs_fcw_q_7_0_lsb 0
#define xd_r_bfs_fcw_q_15_8 (*(volatile byte xdata *) 0xF1B4)
#define    r_bfs_fcw_q_15_8 0xF1B4
#define bfs_fcw_q_15_8_pos 0
#define bfs_fcw_q_15_8_len 8
#define bfs_fcw_q_15_8_lsb 8
#define xd_r_bfs_fcw_q_22_16    (*(volatile byte xdata *) 0xF1B5)
#define    r_bfs_fcw_q_22_16    0xF1B5
#define bfs_fcw_q_22_16_pos 0
#define bfs_fcw_q_22_16_len 7
#define bfs_fcw_q_22_16_lsb 16
#define xd_p_reg_dagc3_use_despow   (*(volatile byte xdata *) 0xF1B6)
#define    p_reg_dagc3_use_despow   0xF1B6
#define reg_dagc3_use_despow_pos 0
#define reg_dagc3_use_despow_len 1
#define reg_dagc3_use_despow_lsb 0
#define xd_p_reg_dagc3_log_2_accumulate (*(volatile byte xdata *) 0xF1B7)
#define    p_reg_dagc3_log_2_accumulate 0xF1B7
#define reg_dagc3_log_2_accumulate_pos 0
#define reg_dagc3_log_2_accumulate_len 5
#define reg_dagc3_log_2_accumulate_lsb 0
#define xd_p_reg_dagc3_desired_level_7_0    (*(volatile byte xdata *) 0xF1BC)
#define    p_reg_dagc3_desired_level_7_0    0xF1BC
#define reg_dagc3_desired_level_7_0_pos 0
#define reg_dagc3_desired_level_7_0_len 8
#define reg_dagc3_desired_level_7_0_lsb 0
#define xd_p_reg_dagc3_desired_level_8  (*(volatile byte xdata *) 0xF1BD)
#define    p_reg_dagc3_desired_level_8  0xF1BD
#define reg_dagc3_desired_level_8_pos 0
#define reg_dagc3_desired_level_8_len 1
#define reg_dagc3_desired_level_8_lsb 8
#define xd_p_reg_dagc3_apply_delay  (*(volatile byte xdata *) 0xF1BE)
#define    p_reg_dagc3_apply_delay  0xF1BE
#define reg_dagc3_apply_delay_pos 0
#define reg_dagc3_apply_delay_len 7
#define reg_dagc3_apply_delay_lsb 0
#define xd_p_reg_dagc3_bp_scale (*(volatile byte xdata *) 0xF1BF)
#define    p_reg_dagc3_bp_scale 0xF1BF
#define reg_dagc3_bp_scale_pos 0
#define reg_dagc3_bp_scale_len 3
#define reg_dagc3_bp_scale_lsb 0
#define xd_p_reg_dagc3_in_sat_cnt_7_0   (*(volatile byte xdata *) 0xF1C0)
#define    p_reg_dagc3_in_sat_cnt_7_0   0xF1C0
#define reg_dagc3_in_sat_cnt_7_0_pos 0
#define reg_dagc3_in_sat_cnt_7_0_len 8
#define reg_dagc3_in_sat_cnt_7_0_lsb 0
#define xd_p_reg_dagc3_in_sat_cnt_15_8  (*(volatile byte xdata *) 0xF1C1)
#define    p_reg_dagc3_in_sat_cnt_15_8  0xF1C1
#define reg_dagc3_in_sat_cnt_15_8_pos 0
#define reg_dagc3_in_sat_cnt_15_8_len 8
#define reg_dagc3_in_sat_cnt_15_8_lsb 8
#define xd_p_reg_dagc3_in_sat_cnt_23_16 (*(volatile byte xdata *) 0xF1C2)
#define    p_reg_dagc3_in_sat_cnt_23_16 0xF1C2
#define reg_dagc3_in_sat_cnt_23_16_pos 0
#define reg_dagc3_in_sat_cnt_23_16_len 8
#define reg_dagc3_in_sat_cnt_23_16_lsb 16
#define xd_p_reg_dagc3_in_sat_cnt_31_24 (*(volatile byte xdata *) 0xF1C3)
#define    p_reg_dagc3_in_sat_cnt_31_24 0xF1C3
#define reg_dagc3_in_sat_cnt_31_24_pos 0
#define reg_dagc3_in_sat_cnt_31_24_len 8
#define reg_dagc3_in_sat_cnt_31_24_lsb 24
#define xd_p_reg_dagc3_out_sat_cnt_7_0  (*(volatile byte xdata *) 0xF1C4)
#define    p_reg_dagc3_out_sat_cnt_7_0  0xF1C4
#define reg_dagc3_out_sat_cnt_7_0_pos 0
#define reg_dagc3_out_sat_cnt_7_0_len 8
#define reg_dagc3_out_sat_cnt_7_0_lsb 0
#define xd_p_reg_dagc3_out_sat_cnt_15_8 (*(volatile byte xdata *) 0xF1C5)
#define    p_reg_dagc3_out_sat_cnt_15_8 0xF1C5
#define reg_dagc3_out_sat_cnt_15_8_pos 0
#define reg_dagc3_out_sat_cnt_15_8_len 8
#define reg_dagc3_out_sat_cnt_15_8_lsb 8
#define xd_p_reg_dagc3_out_sat_cnt_23_16    (*(volatile byte xdata *) 0xF1C6)
#define    p_reg_dagc3_out_sat_cnt_23_16    0xF1C6
#define reg_dagc3_out_sat_cnt_23_16_pos 0
#define reg_dagc3_out_sat_cnt_23_16_len 8
#define reg_dagc3_out_sat_cnt_23_16_lsb 16
#define xd_p_reg_dagc3_out_sat_cnt_31_24    (*(volatile byte xdata *) 0xF1C7)
#define    p_reg_dagc3_out_sat_cnt_31_24    0xF1C7
#define reg_dagc3_out_sat_cnt_31_24_pos 0
#define reg_dagc3_out_sat_cnt_31_24_len 8
#define reg_dagc3_out_sat_cnt_31_24_lsb 24
#define xd_r_bfs_dagc3_multiplier_7_0   (*(volatile byte xdata *) 0xF1C8)
#define    r_bfs_dagc3_multiplier_7_0   0xF1C8
#define bfs_dagc3_multiplier_7_0_pos 0
#define bfs_dagc3_multiplier_7_0_len 8
#define bfs_dagc3_multiplier_7_0_lsb 0
#define xd_r_bfs_dagc3_multiplier_15_8  (*(volatile byte xdata *) 0xF1C9)
#define    r_bfs_dagc3_multiplier_15_8  0xF1C9
#define bfs_dagc3_multiplier_15_8_pos 0
#define bfs_dagc3_multiplier_15_8_len 8
#define bfs_dagc3_multiplier_15_8_lsb 8
#define xd_r_bfs_dagc3_right_shift_bits (*(volatile byte xdata *) 0xF1CA)
#define    r_bfs_dagc3_right_shift_bits 0xF1CA
#define bfs_dagc3_right_shift_bits_pos 0
#define bfs_dagc3_right_shift_bits_len 4
#define bfs_dagc3_right_shift_bits_lsb 0
#define xd_p_reg_dagc3_fixed_gain_7_0   (*(volatile byte xdata *) 0xF1CB)
#define    p_reg_dagc3_fixed_gain_7_0   0xF1CB
#define reg_dagc3_fixed_gain_7_0_pos 0
#define reg_dagc3_fixed_gain_7_0_len 8
#define reg_dagc3_fixed_gain_7_0_lsb 0
#define xd_p_reg_dagc3_fixed_gain_11_8  (*(volatile byte xdata *) 0xF1CC)
#define    p_reg_dagc3_fixed_gain_11_8  0xF1CC
#define reg_dagc3_fixed_gain_11_8_pos 0
#define reg_dagc3_fixed_gain_11_8_len 4
#define reg_dagc3_fixed_gain_11_8_lsb 8
#define xd_p_reg_f_adc_7_0  (*(volatile byte xdata *) 0xF1CD)
#define    p_reg_f_adc_7_0  0xF1CD
#define reg_f_adc_7_0_pos 0
#define reg_f_adc_7_0_len 8
#define reg_f_adc_7_0_lsb 0
#define xd_p_reg_f_adc_15_8 (*(volatile byte xdata *) 0xF1CE)
#define    p_reg_f_adc_15_8 0xF1CE
#define reg_f_adc_15_8_pos 0
#define reg_f_adc_15_8_len 8
#define reg_f_adc_15_8_lsb 8
#define xd_p_reg_f_adc_23_16    (*(volatile byte xdata *) 0xF1CF)
#define    p_reg_f_adc_23_16    0xF1CF
#define reg_f_adc_23_16_pos 0
#define reg_f_adc_23_16_len 8
#define reg_f_adc_23_16_lsb 16
#define xd_p_reg_fste_frac_step_size_7_0    (*(volatile byte xdata *) 0xF1D0)
#define    p_reg_fste_frac_step_size_7_0    0xF1D0
#define reg_fste_frac_step_size_7_0_pos 0
#define reg_fste_frac_step_size_7_0_len 8
#define reg_fste_frac_step_size_7_0_lsb 0
#define xd_p_reg_fste_frac_step_size_15_8   (*(volatile byte xdata *) 0xF1D1)
#define    p_reg_fste_frac_step_size_15_8   0xF1D1
#define reg_fste_frac_step_size_15_8_pos 0
#define reg_fste_frac_step_size_15_8_len 8
#define reg_fste_frac_step_size_15_8_lsb 8
#define xd_p_reg_fste_frac_step_size_19_16  (*(volatile byte xdata *) 0xF1D2)
#define    p_reg_fste_frac_step_size_19_16  0xF1D2
#define reg_fste_frac_step_size_19_16_pos 0
#define reg_fste_frac_step_size_19_16_len 4
#define reg_fste_frac_step_size_19_16_lsb 16
#define xd_r_intp_mu_7_0    (*(volatile byte xdata *) 0xF1D3)
#define    r_intp_mu_7_0    0xF1D3
#define intp_mu_7_0_pos 0
#define intp_mu_7_0_len 8
#define intp_mu_7_0_lsb 0
#define xd_r_intp_mu_15_8   (*(volatile byte xdata *) 0xF1D4)
#define    r_intp_mu_15_8   0xF1D4
#define intp_mu_15_8_pos 0
#define intp_mu_15_8_len 8
#define intp_mu_15_8_lsb 8
#define xd_r_intp_mu_23_16  (*(volatile byte xdata *) 0xF1D5)
#define    r_intp_mu_23_16  0xF1D5
#define intp_mu_23_16_pos 0
#define intp_mu_23_16_len 8
#define intp_mu_23_16_lsb 16
#define xd_r_intp_mu_25_24  (*(volatile byte xdata *) 0xF1D6)
#define    r_intp_mu_25_24  0xF1D6
#define intp_mu_25_24_pos 0
#define intp_mu_25_24_len 2
#define intp_mu_25_24_lsb 24
#define xd_p_intp_muq_7_0   (*(volatile byte xdata *) 0xF1D7)
#define    p_intp_muq_7_0   0xF1D7
#define intp_muq_7_0_pos 0
#define intp_muq_7_0_len 8
#define intp_muq_7_0_lsb 0
#define xd_p_intp_muq_15_8  (*(volatile byte xdata *) 0xF1D8)
#define    p_intp_muq_15_8  0xF1D8
#define intp_muq_15_8_pos 0
#define intp_muq_15_8_len 8
#define intp_muq_15_8_lsb 8
#define xd_p_intp_muq_23_16 (*(volatile byte xdata *) 0xF1D9)
#define    p_intp_muq_23_16 0xF1D9
#define intp_muq_23_16_pos 0
#define intp_muq_23_16_len 8
#define intp_muq_23_16_lsb 16
#define xd_p_reg_sfoe_inv   (*(volatile byte xdata *) 0xF1DA)
#define    p_reg_sfoe_inv   0xF1DA
#define reg_sfoe_inv_pos 0
#define reg_sfoe_inv_len 1
#define reg_sfoe_inv_lsb 0
#define xd_p_intp_ext_en    (*(volatile byte xdata *) 0xF1DB)
#define    p_intp_ext_en    0xF1DB
#define intp_ext_en_pos 0
#define intp_ext_en_len 1
#define intp_ext_en_lsb 0
#define xd_r_intp_ext_done  (*(volatile byte xdata *) 0xF1DC)
#define    r_intp_ext_done  0xF1DC
#define intp_ext_done_pos 0
#define intp_ext_done_len 1
#define intp_ext_done_lsb 0
#define xd_p_intp_ext_in_7_0    (*(volatile byte xdata *) 0xF1DD)
#define    p_intp_ext_in_7_0    0xF1DD
#define intp_ext_in_7_0_pos 0
#define intp_ext_in_7_0_len 8
#define intp_ext_in_7_0_lsb 0
#define xd_p_intp_ext_in_15_8   (*(volatile byte xdata *) 0xF1DE)
#define    p_intp_ext_in_15_8   0xF1DE
#define intp_ext_in_15_8_pos 0
#define intp_ext_in_15_8_len 8
#define intp_ext_in_15_8_lsb 8
#define xd_p_intp_ext_in_23_16  (*(volatile byte xdata *) 0xF1DF)
#define    p_intp_ext_in_23_16  0xF1DF
#define intp_ext_in_23_16_pos 0
#define intp_ext_in_23_16_len 8
#define intp_ext_in_23_16_lsb 16
#define xd_p_intp_ext_in_25_24  (*(volatile byte xdata *) 0xF1E0)
#define    p_intp_ext_in_25_24  0xF1E0
#define intp_ext_in_25_24_pos 0
#define intp_ext_in_25_24_len 2
#define intp_ext_in_25_24_lsb 24
#define xd_r_intp_ext_out_7_0   (*(volatile byte xdata *) 0xF1E1)
#define    r_intp_ext_out_7_0   0xF1E1
#define intp_ext_out_7_0_pos 0
#define intp_ext_out_7_0_len 8
#define intp_ext_out_7_0_lsb 0
#define xd_r_intp_ext_out_15_8  (*(volatile byte xdata *) 0xF1E2)
#define    r_intp_ext_out_15_8  0xF1E2
#define intp_ext_out_15_8_pos 0
#define intp_ext_out_15_8_len 8
#define intp_ext_out_15_8_lsb 8
#define xd_r_intp_ext_out_23_16 (*(volatile byte xdata *) 0xF1E3)
#define    r_intp_ext_out_23_16 0xF1E3
#define intp_ext_out_23_16_pos 0
#define intp_ext_out_23_16_len 8
#define intp_ext_out_23_16_lsb 16
#define xd_r_intp_ext_out_28_24 (*(volatile byte xdata *) 0xF1E4)
#define    r_intp_ext_out_28_24 0xF1E4
#define intp_ext_out_28_24_pos 0
#define intp_ext_out_28_24_len 5
#define intp_ext_out_28_24_lsb 24
#define xd_p_reg_agc_rst    (*(volatile byte xdata *) 0xF1E5)
#define    p_reg_agc_rst    0xF1E5
#define reg_agc_rst_pos 0
#define reg_agc_rst_len 1
#define reg_agc_rst_lsb 0
#define xd_p_rf_agc_en  (*(volatile byte xdata *) 0xF1E6)
#define    p_rf_agc_en  0xF1E6
#define rf_agc_en_pos 0
#define rf_agc_en_len 1
#define rf_agc_en_lsb 0
#define xd_p_agc_lock   (*(volatile byte xdata *) 0xF1E7)
#define    p_agc_lock   0xF1E7
#define agc_lock_pos 0
#define agc_lock_len 1
#define agc_lock_lsb 0
#define xd_p_reg_tinr_rst   (*(volatile byte xdata *) 0xF1E8)
#define    p_reg_tinr_rst   0xF1E8
#define reg_tinr_rst_pos 0
#define reg_tinr_rst_len 1
#define reg_tinr_rst_lsb 0
#define xd_p_reg_tinr_en    (*(volatile byte xdata *) 0xF1E9)
#define    p_reg_tinr_en    0xF1E9
#define reg_tinr_en_pos 0
#define reg_tinr_en_len 1
#define reg_tinr_en_lsb 0
#define xd_p_reg_bfs_en (*(volatile byte xdata *) 0xF1EA)
#define    p_reg_bfs_en 0xF1EA
#define reg_bfs_en_pos 0
#define reg_bfs_en_len 1
#define reg_bfs_en_lsb 0
#define xd_p_reg_bfs_rst    (*(volatile byte xdata *) 0xF1EB)
#define    p_reg_bfs_rst    0xF1EB
#define reg_bfs_rst_pos 0
#define reg_bfs_rst_len 1
#define reg_bfs_rst_lsb 0
#define xd_p_reg_bfs_byp    (*(volatile byte xdata *) 0xF1EC)
#define    p_reg_bfs_byp    0xF1EC
#define reg_bfs_byp_pos 0
#define reg_bfs_byp_len 1
#define reg_bfs_byp_lsb 0
#define xd_p_intp_en    (*(volatile byte xdata *) 0xF1EF)
#define    p_intp_en    0xF1EF
#define intp_en_pos 0
#define intp_en_len 1
#define intp_en_lsb 0
#define xd_p_intp_rst   (*(volatile byte xdata *) 0xF1F0)
#define    p_intp_rst   0xF1F0
#define intp_rst_pos 0
#define intp_rst_len 1
#define intp_rst_lsb 0
#define xd_p_reg_p_acif_en  (*(volatile byte xdata *) 0xF1F2)
#define    p_reg_p_acif_en  0xF1F2
#define reg_p_acif_en_pos 0
#define reg_p_acif_en_len 1
#define reg_p_acif_en_lsb 0
#define xd_p_reg_p_acif_rst (*(volatile byte xdata *) 0xF1F3)
#define    p_reg_p_acif_rst 0xF1F3
#define reg_p_acif_rst_pos 0
#define reg_p_acif_rst_len 1
#define reg_p_acif_rst_lsb 0
#define xd_p_reg_p_acif_byp (*(volatile byte xdata *) 0xF1F4)
#define    p_reg_p_acif_byp 0xF1F4
#define reg_p_acif_byp_pos 0
#define reg_p_acif_byp_len 1
#define reg_p_acif_byp_lsb 0
#define xd_p_dagc2_rst  (*(volatile byte xdata *) 0xF1F6)
#define    p_dagc2_rst  0xF1F6
#define dagc2_rst_pos 0
#define dagc2_rst_len 1
#define dagc2_rst_lsb 0
#define xd_p_dagc2_en   (*(volatile byte xdata *) 0xF1F7)
#define    p_dagc2_en   0xF1F7
#define dagc2_en_pos 0
#define dagc2_en_len 1
#define dagc2_en_lsb 0
#define xd_p_dagc2_mode (*(volatile byte xdata *) 0xF1F8)
#define    p_dagc2_mode 0xF1F8
#define dagc2_mode_pos 0
#define dagc2_mode_len 2
#define dagc2_mode_lsb 0
#define xd_p_dagc2_done (*(volatile byte xdata *) 0xF1F9)
#define    p_dagc2_done 0xF1F9
#define dagc2_done_pos 0
#define dagc2_done_len 1
#define dagc2_done_lsb 0
#define xd_p_dagc3_rst  (*(volatile byte xdata *) 0xF1FA)
#define    p_dagc3_rst  0xF1FA
#define dagc3_rst_pos 0
#define dagc3_rst_len 1
#define dagc3_rst_lsb 0
#define xd_p_dagc3_en   (*(volatile byte xdata *) 0xF1FB)
#define    p_dagc3_en   0xF1FB
#define dagc3_en_pos 0
#define dagc3_en_len 1
#define dagc3_en_lsb 0
#define xd_p_dagc3_mode (*(volatile byte xdata *) 0xF1FC)
#define    p_dagc3_mode 0xF1FC
#define dagc3_mode_pos 0
#define dagc3_mode_len 2
#define dagc3_mode_lsb 0
#define xd_p_dagc3_done (*(volatile byte xdata *) 0xF1FD)
#define    p_dagc3_done 0xF1FD
#define dagc3_done_pos 0
#define dagc3_done_len 1
#define dagc3_done_lsb 0
#define xd_p_reg_dagc2_desired_level_7_0    (*(volatile byte xdata *) 0xF202)
#define    p_reg_dagc2_desired_level_7_0    0xF202
#define reg_dagc2_desired_level_7_0_pos 0
#define reg_dagc2_desired_level_7_0_len 8
#define reg_dagc2_desired_level_7_0_lsb 0
#define xd_p_reg_dagc2_desired_level_8  (*(volatile byte xdata *) 0xF203)
#define    p_reg_dagc2_desired_level_8  0xF203
#define reg_dagc2_desired_level_8_pos 0
#define reg_dagc2_desired_level_8_len 1
#define reg_dagc2_desired_level_8_lsb 8
#define xd_p_reg_dagc2_apply_delay  (*(volatile byte xdata *) 0xF204)
#define    p_reg_dagc2_apply_delay  0xF204
#define reg_dagc2_apply_delay_pos 0
#define reg_dagc2_apply_delay_len 7
#define reg_dagc2_apply_delay_lsb 0
#define xd_p_reg_dagc2_bypass_scale_ctl (*(volatile byte xdata *) 0xF205)
#define    p_reg_dagc2_bypass_scale_ctl 0xF205
#define reg_dagc2_bypass_scale_ctl_pos 0
#define reg_dagc2_bypass_scale_ctl_len 3
#define reg_dagc2_bypass_scale_ctl_lsb 0
#define xd_p_reg_dagc2_programmable_shift2  (*(volatile byte xdata *) 0xF206)
#define    p_reg_dagc2_programmable_shift2  0xF206
#define reg_dagc2_programmable_shift2_pos 0
#define reg_dagc2_programmable_shift2_len 8
#define reg_dagc2_programmable_shift2_lsb 0
#define xd_p_reg_dagc2_in_sat_cnt_7_0   (*(volatile byte xdata *) 0xF207)
#define    p_reg_dagc2_in_sat_cnt_7_0   0xF207
#define reg_dagc2_in_sat_cnt_7_0_pos 0
#define reg_dagc2_in_sat_cnt_7_0_len 8
#define reg_dagc2_in_sat_cnt_7_0_lsb 0
#define xd_p_reg_dagc2_in_sat_cnt_15_8  (*(volatile byte xdata *) 0xF208)
#define    p_reg_dagc2_in_sat_cnt_15_8  0xF208
#define reg_dagc2_in_sat_cnt_15_8_pos 0
#define reg_dagc2_in_sat_cnt_15_8_len 8
#define reg_dagc2_in_sat_cnt_15_8_lsb 8
#define xd_p_reg_dagc2_in_sat_cnt_23_16 (*(volatile byte xdata *) 0xF209)
#define    p_reg_dagc2_in_sat_cnt_23_16 0xF209
#define reg_dagc2_in_sat_cnt_23_16_pos 0
#define reg_dagc2_in_sat_cnt_23_16_len 8
#define reg_dagc2_in_sat_cnt_23_16_lsb 16
#define xd_p_reg_dagc2_in_sat_cnt_31_24 (*(volatile byte xdata *) 0xF20A)
#define    p_reg_dagc2_in_sat_cnt_31_24 0xF20A
#define reg_dagc2_in_sat_cnt_31_24_pos 0
#define reg_dagc2_in_sat_cnt_31_24_len 8
#define reg_dagc2_in_sat_cnt_31_24_lsb 24
#define xd_p_reg_dagc2_out_sat_cnt_7_0  (*(volatile byte xdata *) 0xF20B)
#define    p_reg_dagc2_out_sat_cnt_7_0  0xF20B
#define reg_dagc2_out_sat_cnt_7_0_pos 0
#define reg_dagc2_out_sat_cnt_7_0_len 8
#define reg_dagc2_out_sat_cnt_7_0_lsb 0
#define xd_p_reg_dagc2_out_sat_cnt_15_8 (*(volatile byte xdata *) 0xF20C)
#define    p_reg_dagc2_out_sat_cnt_15_8 0xF20C
#define reg_dagc2_out_sat_cnt_15_8_pos 0
#define reg_dagc2_out_sat_cnt_15_8_len 8
#define reg_dagc2_out_sat_cnt_15_8_lsb 8
#define xd_p_reg_dagc2_out_sat_cnt_23_16    (*(volatile byte xdata *) 0xF20D)
#define    p_reg_dagc2_out_sat_cnt_23_16    0xF20D
#define reg_dagc2_out_sat_cnt_23_16_pos 0
#define reg_dagc2_out_sat_cnt_23_16_len 8
#define reg_dagc2_out_sat_cnt_23_16_lsb 16
#define xd_p_reg_dagc2_out_sat_cnt_31_24    (*(volatile byte xdata *) 0xF20E)
#define    p_reg_dagc2_out_sat_cnt_31_24    0xF20E
#define reg_dagc2_out_sat_cnt_31_24_pos 0
#define reg_dagc2_out_sat_cnt_31_24_len 8
#define reg_dagc2_out_sat_cnt_31_24_lsb 24
#define xd_r_reg_dagc2_multiplier_7_0   (*(volatile byte xdata *) 0xF20F)
#define    r_reg_dagc2_multiplier_7_0   0xF20F
#define reg_dagc2_multiplier_7_0_pos 0
#define reg_dagc2_multiplier_7_0_len 8
#define reg_dagc2_multiplier_7_0_lsb 0
#define xd_r_reg_dagc2_multiplier_15_8  (*(volatile byte xdata *) 0xF210)
#define    r_reg_dagc2_multiplier_15_8  0xF210
#define reg_dagc2_multiplier_15_8_pos 0
#define reg_dagc2_multiplier_15_8_len 8
#define reg_dagc2_multiplier_15_8_lsb 8
#define xd_r_reg_dagc2_right_shift_bits (*(volatile byte xdata *) 0xF211)
#define    r_reg_dagc2_right_shift_bits 0xF211
#define reg_dagc2_right_shift_bits_pos 0
#define reg_dagc2_right_shift_bits_len 4
#define reg_dagc2_right_shift_bits_lsb 0
#define xd_p_reg_dagc2_smbuf_err    (*(volatile byte xdata *) 0xF212)
#define    p_reg_dagc2_smbuf_err    0xF212
#define reg_dagc2_smbuf_err_pos 0
#define reg_dagc2_smbuf_err_len 1
#define reg_dagc2_smbuf_err_lsb 0
#define xd_p_reg_dagc2_cplxconj (*(volatile byte xdata *) 0xF213)
#define    p_reg_dagc2_cplxconj 0xF213
#define reg_dagc2_cplxconj_pos 0
#define reg_dagc2_cplxconj_len 1
#define reg_dagc2_cplxconj_lsb 0
#define xd_p_reg_dagc2_use_despow   (*(volatile byte xdata *) 0xF214)
#define    p_reg_dagc2_use_despow   0xF214
#define reg_dagc2_use_despow_pos 0
#define reg_dagc2_use_despow_len 1
#define reg_dagc2_use_despow_lsb 0
#define xd_p_reg_dagc2_log_2_accumulate (*(volatile byte xdata *) 0xF215)
#define    p_reg_dagc2_log_2_accumulate 0xF215
#define reg_dagc2_log_2_accumulate_pos 0
#define reg_dagc2_log_2_accumulate_len 5
#define reg_dagc2_log_2_accumulate_lsb 0
#define xd_r_dagc2_dca_gain (*(volatile byte xdata *) 0xF216)
#define    r_dagc2_dca_gain 0xF216
#define dagc2_dca_gain_pos 0
#define dagc2_dca_gain_len 8
#define dagc2_dca_gain_lsb 0
#define xd_p_reg_dca_gain_offset    (*(volatile byte xdata *) 0xF217)
#define    p_reg_dca_gain_offset    0xF217
#define reg_dca_gain_offset_pos 0
#define reg_dca_gain_offset_len 8
#define reg_dca_gain_offset_lsb 0
#define xd_p_reg_dagc2_FG_mode  (*(volatile byte xdata *) 0xF218)
#define    p_reg_dagc2_FG_mode  0xF218
#define reg_dagc2_FG_mode_pos 0
#define reg_dagc2_FG_mode_len 1
#define reg_dagc2_FG_mode_lsb 0
#define xd_p_reg_dagc2_fixed_gain_7_0   (*(volatile byte xdata *) 0xF219)
#define    p_reg_dagc2_fixed_gain_7_0   0xF219
#define reg_dagc2_fixed_gain_7_0_pos 0
#define reg_dagc2_fixed_gain_7_0_len 8
#define reg_dagc2_fixed_gain_7_0_lsb 0
#define xd_p_reg_dagc2_fixed_gain_11_8  (*(volatile byte xdata *) 0xF21A)
#define    p_reg_dagc2_fixed_gain_11_8  0xF21A
#define reg_dagc2_fixed_gain_11_8_pos 0
#define reg_dagc2_fixed_gain_11_8_len 4
#define reg_dagc2_fixed_gain_11_8_lsb 8
#define xd_p_reg_td_debug_7_0   (*(volatile byte xdata *) 0xF21B)
#define    p_reg_td_debug_7_0   0xF21B
#define reg_td_debug_7_0_pos 0
#define reg_td_debug_7_0_len 8
#define reg_td_debug_7_0_lsb 0
#define xd_p_reg_td_debug_15_8  (*(volatile byte xdata *) 0xF21C)
#define    p_reg_td_debug_15_8  0xF21C
#define reg_td_debug_15_8_pos 0
#define reg_td_debug_15_8_len 8
#define reg_td_debug_15_8_lsb 8
#define xd_p_reg_td_debug_23_16 (*(volatile byte xdata *) 0xF21D)
#define    p_reg_td_debug_23_16 0xF21D
#define reg_td_debug_23_16_pos 0
#define reg_td_debug_23_16_len 8
#define reg_td_debug_23_16_lsb 16
#define xd_p_reg_td_debug_30_24 (*(volatile byte xdata *) 0xF21E)
#define    p_reg_td_debug_30_24 0xF21E
#define reg_td_debug_30_24_pos 0
#define reg_td_debug_30_24_len 7
#define reg_td_debug_30_24_lsb 24
#define xd_g_reg_tpsd_txmod (*(volatile byte xdata *) 0xF900)
#define    g_reg_tpsd_txmod 0xF900
#define reg_tpsd_txmod_pos 0
#define reg_tpsd_txmod_len 2
#define reg_tpsd_txmod_lsb 0
#define xd_g_reg_tpsd_gi    (*(volatile byte xdata *) 0xF901)
#define    g_reg_tpsd_gi    0xF901
#define reg_tpsd_gi_pos 0
#define reg_tpsd_gi_len 2
#define reg_tpsd_gi_lsb 0
#define xd_g_reg_tpsd_hier  (*(volatile byte xdata *) 0xF902)
#define    g_reg_tpsd_hier  0xF902
#define reg_tpsd_hier_pos 0
#define reg_tpsd_hier_len 3
#define reg_tpsd_hier_lsb 0
#define xd_g_reg_tpsd_const (*(volatile byte xdata *) 0xF903)
#define    g_reg_tpsd_const 0xF903
#define reg_tpsd_const_pos 0
#define reg_tpsd_const_len 2
#define reg_tpsd_const_lsb 0
#define xd_g_reg_bw (*(volatile byte xdata *) 0xF904)
#define    g_reg_bw 0xF904
#define reg_bw_pos 0
#define reg_bw_len 2
#define reg_bw_lsb 0
#define xd_g_reg_dec_pri    (*(volatile byte xdata *) 0xF905)
#define    g_reg_dec_pri    0xF905
#define reg_dec_pri_pos 0
#define reg_dec_pri_len 1
#define reg_dec_pri_lsb 0
#define xd_g_reg_tpsd_hpcr  (*(volatile byte xdata *) 0xF906)
#define    g_reg_tpsd_hpcr  0xF906
#define reg_tpsd_hpcr_pos 0
#define reg_tpsd_hpcr_len 3
#define reg_tpsd_hpcr_lsb 0
#define xd_g_reg_tpsd_lpcr  (*(volatile byte xdata *) 0xF907)
#define    g_reg_tpsd_lpcr  0xF907
#define reg_tpsd_lpcr_pos 0
#define reg_tpsd_lpcr_len 3
#define reg_tpsd_lpcr_lsb 0
#define xd_g_reg_tpsd_indep (*(volatile byte xdata *) 0xF908)
#define    g_reg_tpsd_indep 0xF908
#define reg_tpsd_indep_pos 0
#define reg_tpsd_indep_len 1
#define reg_tpsd_indep_lsb 0
#define xd_g_reg_tpsd_tslice    (*(volatile byte xdata *) 0xF909)
#define    g_reg_tpsd_tslice    0xF909
#define reg_tpsd_tslice_pos 0
#define reg_tpsd_tslice_len 1
#define reg_tpsd_tslice_lsb 0
#define xd_g_reg_tpsd_mpefec    (*(volatile byte xdata *) 0xF90A)
#define    g_reg_tpsd_mpefec    0xF90A
#define reg_tpsd_mpefec_pos 0
#define reg_tpsd_mpefec_len 1
#define reg_tpsd_mpefec_lsb 0
#define xd_g_reg_sntc_en    (*(volatile byte xdata *) 0xF90B)
#define    g_reg_sntc_en    0xF90B
#define reg_sntc_en_pos 0
#define reg_sntc_en_len 1
#define reg_sntc_en_lsb 0
#define xd_g_reg_intp_sys_div   (*(volatile byte xdata *) 0xF90C)
#define    g_reg_intp_sys_div   0xF90C
#define reg_intp_sys_div_pos 0
#define reg_intp_sys_div_len 1
#define reg_intp_sys_div_lsb 0
#define xd_g_reg_clk_sntc_sel   (*(volatile byte xdata *) 0xF90D)
#define    g_reg_clk_sntc_sel   0xF90D
#define reg_clk_sntc_sel_pos 0
#define reg_clk_sntc_sel_len 3
#define reg_clk_sntc_sel_lsb 0
#define xd_g_reg_clk_sys40  (*(volatile byte xdata *) 0xF90E)
#define    g_reg_clk_sys40  0xF90E
#define reg_clk_sys40_pos 0
#define reg_clk_sys40_len 1
#define reg_clk_sys40_lsb 0
#define xd_g_reg_intp_sys_polarity  (*(volatile byte xdata *) 0xF90F)
#define    g_reg_intp_sys_polarity  0xF90F
#define reg_intp_sys_polarity_pos 0
#define reg_intp_sys_polarity_len 1
#define reg_intp_sys_polarity_lsb 0
#define xd_g_reg_intp_sys_sc_7_0    (*(volatile byte xdata *) 0xF910)
#define    g_reg_intp_sys_sc_7_0    0xF910
#define reg_intp_sys_sc_7_0_pos 0
#define reg_intp_sys_sc_7_0_len 8
#define reg_intp_sys_sc_7_0_lsb 0
#define xd_g_reg_intp_sys_sc_15_8   (*(volatile byte xdata *) 0xF911)
#define    g_reg_intp_sys_sc_15_8   0xF911
#define reg_intp_sys_sc_15_8_pos 0
#define reg_intp_sys_sc_15_8_len 8
#define reg_intp_sys_sc_15_8_lsb 8
#define xd_g_reg_intp_sys_sc_23_16  (*(volatile byte xdata *) 0xF912)
#define    g_reg_intp_sys_sc_23_16  0xF912
#define reg_intp_sys_sc_23_16_pos 0
#define reg_intp_sys_sc_23_16_len 8
#define reg_intp_sys_sc_23_16_lsb 16
#define xd_g_reg_intp_sys_sc_26_24  (*(volatile byte xdata *) 0xF913)
#define    g_reg_intp_sys_sc_26_24  0xF913
#define reg_intp_sys_sc_26_24_pos 0
#define reg_intp_sys_sc_26_24_len 3
#define reg_intp_sys_sc_26_24_lsb 24
#define xd_g_reg_ofsm_clk   (*(volatile byte xdata *) 0xF914)
#define    g_reg_ofsm_clk   0xF914
#define reg_ofsm_clk_pos 0
#define reg_ofsm_clk_len 3
#define reg_ofsm_clk_lsb 0
#define xd_g_reg_fclk_cfg   (*(volatile byte xdata *) 0xF915)
#define    g_reg_fclk_cfg   0xF915
#define reg_fclk_cfg_pos 0
#define reg_fclk_cfg_len 1
#define reg_fclk_cfg_lsb 0
#define xd_g_reg_fclk_idi   (*(volatile byte xdata *) 0xF916)
#define    g_reg_fclk_idi   0xF916
#define reg_fclk_idi_pos 0
#define reg_fclk_idi_len 1
#define reg_fclk_idi_lsb 0
#define xd_g_reg_fclk_odi   (*(volatile byte xdata *) 0xF917)
#define    g_reg_fclk_odi   0xF917
#define reg_fclk_odi_pos 0
#define reg_fclk_odi_len 1
#define reg_fclk_odi_lsb 0
#define xd_g_reg_fclk_rsd   (*(volatile byte xdata *) 0xF918)
#define    g_reg_fclk_rsd   0xF918
#define reg_fclk_rsd_pos 0
#define reg_fclk_rsd_len 1
#define reg_fclk_rsd_lsb 0
#define xd_g_reg_fclk_vtb   (*(volatile byte xdata *) 0xF919)
#define    g_reg_fclk_vtb   0xF919
#define reg_fclk_vtb_pos 0
#define reg_fclk_vtb_len 1
#define reg_fclk_vtb_lsb 0
#define xd_g_reg_fclk_cste  (*(volatile byte xdata *) 0xF91A)
#define    g_reg_fclk_cste  0xF91A
#define reg_fclk_cste_pos 0
#define reg_fclk_cste_len 1
#define reg_fclk_cste_lsb 0
#define xd_g_reg_fclk_mp2if (*(volatile byte xdata *) 0xF91B)
#define    g_reg_fclk_mp2if 0xF91B
#define reg_fclk_mp2if_pos 0
#define reg_fclk_mp2if_len 1
#define reg_fclk_mp2if_lsb 0
#define xd_p_reg_adcout_sync    (*(volatile byte xdata *) 0xFA00)
#define    p_reg_adcout_sync    0xFA00
#define reg_adcout_sync_pos 0
#define reg_adcout_sync_len 1
#define reg_adcout_sync_lsb 0
#define xd_p_reg_dagc2o_edge1   (*(volatile byte xdata *) 0xFA01)
#define    p_reg_dagc2o_edge1   0xFA01
#define reg_dagc2o_edge1_pos 0
#define reg_dagc2o_edge1_len 1
#define reg_dagc2o_edge1_lsb 0
#define xd_p_reg_dagc2o_edge0   (*(volatile byte xdata *) 0xFA02)
#define    p_reg_dagc2o_edge0   0xFA02
#define reg_dagc2o_edge0_pos 0
#define reg_dagc2o_edge0_len 1
#define reg_dagc2o_edge0_lsb 0
#define xd_p_reg_second_rom_on  (*(volatile byte xdata *) 0xFA03)
#define    p_reg_second_rom_on  0xFA03
#define reg_second_rom_on_pos 0
#define reg_second_rom_on_len 1
#define reg_second_rom_on_lsb 0
#define xd_p_reg_bypass_host2tuner  (*(volatile byte xdata *) 0xFA04)
#define    p_reg_bypass_host2tuner  0xFA04
#define reg_bypass_host2tuner_pos 0
#define reg_bypass_host2tuner_len 1
#define reg_bypass_host2tuner_lsb 0
#endif
// biu_reg.h 6-27-2007
// gen_biu Ver 1.0 generated by tienchi
#define xd_p_cfoe_NS_coeff1_7_0 (*(volatile byte xdata *) 0xF400)
#define    p_cfoe_NS_coeff1_7_0 0xF400
#define cfoe_NS_coeff1_7_0_pos 0
#define cfoe_NS_coeff1_7_0_len 8
#define cfoe_NS_coeff1_7_0_lsb 0
#define xd_p_cfoe_NS_coeff1_15_8    (*(volatile byte xdata *) 0xF401)
#define    p_cfoe_NS_coeff1_15_8    0xF401
#define cfoe_NS_coeff1_15_8_pos 0
#define cfoe_NS_coeff1_15_8_len 8
#define cfoe_NS_coeff1_15_8_lsb 8
#define xd_p_cfoe_NS_coeff1_23_16   (*(volatile byte xdata *) 0xF402)
#define    p_cfoe_NS_coeff1_23_16   0xF402
#define cfoe_NS_coeff1_23_16_pos 0
#define cfoe_NS_coeff1_23_16_len 8
#define cfoe_NS_coeff1_23_16_lsb 16
#define xd_p_cfoe_NS_coeff1_25_24   (*(volatile byte xdata *) 0xF403)
#define    p_cfoe_NS_coeff1_25_24   0xF403
#define cfoe_NS_coeff1_25_24_pos 0
#define cfoe_NS_coeff1_25_24_len 2
#define cfoe_NS_coeff1_25_24_lsb 24
#define xd_p_cfoe_NS_coeff2_7_0 (*(volatile byte xdata *) 0xF404)
#define    p_cfoe_NS_coeff2_7_0 0xF404
#define cfoe_NS_coeff2_7_0_pos 0
#define cfoe_NS_coeff2_7_0_len 8
#define cfoe_NS_coeff2_7_0_lsb 0
#define xd_p_cfoe_NS_coeff2_15_8    (*(volatile byte xdata *) 0xF405)
#define    p_cfoe_NS_coeff2_15_8    0xF405
#define cfoe_NS_coeff2_15_8_pos 0
#define cfoe_NS_coeff2_15_8_len 8
#define cfoe_NS_coeff2_15_8_lsb 8
#define xd_p_cfoe_NS_coeff2_23_16   (*(volatile byte xdata *) 0xF406)
#define    p_cfoe_NS_coeff2_23_16   0xF406
#define cfoe_NS_coeff2_23_16_pos 0
#define cfoe_NS_coeff2_23_16_len 8
#define cfoe_NS_coeff2_23_16_lsb 16
#define xd_p_cfoe_NS_coeff2_24  (*(volatile byte xdata *) 0xF407)
#define    p_cfoe_NS_coeff2_24  0xF407
#define cfoe_NS_coeff2_24_pos 0
#define cfoe_NS_coeff2_24_len 1
#define cfoe_NS_coeff2_24_lsb 24
#define xd_p_cfoe_lf_c1_7_0 (*(volatile byte xdata *) 0xF408)
#define    p_cfoe_lf_c1_7_0 0xF408
#define cfoe_lf_c1_7_0_pos 0
#define cfoe_lf_c1_7_0_len 8
#define cfoe_lf_c1_7_0_lsb 0
#define xd_p_cfoe_lf_c1_9_8 (*(volatile byte xdata *) 0xF409)
#define    p_cfoe_lf_c1_9_8 0xF409
#define cfoe_lf_c1_9_8_pos 0
#define cfoe_lf_c1_9_8_len 2
#define cfoe_lf_c1_9_8_lsb 8
#define xd_p_cfoe_lf_c2_7_0 (*(volatile byte xdata *) 0xF40A)
#define    p_cfoe_lf_c2_7_0 0xF40A
#define cfoe_lf_c2_7_0_pos 0
#define cfoe_lf_c2_7_0_len 8
#define cfoe_lf_c2_7_0_lsb 0
#define xd_p_cfoe_lf_c2_9_8 (*(volatile byte xdata *) 0xF40B)
#define    p_cfoe_lf_c2_9_8 0xF40B
#define cfoe_lf_c2_9_8_pos 0
#define cfoe_lf_c2_9_8_len 2
#define cfoe_lf_c2_9_8_lsb 8
#define xd_p_cfoe_ifod_7_0  (*(volatile byte xdata *) 0xF40C)
#define    p_cfoe_ifod_7_0  0xF40C
#define cfoe_ifod_7_0_pos 0
#define cfoe_ifod_7_0_len 8
#define cfoe_ifod_7_0_lsb 0
#define xd_p_cfoe_ifod_10_8 (*(volatile byte xdata *) 0xF40D)
#define    p_cfoe_ifod_10_8 0xF40D
#define cfoe_ifod_10_8_pos 0
#define cfoe_ifod_10_8_len 3
#define cfoe_ifod_10_8_lsb 8
#define xd_p_cfoe_Divg_ctr_th   (*(volatile byte xdata *) 0xF40E)
#define    p_cfoe_Divg_ctr_th   0xF40E
#define cfoe_Divg_ctr_th_pos 0
#define cfoe_Divg_ctr_th_len 4
#define cfoe_Divg_ctr_th_lsb 0
#define xd_p_cfoe_FOT_divg_th   (*(volatile byte xdata *) 0xF40F)
#define    p_cfoe_FOT_divg_th   0xF40F
#define cfoe_FOT_divg_th_pos 0
#define cfoe_FOT_divg_th_len 8
#define cfoe_FOT_divg_th_lsb 0
#define xd_p_cfoe_FOT_cnvg_th   (*(volatile byte xdata *) 0xF410)
#define    p_cfoe_FOT_cnvg_th   0xF410
#define cfoe_FOT_cnvg_th_pos 0
#define cfoe_FOT_cnvg_th_len 8
#define cfoe_FOT_cnvg_th_lsb 0
#define xd_p_reg_cfoe_offset_7_0    (*(volatile byte xdata *) 0xF411)
#define    p_reg_cfoe_offset_7_0    0xF411
#define reg_cfoe_offset_7_0_pos 0
#define reg_cfoe_offset_7_0_len 8
#define reg_cfoe_offset_7_0_lsb 0
#define xd_p_reg_cfoe_offset_10_8   (*(volatile byte xdata *) 0xF412)
#define    p_reg_cfoe_offset_10_8   0xF412
#define reg_cfoe_offset_10_8_pos 0
#define reg_cfoe_offset_10_8_len 3
#define reg_cfoe_offset_10_8_lsb 8
#define xd_p_reg_cfoe_ifoe_sign_corr    (*(volatile byte xdata *) 0xF413)
#define    p_reg_cfoe_ifoe_sign_corr    0xF413
#define reg_cfoe_ifoe_sign_corr_pos 0
#define reg_cfoe_ifoe_sign_corr_len 1
#define reg_cfoe_ifoe_sign_corr_lsb 0
#define xd_p_cfoe_FOT_pullin_cnt_clr    (*(volatile byte xdata *) 0xF414)
#define    p_cfoe_FOT_pullin_cnt_clr    0xF414
#define cfoe_FOT_pullin_cnt_clr_pos 0
#define cfoe_FOT_pullin_cnt_clr_len 1
#define cfoe_FOT_pullin_cnt_clr_lsb 0
#define xd_p_cfoe_FOT_spec_inv  (*(volatile byte xdata *) 0xF415)
#define    p_cfoe_FOT_spec_inv  0xF415
#define cfoe_FOT_spec_inv_pos 0
#define cfoe_FOT_spec_inv_len 1
#define cfoe_FOT_spec_inv_lsb 0
#define xd_p_cfoe_FOT_pullin_ctr_th (*(volatile byte xdata *) 0xF416)
#define    p_cfoe_FOT_pullin_ctr_th 0xF416
#define cfoe_FOT_pullin_ctr_th_pos 0
#define cfoe_FOT_pullin_ctr_th_len 4
#define cfoe_FOT_pullin_ctr_th_lsb 0
#define xd_p_cfoe_FOT_sf_ctr_th (*(volatile byte xdata *) 0xF417)
#define    p_cfoe_FOT_sf_ctr_th 0xF417
#define cfoe_FOT_sf_ctr_th_pos 0
#define cfoe_FOT_sf_ctr_th_len 4
#define cfoe_FOT_sf_ctr_th_lsb 0
#define xd_p_cfoe_FOT_pullin_th (*(volatile byte xdata *) 0xF418)
#define    p_cfoe_FOT_pullin_th 0xF418
#define cfoe_FOT_pullin_th_pos 0
#define cfoe_FOT_pullin_th_len 8
#define cfoe_FOT_pullin_th_lsb 0
#define xd_p_cfoe_FOT_kalman_cnt    (*(volatile byte xdata *) 0xF419)
#define    p_cfoe_FOT_kalman_cnt    0xF419
#define cfoe_FOT_kalman_cnt_pos 0
#define cfoe_FOT_kalman_cnt_len 4
#define cfoe_FOT_kalman_cnt_lsb 0
#define xd_p_cfoe_FOT_fsm_info  (*(volatile byte xdata *) 0xF41A)
#define    p_cfoe_FOT_fsm_info  0xF41A
#define cfoe_FOT_fsm_info_pos 0
#define cfoe_FOT_fsm_info_len 4
#define cfoe_FOT_fsm_info_lsb 0
#define xd_r_cfoe_FOT_pullin_cnt    (*(volatile byte xdata *) 0xF41B)
#define    r_cfoe_FOT_pullin_cnt    0xF41B
#define cfoe_FOT_pullin_cnt_pos 0
#define cfoe_FOT_pullin_cnt_len 4
#define cfoe_FOT_pullin_cnt_lsb 0
#define xd_r_cfoe_FOT_sf_cnt    (*(volatile byte xdata *) 0xF41C)
#define    r_cfoe_FOT_sf_cnt    0xF41C
#define cfoe_FOT_sf_cnt_pos 0
#define cfoe_FOT_sf_cnt_len 4
#define cfoe_FOT_sf_cnt_lsb 0
#define xd_r_reg_r_cfoe_ifoe_ifo_metric (*(volatile byte xdata *) 0xF41D)
#define    r_reg_r_cfoe_ifoe_ifo_metric 0xF41D
#define reg_r_cfoe_ifoe_ifo_metric_pos 0
#define reg_r_cfoe_ifoe_ifo_metric_len 8
#define reg_r_cfoe_ifoe_ifo_metric_lsb 0
#define xd_r_reg_r_cfoe_ifoe_cos2num_7_0    (*(volatile byte xdata *) 0xF41E)
#define    r_reg_r_cfoe_ifoe_cos2num_7_0    0xF41E
#define reg_r_cfoe_ifoe_cos2num_7_0_pos 0
#define reg_r_cfoe_ifoe_cos2num_7_0_len 8
#define reg_r_cfoe_ifoe_cos2num_7_0_lsb 0
#define xd_r_reg_r_cfoe_ifoe_cos2num_15_8   (*(volatile byte xdata *) 0xF41F)
#define    r_reg_r_cfoe_ifoe_cos2num_15_8   0xF41F
#define reg_r_cfoe_ifoe_cos2num_15_8_pos 0
#define reg_r_cfoe_ifoe_cos2num_15_8_len 8
#define reg_r_cfoe_ifoe_cos2num_15_8_lsb 8
#define xd_r_reg_r_cfoe_ifoe_cos2num_19_16  (*(volatile byte xdata *) 0xF420)
#define    r_reg_r_cfoe_ifoe_cos2num_19_16  0xF420
#define reg_r_cfoe_ifoe_cos2num_19_16_pos 0
#define reg_r_cfoe_ifoe_cos2num_19_16_len 4
#define reg_r_cfoe_ifoe_cos2num_19_16_lsb 16
#define xd_p_ste_Nu (*(volatile byte xdata *) 0xF460)
#define    p_ste_Nu 0xF460
#define ste_Nu_pos 0
#define ste_Nu_len 3
#define ste_Nu_lsb 0
#define xd_p_ste_GI (*(volatile byte xdata *) 0xF461)
#define    p_ste_GI 0xF461
#define ste_GI_pos 0
#define ste_GI_len 3
#define ste_GI_lsb 0
#define xd_p_ste_symbol_num (*(volatile byte xdata *) 0xF463)
#define    p_ste_symbol_num 0xF463
#define ste_symbol_num_pos 0
#define ste_symbol_num_len 3
#define ste_symbol_num_lsb 0
#define xd_p_ste_sample_num (*(volatile byte xdata *) 0xF464)
#define    p_ste_sample_num 0xF464
#define ste_sample_num_pos 0
#define ste_sample_num_len 2
#define ste_sample_num_lsb 0
#define xd_p_ste_symbol_num_4K  (*(volatile byte xdata *) 0xF465)
#define    p_ste_symbol_num_4K  0xF465
#define ste_symbol_num_4K_pos 0
#define ste_symbol_num_4K_len 3
#define ste_symbol_num_4K_lsb 0
#define xd_p_ste_FFT_offset_7_0 (*(volatile byte xdata *) 0xF466)
#define    p_ste_FFT_offset_7_0 0xF466
#define ste_FFT_offset_7_0_pos 0
#define ste_FFT_offset_7_0_len 8
#define ste_FFT_offset_7_0_lsb 0
#define xd_p_ste_FFT_offset_13_8    (*(volatile byte xdata *) 0xF467)
#define    p_ste_FFT_offset_13_8    0xF467
#define ste_FFT_offset_13_8_pos 0
#define ste_FFT_offset_13_8_len 6
#define ste_FFT_offset_13_8_lsb 8
#define xd_p_ste_sample_num_4K  (*(volatile byte xdata *) 0xF468)
#define    p_ste_sample_num_4K  0xF468
#define ste_sample_num_4K_pos 0
#define ste_sample_num_4K_len 2
#define ste_sample_num_4K_lsb 0
#define xd_p_ste_adv_start_7_0  (*(volatile byte xdata *) 0xF469)
#define    p_ste_adv_start_7_0  0xF469
#define ste_adv_start_7_0_pos 0
#define ste_adv_start_7_0_len 8
#define ste_adv_start_7_0_lsb 0
#define xd_p_ste_adv_start_10_8 (*(volatile byte xdata *) 0xF46A)
#define    p_ste_adv_start_10_8 0xF46A
#define ste_adv_start_10_8_pos 0
#define ste_adv_start_10_8_len 3
#define ste_adv_start_10_8_lsb 8
#define xd_p_ste_symbol_num_8K  (*(volatile byte xdata *) 0xF46B)
#define    p_ste_symbol_num_8K  0xF46B
#define ste_symbol_num_8K_pos 0
#define ste_symbol_num_8K_len 3
#define ste_symbol_num_8K_lsb 0
#define xd_p_ste_sample_num_8K  (*(volatile byte xdata *) 0xF46C)
#define    p_ste_sample_num_8K  0xF46C
#define ste_sample_num_8K_pos 0
#define ste_sample_num_8K_len 2
#define ste_sample_num_8K_lsb 0
#define xd_p_ste_adv_stop   (*(volatile byte xdata *) 0xF46D)
#define    p_ste_adv_stop   0xF46D
#define ste_adv_stop_pos 0
#define ste_adv_stop_len 8
#define ste_adv_stop_lsb 0
#define xd_r_ste_P_value_7_0    (*(volatile byte xdata *) 0xF46E)
#define    r_ste_P_value_7_0    0xF46E
#define ste_P_value_7_0_pos 0
#define ste_P_value_7_0_len 8
#define ste_P_value_7_0_lsb 0
#define xd_r_ste_P_value_10_8   (*(volatile byte xdata *) 0xF46F)
#define    r_ste_P_value_10_8   0xF46F
#define ste_P_value_10_8_pos 0
#define ste_P_value_10_8_len 3
#define ste_P_value_10_8_lsb 8
#define xd_p_reg_ste_tstmod (*(volatile byte xdata *) 0xF470)
#define    p_reg_ste_tstmod 0xF470
#define reg_ste_tstmod_pos 0
#define reg_ste_tstmod_len 1
#define reg_ste_tstmod_lsb 0
#define xd_p_reg_ste_buf_en (*(volatile byte xdata *) 0xF471)
#define    p_reg_ste_buf_en 0xF471
#define reg_ste_buf_en_pos 0
#define reg_ste_buf_en_len 1
#define reg_ste_buf_en_lsb 0
#define xd_r_ste_M_value_7_0    (*(volatile byte xdata *) 0xF472)
#define    r_ste_M_value_7_0    0xF472
#define ste_M_value_7_0_pos 0
#define ste_M_value_7_0_len 8
#define ste_M_value_7_0_lsb 0
#define xd_r_ste_M_value_10_8   (*(volatile byte xdata *) 0xF473)
#define    r_ste_M_value_10_8   0xF473
#define ste_M_value_10_8_pos 0
#define ste_M_value_10_8_len 3
#define ste_M_value_10_8_lsb 8
#define xd_r_ste_H1 (*(volatile byte xdata *) 0xF474)
#define    r_ste_H1 0xF474
#define ste_H1_pos 0
#define ste_H1_len 7
#define ste_H1_lsb 0
#define xd_r_ste_H2 (*(volatile byte xdata *) 0xF475)
#define    r_ste_H2 0xF475
#define ste_H2_pos 0
#define ste_H2_len 7
#define ste_H2_lsb 0
#define xd_r_ste_H3 (*(volatile byte xdata *) 0xF476)
#define    r_ste_H3 0xF476
#define ste_H3_pos 0
#define ste_H3_len 7
#define ste_H3_lsb 0
#define xd_r_ste_H4 (*(volatile byte xdata *) 0xF477)
#define    r_ste_H4 0xF477
#define ste_H4_pos 0
#define ste_H4_len 7
#define ste_H4_lsb 0
#define xd_r_ste_Corr_value_I_7_0   (*(volatile byte xdata *) 0xF478)
#define    r_ste_Corr_value_I_7_0   0xF478
#define ste_Corr_value_I_7_0_pos 0
#define ste_Corr_value_I_7_0_len 8
#define ste_Corr_value_I_7_0_lsb 0
#define xd_r_ste_Corr_value_I_15_8  (*(volatile byte xdata *) 0xF479)
#define    r_ste_Corr_value_I_15_8  0xF479
#define ste_Corr_value_I_15_8_pos 0
#define ste_Corr_value_I_15_8_len 8
#define ste_Corr_value_I_15_8_lsb 8
#define xd_r_ste_Corr_value_I_23_16 (*(volatile byte xdata *) 0xF47A)
#define    r_ste_Corr_value_I_23_16 0xF47A
#define ste_Corr_value_I_23_16_pos 0
#define ste_Corr_value_I_23_16_len 8
#define ste_Corr_value_I_23_16_lsb 16
#define xd_r_ste_Corr_value_I_27_24 (*(volatile byte xdata *) 0xF47B)
#define    r_ste_Corr_value_I_27_24 0xF47B
#define ste_Corr_value_I_27_24_pos 0
#define ste_Corr_value_I_27_24_len 4
#define ste_Corr_value_I_27_24_lsb 24
#define xd_r_ste_Corr_value_Q_7_0   (*(volatile byte xdata *) 0xF47C)
#define    r_ste_Corr_value_Q_7_0   0xF47C
#define ste_Corr_value_Q_7_0_pos 0
#define ste_Corr_value_Q_7_0_len 8
#define ste_Corr_value_Q_7_0_lsb 0
#define xd_r_ste_Corr_value_Q_15_8  (*(volatile byte xdata *) 0xF47D)
#define    r_ste_Corr_value_Q_15_8  0xF47D
#define ste_Corr_value_Q_15_8_pos 0
#define ste_Corr_value_Q_15_8_len 8
#define ste_Corr_value_Q_15_8_lsb 8
#define xd_r_ste_Corr_value_Q_23_16 (*(volatile byte xdata *) 0xF47E)
#define    r_ste_Corr_value_Q_23_16 0xF47E
#define ste_Corr_value_Q_23_16_pos 0
#define ste_Corr_value_Q_23_16_len 8
#define ste_Corr_value_Q_23_16_lsb 16
#define xd_r_ste_Corr_value_Q_27_24 (*(volatile byte xdata *) 0xF47F)
#define    r_ste_Corr_value_Q_27_24 0xF47F
#define ste_Corr_value_Q_27_24_pos 0
#define ste_Corr_value_Q_27_24_len 4
#define ste_Corr_value_Q_27_24_lsb 24
#define xd_r_ste_J_num_7_0  (*(volatile byte xdata *) 0xF480)
#define    r_ste_J_num_7_0  0xF480
#define ste_J_num_7_0_pos 0
#define ste_J_num_7_0_len 8
#define ste_J_num_7_0_lsb 0
#define xd_r_ste_J_num_15_8 (*(volatile byte xdata *) 0xF481)
#define    r_ste_J_num_15_8 0xF481
#define ste_J_num_15_8_pos 0
#define ste_J_num_15_8_len 8
#define ste_J_num_15_8_lsb 8
#define xd_r_ste_J_num_23_16    (*(volatile byte xdata *) 0xF482)
#define    r_ste_J_num_23_16    0xF482
#define ste_J_num_23_16_pos 0
#define ste_J_num_23_16_len 8
#define ste_J_num_23_16_lsb 16
#define xd_r_ste_J_num_31_24    (*(volatile byte xdata *) 0xF483)
#define    r_ste_J_num_31_24    0xF483
#define ste_J_num_31_24_pos 0
#define ste_J_num_31_24_len 8
#define ste_J_num_31_24_lsb 24
#define xd_r_ste_J_den_7_0  (*(volatile byte xdata *) 0xF484)
#define    r_ste_J_den_7_0  0xF484
#define ste_J_den_7_0_pos 0
#define ste_J_den_7_0_len 8
#define ste_J_den_7_0_lsb 0
#define xd_r_ste_J_den_15_8 (*(volatile byte xdata *) 0xF485)
#define    r_ste_J_den_15_8 0xF485
#define ste_J_den_15_8_pos 0
#define ste_J_den_15_8_len 8
#define ste_J_den_15_8_lsb 8
#define xd_r_ste_J_den_18_16    (*(volatile byte xdata *) 0xF486)
#define    r_ste_J_den_18_16    0xF486
#define ste_J_den_18_16_pos 0
#define ste_J_den_18_16_len 3
#define ste_J_den_18_16_lsb 16
#define xd_r_ste_Beacon_Indicator   (*(volatile byte xdata *) 0xF488)
#define    r_ste_Beacon_Indicator   0xF488
#define ste_Beacon_Indicator_pos 0
#define ste_Beacon_Indicator_len 1
#define ste_Beacon_Indicator_lsb 0
#define xd_p_ste_got_sntc_bcn   (*(volatile byte xdata *) 0xF48B)
#define    p_ste_got_sntc_bcn   0xF48B
#define ste_got_sntc_bcn_pos 0
#define ste_got_sntc_bcn_len 1
#define ste_got_sntc_bcn_lsb 0
#define xd_r_tpsd_Frame_Num (*(volatile byte xdata *) 0xF4C0)
#define    r_tpsd_Frame_Num 0xF4C0
#define tpsd_Frame_Num_pos 0
#define tpsd_Frame_Num_len 2
#define tpsd_Frame_Num_lsb 0
#define xd_r_tpsd_Constel   (*(volatile byte xdata *) 0xF4C1)
#define    r_tpsd_Constel   0xF4C1
#define tpsd_Constel_pos 0
#define tpsd_Constel_len 2
#define tpsd_Constel_lsb 0
#define xd_r_tpsd_GI    (*(volatile byte xdata *) 0xF4C2)
#define    r_tpsd_GI    0xF4C2
#define tpsd_GI_pos 0
#define tpsd_GI_len 2
#define tpsd_GI_lsb 0
#define xd_r_tpsd_Mode  (*(volatile byte xdata *) 0xF4C3)
#define    r_tpsd_Mode  0xF4C3
#define tpsd_Mode_pos 0
#define tpsd_Mode_len 2
#define tpsd_Mode_lsb 0
#define xd_r_tpsd_CR_HP (*(volatile byte xdata *) 0xF4C4)
#define    r_tpsd_CR_HP 0xF4C4
#define tpsd_CR_HP_pos 0
#define tpsd_CR_HP_len 3
#define tpsd_CR_HP_lsb 0
#define xd_r_tpsd_CR_LP (*(volatile byte xdata *) 0xF4C5)
#define    r_tpsd_CR_LP 0xF4C5
#define tpsd_CR_LP_pos 0
#define tpsd_CR_LP_len 3
#define tpsd_CR_LP_lsb 0
#define xd_r_tpsd_Hie   (*(volatile byte xdata *) 0xF4C6)
#define    r_tpsd_Hie   0xF4C6
#define tpsd_Hie_pos 0
#define tpsd_Hie_len 3
#define tpsd_Hie_lsb 0
#define xd_r_tpsd_Res_Bits  (*(volatile byte xdata *) 0xF4C7)
#define    r_tpsd_Res_Bits  0xF4C7
#define tpsd_Res_Bits_pos 0
#define tpsd_Res_Bits_len 5
#define tpsd_Res_Bits_lsb 0
#define xd_r_tpsd_Res_Bits_0    (*(volatile byte xdata *) 0xF4C8)
#define    r_tpsd_Res_Bits_0    0xF4C8
#define tpsd_Res_Bits_0_pos 0
#define tpsd_Res_Bits_0_len 1
#define tpsd_Res_Bits_0_lsb 0
#define xd_r_tpsd_LengthInd (*(volatile byte xdata *) 0xF4C9)
#define    r_tpsd_LengthInd 0xF4C9
#define tpsd_LengthInd_pos 0
#define tpsd_LengthInd_len 6
#define tpsd_LengthInd_lsb 0
#define xd_r_tpsd_Cell_Id_7_0   (*(volatile byte xdata *) 0xF4CA)
#define    r_tpsd_Cell_Id_7_0   0xF4CA
#define tpsd_Cell_Id_7_0_pos 0
#define tpsd_Cell_Id_7_0_len 8
#define tpsd_Cell_Id_7_0_lsb 0
#define xd_r_tpsd_Cell_Id_15_8  (*(volatile byte xdata *) 0xF4CB)
#define    r_tpsd_Cell_Id_15_8  0xF4CB
#define tpsd_Cell_Id_15_8_pos 0
#define tpsd_Cell_Id_15_8_len 8
#define tpsd_Cell_Id_15_8_lsb 0
#define xd_r_tpsd_use_InDepthInt    (*(volatile byte xdata *) 0xF4CC)
#define    r_tpsd_use_InDepthInt    0xF4CC
#define tpsd_use_InDepthInt_pos 0
#define tpsd_use_InDepthInt_len 1
#define tpsd_use_InDepthInt_lsb 0
#define xd_r_tpsd_use_TimeSlicing_HP    (*(volatile byte xdata *) 0xF4CD)
#define    r_tpsd_use_TimeSlicing_HP    0xF4CD
#define tpsd_use_TimeSlicing_HP_pos 0
#define tpsd_use_TimeSlicing_HP_len 1
#define tpsd_use_TimeSlicing_HP_lsb 0
#define xd_r_tpsd_use_mpe_fec_HP    (*(volatile byte xdata *) 0xF4CE)
#define    r_tpsd_use_mpe_fec_HP    0xF4CE
#define tpsd_use_mpe_fec_HP_pos 0
#define tpsd_use_mpe_fec_HP_len 1
#define tpsd_use_mpe_fec_HP_lsb 0
#define xd_r_tpsd_use_TimeSlicing_LP    (*(volatile byte xdata *) 0xF4CF)
#define    r_tpsd_use_TimeSlicing_LP    0xF4CF
#define tpsd_use_TimeSlicing_LP_pos 0
#define tpsd_use_TimeSlicing_LP_len 1
#define tpsd_use_TimeSlicing_LP_lsb 0
#define xd_r_tpsd_use_mpe_fec_LP    (*(volatile byte xdata *) 0xF4D0)
#define    r_tpsd_use_mpe_fec_LP    0xF4D0
#define tpsd_use_mpe_fec_LP_pos 0
#define tpsd_use_mpe_fec_LP_len 1
#define tpsd_use_mpe_fec_LP_lsb 0
#define xd_r_tpsd_leng23_ind_return (*(volatile byte xdata *) 0xF4D1)
#define    r_tpsd_leng23_ind_return 0xF4D1
#define tpsd_leng23_ind_return_pos 0
#define tpsd_leng23_ind_return_len 1
#define tpsd_leng23_ind_return_lsb 0
#define xd_p_reg_fft_re_exp (*(volatile byte xdata *) 0xF500)
#define    p_reg_fft_re_exp 0xF500
#define reg_fft_re_exp_pos 0
#define reg_fft_re_exp_len 4
#define reg_fft_re_exp_lsb 0
#define xd_p_reg_fft_re_mts (*(volatile byte xdata *) 0xF501)
#define    p_reg_fft_re_mts 0xF501
#define reg_fft_re_mts_pos 0
#define reg_fft_re_mts_len 8
#define reg_fft_re_mts_lsb 0
#define xd_p_reg_fft_im_exp (*(volatile byte xdata *) 0xF502)
#define    p_reg_fft_im_exp 0xF502
#define reg_fft_im_exp_pos 0
#define reg_fft_im_exp_len 4
#define reg_fft_im_exp_lsb 0
#define xd_p_reg_fft_im_mts (*(volatile byte xdata *) 0xF503)
#define    p_reg_fft_im_mts 0xF503
#define reg_fft_im_mts_pos 0
#define reg_fft_im_mts_len 8
#define reg_fft_im_mts_lsb 0
#define xd_p_reg_fft_conjugate  (*(volatile byte xdata *) 0xF504)
#define    p_reg_fft_conjugate  0xF504
#define reg_fft_conjugate_pos 0
#define reg_fft_conjugate_len 1
#define reg_fft_conjugate_lsb 0
#define xd_p_reg_fft_power_en   (*(volatile byte xdata *) 0xF505)
#define    p_reg_fft_power_en   0xF505
#define reg_fft_power_en_pos 0
#define reg_fft_power_en_len 1
#define reg_fft_power_en_lsb 0
#define xd_p_reg_fft_power_factor   (*(volatile byte xdata *) 0xF506)
#define    p_reg_fft_power_factor   0xF506
#define reg_fft_power_factor_pos 0
#define reg_fft_power_factor_len 6
#define reg_fft_power_factor_lsb 0
#define xd_p_reg_fft_power_in   (*(volatile byte xdata *) 0xF507)
#define    p_reg_fft_power_in   0xF507
#define reg_fft_power_in_pos 0
#define reg_fft_power_in_len 8
#define reg_fft_power_in_lsb 0
#define xd_p_reg_fft_mask_from0_7_0 (*(volatile byte xdata *) 0xF508)
#define    p_reg_fft_mask_from0_7_0 0xF508
#define reg_fft_mask_from0_7_0_pos 0
#define reg_fft_mask_from0_7_0_len 8
#define reg_fft_mask_from0_7_0_lsb 0
#define xd_p_reg_fft_mask_from0_12_8    (*(volatile byte xdata *) 0xF509)
#define    p_reg_fft_mask_from0_12_8    0xF509
#define reg_fft_mask_from0_12_8_pos 0
#define reg_fft_mask_from0_12_8_len 5
#define reg_fft_mask_from0_12_8_lsb 8
#define xd_p_reg_fft_mask_to0_7_0   (*(volatile byte xdata *) 0xF50A)
#define    p_reg_fft_mask_to0_7_0   0xF50A
#define reg_fft_mask_to0_7_0_pos 0
#define reg_fft_mask_to0_7_0_len 8
#define reg_fft_mask_to0_7_0_lsb 0
#define xd_p_reg_fft_mask_to0_12_8  (*(volatile byte xdata *) 0xF50B)
#define    p_reg_fft_mask_to0_12_8  0xF50B
#define reg_fft_mask_to0_12_8_pos 0
#define reg_fft_mask_to0_12_8_len 5
#define reg_fft_mask_to0_12_8_lsb 8
#define xd_p_reg_fft_mask_from1_7_0 (*(volatile byte xdata *) 0xF50C)
#define    p_reg_fft_mask_from1_7_0 0xF50C
#define reg_fft_mask_from1_7_0_pos 0
#define reg_fft_mask_from1_7_0_len 8
#define reg_fft_mask_from1_7_0_lsb 0
#define xd_p_reg_fft_mask_from1_12_8    (*(volatile byte xdata *) 0xF50D)
#define    p_reg_fft_mask_from1_12_8    0xF50D
#define reg_fft_mask_from1_12_8_pos 0
#define reg_fft_mask_from1_12_8_len 5
#define reg_fft_mask_from1_12_8_lsb 8
#define xd_p_reg_fft_mask_to1_7_0   (*(volatile byte xdata *) 0xF50E)
#define    p_reg_fft_mask_to1_7_0   0xF50E
#define reg_fft_mask_to1_7_0_pos 0
#define reg_fft_mask_to1_7_0_len 8
#define reg_fft_mask_to1_7_0_lsb 0
#define xd_p_reg_fft_mask_to1_12_8  (*(volatile byte xdata *) 0xF50F)
#define    p_reg_fft_mask_to1_12_8  0xF50F
#define reg_fft_mask_to1_12_8_pos 0
#define reg_fft_mask_to1_12_8_len 5
#define reg_fft_mask_to1_12_8_lsb 8
#define xd_p_reg_fft_mask_from2_7_0 (*(volatile byte xdata *) 0xF510)
#define    p_reg_fft_mask_from2_7_0 0xF510
#define reg_fft_mask_from2_7_0_pos 0
#define reg_fft_mask_from2_7_0_len 8
#define reg_fft_mask_from2_7_0_lsb 0
#define xd_p_reg_fft_mask_from2_12_8    (*(volatile byte xdata *) 0xF511)
#define    p_reg_fft_mask_from2_12_8    0xF511
#define reg_fft_mask_from2_12_8_pos 0
#define reg_fft_mask_from2_12_8_len 5
#define reg_fft_mask_from2_12_8_lsb 8
#define xd_p_reg_fft_mask_to2_7_0   (*(volatile byte xdata *) 0xF512)
#define    p_reg_fft_mask_to2_7_0   0xF512
#define reg_fft_mask_to2_7_0_pos 0
#define reg_fft_mask_to2_7_0_len 8
#define reg_fft_mask_to2_7_0_lsb 0
#define xd_p_reg_fft_mask_to2_12_8  (*(volatile byte xdata *) 0xF513)
#define    p_reg_fft_mask_to2_12_8  0xF513
#define reg_fft_mask_to2_12_8_pos 0
#define reg_fft_mask_to2_12_8_len 5
#define reg_fft_mask_to2_12_8_lsb 8
#define xd_p_reg_fft_mask_from3_7_0 (*(volatile byte xdata *) 0xF514)
#define    p_reg_fft_mask_from3_7_0 0xF514
#define reg_fft_mask_from3_7_0_pos 0
#define reg_fft_mask_from3_7_0_len 8
#define reg_fft_mask_from3_7_0_lsb 0
#define xd_p_reg_fft_mask_from3_12_8    (*(volatile byte xdata *) 0xF515)
#define    p_reg_fft_mask_from3_12_8    0xF515
#define reg_fft_mask_from3_12_8_pos 0
#define reg_fft_mask_from3_12_8_len 5
#define reg_fft_mask_from3_12_8_lsb 8
#define xd_p_reg_fft_mask_to3_7_0   (*(volatile byte xdata *) 0xF516)
#define    p_reg_fft_mask_to3_7_0   0xF516
#define reg_fft_mask_to3_7_0_pos 0
#define reg_fft_mask_to3_7_0_len 8
#define reg_fft_mask_to3_7_0_lsb 0
#define xd_p_reg_fft_mask_to3_12_8  (*(volatile byte xdata *) 0xF517)
#define    p_reg_fft_mask_to3_12_8  0xF517
#define reg_fft_mask_to3_12_8_pos 0
#define reg_fft_mask_to3_12_8_len 5
#define reg_fft_mask_to3_12_8_lsb 8
#define xd_r_fd_sntc_frame_num  (*(volatile byte xdata *) 0xF518)
#define    r_fd_sntc_frame_num  0xF518
#define fd_sntc_frame_num_pos 0
#define fd_sntc_frame_num_len 2
#define fd_sntc_frame_num_lsb 0
#define xd_r_fd_sntc_symbol_count   (*(volatile byte xdata *) 0xF519)
#define    r_fd_sntc_symbol_count   0xF519
#define fd_sntc_symbol_count_pos 0
#define fd_sntc_symbol_count_len 7
#define fd_sntc_symbol_count_lsb 0
#define xd_p_reg_sntc_cnt_lo    (*(volatile byte xdata *) 0xF51A)
#define    p_reg_sntc_cnt_lo    0xF51A
#define reg_sntc_cnt_lo_pos 0
#define reg_sntc_cnt_lo_len 8
#define reg_sntc_cnt_lo_lsb 0
#define xd_p_reg_sntc_cnt_hi    (*(volatile byte xdata *) 0xF51B)
#define    p_reg_sntc_cnt_hi    0xF51B
#define reg_sntc_cnt_hi_pos 0
#define reg_sntc_cnt_hi_len 7
#define reg_sntc_cnt_hi_lsb 0
#define xd_p_reg_sntc_fft_in    (*(volatile byte xdata *) 0xF51C)
#define    p_reg_sntc_fft_in    0xF51C
#define reg_sntc_fft_in_pos 0
#define reg_sntc_fft_in_len 1
#define reg_sntc_fft_in_lsb 0
#define xd_r_fd_sntc_en (*(volatile byte xdata *) 0xF51D)
#define    r_fd_sntc_en 0xF51D
#define fd_sntc_en_pos 0
#define fd_sntc_en_len 1
#define fd_sntc_en_lsb 0
#define xd_p_reg_sntc_x2    (*(volatile byte xdata *) 0xF51E)
#define    p_reg_sntc_x2    0xF51E
#define reg_sntc_x2_pos 0
#define reg_sntc_x2_len 1
#define reg_sntc_x2_lsb 0
#define xd_p_reg_cge_en_7_0 (*(volatile byte xdata *) 0xF51F)
#define    p_reg_cge_en_7_0 0xF51F
#define reg_cge_en_7_0_pos 0
#define reg_cge_en_7_0_len 8
#define reg_cge_en_7_0_lsb 0
#define xd_p_reg_cge_en_15_8    (*(volatile byte xdata *) 0xF520)
#define    p_reg_cge_en_15_8    0xF520
#define reg_cge_en_15_8_pos 0
#define reg_cge_en_15_8_len 8
#define reg_cge_en_15_8_lsb 8
#define xd_p_reg_cge_en_23_16   (*(volatile byte xdata *) 0xF521)
#define    p_reg_cge_en_23_16   0xF521
#define reg_cge_en_23_16_pos 0
#define reg_cge_en_23_16_len 8
#define reg_cge_en_23_16_lsb 16
#define xd_p_reg_cge_en_31_24   (*(volatile byte xdata *) 0xF522)
#define    p_reg_cge_en_31_24   0xF522
#define reg_cge_en_31_24_pos 0
#define reg_cge_en_31_24_len 8
#define reg_cge_en_31_24_lsb 24
#define xd_p_reg_cge_en_39_32   (*(volatile byte xdata *) 0xF523)
#define    p_reg_cge_en_39_32   0xF523
#define reg_cge_en_39_32_pos 0
#define reg_cge_en_39_32_len 8
#define reg_cge_en_39_32_lsb 32
#define xd_p_reg_cge_en_43_40   (*(volatile byte xdata *) 0xF524)
#define    p_reg_cge_en_43_40   0xF524
#define reg_cge_en_43_40_pos 0
#define reg_cge_en_43_40_len 4
#define reg_cge_en_43_40_lsb 40
#define xd_p_reg_fft_sat_en (*(volatile byte xdata *) 0xF525)
#define    p_reg_fft_sat_en 0xF525
#define reg_fft_sat_en_pos 0
#define reg_fft_sat_en_len 1
#define reg_fft_sat_en_lsb 0
#define xd_p_reg_fft_sat_count_clr  (*(volatile byte xdata *) 0xF526)
#define    p_reg_fft_sat_count_clr  0xF526
#define reg_fft_sat_count_clr_pos 0
#define reg_fft_sat_count_clr_len 1
#define reg_fft_sat_count_clr_lsb 0
#define xd_p_reg_fft_rescale_round  (*(volatile byte xdata *) 0xF527)
#define    p_reg_fft_rescale_round  0xF527
#define reg_fft_rescale_round_pos 0
#define reg_fft_rescale_round_len 1
#define reg_fft_rescale_round_lsb 0
#define xd_r_reg_fft_sat_count_12_7_0   (*(volatile byte xdata *) 0xF528)
#define    r_reg_fft_sat_count_12_7_0   0xF528
#define reg_fft_sat_count_12_7_0_pos 0
#define reg_fft_sat_count_12_7_0_len 8
#define reg_fft_sat_count_12_7_0_lsb 0
#define xd_r_reg_fft_sat_count_12_15_8  (*(volatile byte xdata *) 0xF529)
#define    r_reg_fft_sat_count_12_15_8  0xF529
#define reg_fft_sat_count_12_15_8_pos 0
#define reg_fft_sat_count_12_15_8_len 8
#define reg_fft_sat_count_12_15_8_lsb 8
#define xd_r_reg_fft_sat_count_10_7_0   (*(volatile byte xdata *) 0xF52A)
#define    r_reg_fft_sat_count_10_7_0   0xF52A
#define reg_fft_sat_count_10_7_0_pos 0
#define reg_fft_sat_count_10_7_0_len 8
#define reg_fft_sat_count_10_7_0_lsb 0
#define xd_r_reg_fft_sat_count_10_15_8  (*(volatile byte xdata *) 0xF52B)
#define    r_reg_fft_sat_count_10_15_8  0xF52B
#define reg_fft_sat_count_10_15_8_pos 0
#define reg_fft_sat_count_10_15_8_len 8
#define reg_fft_sat_count_10_15_8_lsb 8
#define xd_p_reg_fft_capture_idx_7_0    (*(volatile byte xdata *) 0xF52C)
#define    p_reg_fft_capture_idx_7_0    0xF52C
#define reg_fft_capture_idx_7_0_pos 0
#define reg_fft_capture_idx_7_0_len 8
#define reg_fft_capture_idx_7_0_lsb 0
#define xd_p_reg_fft_capture_idx_12_8   (*(volatile byte xdata *) 0xF52D)
#define    p_reg_fft_capture_idx_12_8   0xF52D
#define reg_fft_capture_idx_12_8_pos 0
#define reg_fft_capture_idx_12_8_len 5
#define reg_fft_capture_idx_12_8_lsb 8
#define xd_p_reg_fft_capture    (*(volatile byte xdata *) 0xF52E)
#define    p_reg_fft_capture    0xF52E
#define reg_fft_capture_pos 0
#define reg_fft_capture_len 1
#define reg_fft_capture_lsb 0
#define xd_p_reg_gp_trigger_fd  (*(volatile byte xdata *) 0xF52F)
#define    p_reg_gp_trigger_fd  0xF52F
#define reg_gp_trigger_fd_pos 0
#define reg_gp_trigger_fd_len 1
#define reg_gp_trigger_fd_lsb 0
#define xd_p_reg_trigger_sel_fd (*(volatile byte xdata *) 0xF530)
#define    p_reg_trigger_sel_fd 0xF530
#define reg_trigger_sel_fd_pos 0
#define reg_trigger_sel_fd_len 2
#define reg_trigger_sel_fd_lsb 0
#define xd_p_reg_trigger_module_sel_fd  (*(volatile byte xdata *) 0xF531)
#define    p_reg_trigger_module_sel_fd  0xF531
#define reg_trigger_module_sel_fd_pos 0
#define reg_trigger_module_sel_fd_len 6
#define reg_trigger_module_sel_fd_lsb 0
#define xd_p_reg_trigger_set_sel_fd (*(volatile byte xdata *) 0xF532)
#define    p_reg_trigger_set_sel_fd 0xF532
#define reg_trigger_set_sel_fd_pos 0
#define reg_trigger_set_sel_fd_len 6
#define reg_trigger_set_sel_fd_lsb 0
#define xd_r_reg_fft_idx_pre_max_7_0    (*(volatile byte xdata *) 0xF533)
#define    r_reg_fft_idx_pre_max_7_0    0xF533
#define reg_fft_idx_pre_max_7_0_pos 0
#define reg_fft_idx_pre_max_7_0_len 8
#define reg_fft_idx_pre_max_7_0_lsb 0
#define xd_r_reg_fft_idx_pre_max_12_8   (*(volatile byte xdata *) 0xF534)
#define    r_reg_fft_idx_pre_max_12_8   0xF534
#define reg_fft_idx_pre_max_12_8_pos 0
#define reg_fft_idx_pre_max_12_8_len 5
#define reg_fft_idx_pre_max_12_8_lsb 8
#define xd_r_reg_fft_crc    (*(volatile byte xdata *) 0xF535)
#define    r_reg_fft_crc    0xF535
#define reg_fft_crc_pos 0
#define reg_fft_crc_len 8
#define reg_fft_crc_lsb 0
#define xd_p_fd_fft_shift_max   (*(volatile byte xdata *) 0xF536)
#define    p_fd_fft_shift_max   0xF536
#define fd_fft_shift_max_pos 0
#define fd_fft_shift_max_len 4
#define fd_fft_shift_max_lsb 0
#define xd_p_fd_fft_frame_num   (*(volatile byte xdata *) 0xF537)
#define    p_fd_fft_frame_num   0xF537
#define fd_fft_frame_num_pos 0
#define fd_fft_frame_num_len 2
#define fd_fft_frame_num_lsb 0
#define xd_p_fd_fft_symbol_count    (*(volatile byte xdata *) 0xF538)
#define    p_fd_fft_symbol_count    0xF538
#define fd_fft_symbol_count_pos 0
#define fd_fft_symbol_count_len 7
#define fd_fft_symbol_count_lsb 0
#define xd_r_reg_fft_idx_max_7_0    (*(volatile byte xdata *) 0xF539)
#define    r_reg_fft_idx_max_7_0    0xF539
#define reg_fft_idx_max_7_0_pos 0
#define reg_fft_idx_max_7_0_len 8
#define reg_fft_idx_max_7_0_lsb 0
#define xd_r_reg_fft_idx_max_12_8   (*(volatile byte xdata *) 0xF53A)
#define    r_reg_fft_idx_max_12_8   0xF53A
#define reg_fft_idx_max_12_8_pos 0
#define reg_fft_idx_max_12_8_len 5
#define reg_fft_idx_max_12_8_lsb 8
#define xd_p_reg_fft_rotate_en  (*(volatile byte xdata *) 0xF53B)
#define    p_reg_fft_rotate_en  0xF53B
#define reg_fft_rotate_en_pos 0
#define reg_fft_rotate_en_len 1
#define reg_fft_rotate_en_lsb 0
#define xd_p_reg_fft_rotate_base_7_0    (*(volatile byte xdata *) 0xF53C)
#define    p_reg_fft_rotate_base_7_0    0xF53C
#define reg_fft_rotate_base_7_0_pos 0
#define reg_fft_rotate_base_7_0_len 8
#define reg_fft_rotate_base_7_0_lsb 0
#define xd_p_reg_fft_rotate_base_12_8   (*(volatile byte xdata *) 0xF53D)
#define    p_reg_fft_rotate_base_12_8   0xF53D
#define reg_fft_rotate_base_12_8_pos 0
#define reg_fft_rotate_base_12_8_len 5
#define reg_fft_rotate_base_12_8_lsb 8
#define xd_r_fd_fpcc_cp_corr_signn  (*(volatile byte xdata *) 0xF53E)
#define    r_fd_fpcc_cp_corr_signn  0xF53E
#define fd_fpcc_cp_corr_signn_pos 0
#define fd_fpcc_cp_corr_signn_len 8
#define fd_fpcc_cp_corr_signn_lsb 0
#define xd_p_reg_feq_s1 (*(volatile byte xdata *) 0xF53F)
#define    p_reg_feq_s1 0xF53F
#define reg_feq_s1_pos 0
#define reg_feq_s1_len 5
#define reg_feq_s1_lsb 0
#define xd_p_reg_feq_sat_ind    (*(volatile byte xdata *) 0xF540)
#define    p_reg_feq_sat_ind    0xF540
#define reg_feq_sat_ind_pos 0
#define reg_feq_sat_ind_len 3
#define reg_feq_sat_ind_lsb 0
#define xd_p_reg_p_csi_cal_en   (*(volatile byte xdata *) 0xF541)
#define    p_reg_p_csi_cal_en   0xF541
#define reg_p_csi_cal_en_pos 0
#define reg_p_csi_cal_en_len 1
#define reg_p_csi_cal_en_lsb 0
#define xd_p_reg_p_csi_ar_mode  (*(volatile byte xdata *) 0xF542)
#define    p_reg_p_csi_ar_mode  0xF542
#define reg_p_csi_ar_mode_pos 0
#define reg_p_csi_ar_mode_len 2
#define reg_p_csi_ar_mode_lsb 0
#define xd_p_reg_p_csi_accu_sym_num (*(volatile byte xdata *) 0xF543)
#define    p_reg_p_csi_accu_sym_num 0xF543
#define reg_p_csi_accu_sym_num_pos 0
#define reg_p_csi_accu_sym_num_len 8
#define reg_p_csi_accu_sym_num_lsb 0
#define xd_p_reg_p_csi_eh2_shift_thr    (*(volatile byte xdata *) 0xF544)
#define    p_reg_p_csi_eh2_shift_thr    0xF544
#define reg_p_csi_eh2_shift_thr_pos 0
#define reg_p_csi_eh2_shift_thr_len 4
#define reg_p_csi_eh2_shift_thr_lsb 0
#define xd_p_reg_p_feq_protect_eh2_shift_thr    (*(volatile byte xdata *) 0xF545)
#define    p_reg_p_feq_protect_eh2_shift_thr    0xF545
#define reg_p_feq_protect_eh2_shift_thr_pos 0
#define reg_p_feq_protect_eh2_shift_thr_len 4
#define reg_p_feq_protect_eh2_shift_thr_lsb 0
#define xd_p_reg_p_csi_error_accu_s1    (*(volatile byte xdata *) 0xF546)
#define    p_reg_p_csi_error_accu_s1    0xF546
#define reg_p_csi_error_accu_s1_pos 0
#define reg_p_csi_error_accu_s1_len 6
#define reg_p_csi_error_accu_s1_lsb 0
#define xd_p_reg_p_csi_shift2   (*(volatile byte xdata *) 0xF547)
#define    p_reg_p_csi_shift2   0xF547
#define reg_p_csi_shift2_pos 0
#define reg_p_csi_shift2_len 4
#define reg_p_csi_shift2_lsb 0
#define xd_p_reg_p_csi_mul2 (*(volatile byte xdata *) 0xF548)
#define    p_reg_p_csi_mul2 0xF548
#define reg_p_csi_mul2_pos 0
#define reg_p_csi_mul2_len 8
#define reg_p_csi_mul2_lsb 0
#define xd_p_reg_p_csi_level2_7_0   (*(volatile byte xdata *) 0xF549)
#define    p_reg_p_csi_level2_7_0   0xF549
#define reg_p_csi_level2_7_0_pos 0
#define reg_p_csi_level2_7_0_len 8
#define reg_p_csi_level2_7_0_lsb 0
#define xd_p_reg_p_csi_level2_8 (*(volatile byte xdata *) 0xF54A)
#define    p_reg_p_csi_level2_8 0xF54A
#define reg_p_csi_level2_8_pos 0
#define reg_p_csi_level2_8_len 1
#define reg_p_csi_level2_8_lsb 8
#define xd_p_reg_p_feq_protect_ratio    (*(volatile byte xdata *) 0xF54B)
#define    p_reg_p_feq_protect_ratio    0xF54B
#define reg_p_feq_protect_ratio_pos 0
#define reg_p_feq_protect_ratio_len 8
#define reg_p_feq_protect_ratio_lsb 0
#define xd_r_reg_csi_rdy    (*(volatile byte xdata *) 0xF54C)
#define    r_reg_csi_rdy    0xF54C
#define reg_csi_rdy_pos 0
#define reg_csi_rdy_len 1
#define reg_csi_rdy_lsb 0
#define xd_p_reg_p_feq_h2protect_en (*(volatile byte xdata *) 0xF54D)
#define    p_reg_p_feq_h2protect_en 0xF54D
#define reg_p_feq_h2protect_en_pos 0
#define reg_p_feq_h2protect_en_len 1
#define reg_p_feq_h2protect_en_lsb 0
#define xd_r_reg_tpsd_lock_f0   (*(volatile byte xdata *) 0xF54E)
#define    r_reg_tpsd_lock_f0   0xF54E
#define reg_tpsd_lock_f0_pos 0
#define reg_tpsd_lock_f0_len 1
#define reg_tpsd_lock_f0_lsb 0
#define xd_r_reg_tpsd_lock_f1   (*(volatile byte xdata *) 0xF54F)
#define    r_reg_tpsd_lock_f1   0xF54F
#define reg_tpsd_lock_f1_pos 0
#define reg_tpsd_lock_f1_len 1
#define reg_tpsd_lock_f1_lsb 0
#define xd_p_reg_p_csi_sp_idx_7_0   (*(volatile byte xdata *) 0xF550)
#define    p_reg_p_csi_sp_idx_7_0   0xF550
#define reg_p_csi_sp_idx_7_0_pos 0
#define reg_p_csi_sp_idx_7_0_len 8
#define reg_p_csi_sp_idx_7_0_lsb 0
#define xd_p_reg_p_csi_sp_idx_11_8  (*(volatile byte xdata *) 0xF551)
#define    p_reg_p_csi_sp_idx_11_8  0xF551
#define reg_p_csi_sp_idx_11_8_pos 0
#define reg_p_csi_sp_idx_11_8_len 4
#define reg_p_csi_sp_idx_11_8_lsb 8
#define xd_p_fd_fpcc_cp_corr_tone_th    (*(volatile byte xdata *) 0xF552)
#define    p_fd_fpcc_cp_corr_tone_th    0xF552
#define fd_fpcc_cp_corr_tone_th_pos 0
#define fd_fpcc_cp_corr_tone_th_len 6
#define fd_fpcc_cp_corr_tone_th_lsb 0
#define xd_p_fd_fpcc_cp_corr_symbol_log_th  (*(volatile byte xdata *) 0xF553)
#define    p_fd_fpcc_cp_corr_symbol_log_th  0xF553
#define fd_fpcc_cp_corr_symbol_log_th_pos 0
#define fd_fpcc_cp_corr_symbol_log_th_len 4
#define fd_fpcc_cp_corr_symbol_log_th_lsb 0
#define xd_p_fd_fpcc_cp_corr_int    (*(volatile byte xdata *) 0xF554)
#define    p_fd_fpcc_cp_corr_int    0xF554
#define fd_fpcc_cp_corr_int_pos 0
#define fd_fpcc_cp_corr_int_len 1
#define fd_fpcc_cp_corr_int_lsb 0
#define xd_p_reg_fpcc_cp_memidx (*(volatile byte xdata *) 0xF555)
#define    p_reg_fpcc_cp_memidx 0xF555
#define reg_fpcc_cp_memidx_pos 0
#define reg_fpcc_cp_memidx_len 8
#define reg_fpcc_cp_memidx_lsb 0
#define xd_p_reg_fpcc_cpmask_en (*(volatile byte xdata *) 0xF556)
#define    p_reg_fpcc_cpmask_en 0xF556
#define reg_fpcc_cpmask_en_pos 0
#define reg_fpcc_cpmask_en_len 1
#define reg_fpcc_cpmask_en_lsb 0
#define xd_p_reg_fpcc_cp_grpidx (*(volatile byte xdata *) 0xF557)
#define    p_reg_fpcc_cp_grpidx 0xF557
#define reg_fpcc_cp_grpidx_pos 0
#define reg_fpcc_cp_grpidx_len 5
#define reg_fpcc_cp_grpidx_lsb 0
#define xd_r_reg_fpcc_cp_sts    (*(volatile byte xdata *) 0xF558)
#define    r_reg_fpcc_cp_sts    0xF558
#define reg_fpcc_cp_sts_pos 0
#define reg_fpcc_cp_sts_len 1
#define reg_fpcc_cp_sts_lsb 0
#define xd_p_reg_sfoe_ns_7_0    (*(volatile byte xdata *) 0xF559)
#define    p_reg_sfoe_ns_7_0    0xF559
#define reg_sfoe_ns_7_0_pos 0
#define reg_sfoe_ns_7_0_len 8
#define reg_sfoe_ns_7_0_lsb 0
#define xd_p_reg_sfoe_ns_14_8   (*(volatile byte xdata *) 0xF55A)
#define    p_reg_sfoe_ns_14_8   0xF55A
#define reg_sfoe_ns_14_8_pos 0
#define reg_sfoe_ns_14_8_len 7
#define reg_sfoe_ns_14_8_lsb 8
#define xd_p_reg_sfoe_c1_7_0    (*(volatile byte xdata *) 0xF55B)
#define    p_reg_sfoe_c1_7_0    0xF55B
#define reg_sfoe_c1_7_0_pos 0
#define reg_sfoe_c1_7_0_len 8
#define reg_sfoe_c1_7_0_lsb 0
#define xd_p_reg_sfoe_c1_9_8    (*(volatile byte xdata *) 0xF55C)
#define    p_reg_sfoe_c1_9_8    0xF55C
#define reg_sfoe_c1_9_8_pos 0
#define reg_sfoe_c1_9_8_len 2
#define reg_sfoe_c1_9_8_lsb 8
#define xd_p_reg_sfoe_c2_7_0    (*(volatile byte xdata *) 0xF55D)
#define    p_reg_sfoe_c2_7_0    0xF55D
#define reg_sfoe_c2_7_0_pos 0
#define reg_sfoe_c2_7_0_len 8
#define reg_sfoe_c2_7_0_lsb 0
#define xd_p_reg_sfoe_c2_9_8    (*(volatile byte xdata *) 0xF55E)
#define    p_reg_sfoe_c2_9_8    0xF55E
#define reg_sfoe_c2_9_8_pos 0
#define reg_sfoe_c2_9_8_len 2
#define reg_sfoe_c2_9_8_lsb 8
#define xd_p_reg_sfoe_lm_counter_th (*(volatile byte xdata *) 0xF55F)
#define    p_reg_sfoe_lm_counter_th 0xF55F
#define reg_sfoe_lm_counter_th_pos 0
#define reg_sfoe_lm_counter_th_len 4
#define reg_sfoe_lm_counter_th_lsb 0
#define xd_p_reg_sfoe_spec_inv  (*(volatile byte xdata *) 0xF560)
#define    p_reg_sfoe_spec_inv  0xF560
#define reg_sfoe_spec_inv_pos 0
#define reg_sfoe_spec_inv_len 1
#define reg_sfoe_spec_inv_lsb 0
#define xd_p_reg_sfoe_convg_th  (*(volatile byte xdata *) 0xF561)
#define    p_reg_sfoe_convg_th  0xF561
#define reg_sfoe_convg_th_pos 0
#define reg_sfoe_convg_th_len 8
#define reg_sfoe_convg_th_lsb 0
#define xd_p_reg_sfoe_divg_th   (*(volatile byte xdata *) 0xF562)
#define    p_reg_sfoe_divg_th   0xF562
#define reg_sfoe_divg_th_pos 0
#define reg_sfoe_divg_th_len 8
#define reg_sfoe_divg_th_lsb 0
#define xd_p_reg_sfoe_pullin_ctr_th (*(volatile byte xdata *) 0xF563)
#define    p_reg_sfoe_pullin_ctr_th 0xF563
#define reg_sfoe_pullin_ctr_th_pos 0
#define reg_sfoe_pullin_ctr_th_len 4
#define reg_sfoe_pullin_ctr_th_lsb 0
#define xd_p_reg_sfoe_sf_ctr_th (*(volatile byte xdata *) 0xF564)
#define    p_reg_sfoe_sf_ctr_th 0xF564
#define reg_sfoe_sf_ctr_th_pos 0
#define reg_sfoe_sf_ctr_th_len 4
#define reg_sfoe_sf_ctr_th_lsb 0
#define xd_p_reg_sfoe_pullin_th (*(volatile byte xdata *) 0xF565)
#define    p_reg_sfoe_pullin_th 0xF565
#define reg_sfoe_pullin_th_pos 0
#define reg_sfoe_pullin_th_len 8
#define reg_sfoe_pullin_th_lsb 0
#define xd_p_reg_sfoe_kalman_cnt    (*(volatile byte xdata *) 0xF566)
#define    p_reg_sfoe_kalman_cnt    0xF566
#define reg_sfoe_kalman_cnt_pos 0
#define reg_sfoe_kalman_cnt_len 4
#define reg_sfoe_kalman_cnt_lsb 0
#define xd_p_reg_sfoe_fsm_info  (*(volatile byte xdata *) 0xF567)
#define    p_reg_sfoe_fsm_info  0xF567
#define reg_sfoe_fsm_info_pos 0
#define reg_sfoe_fsm_info_len 4
#define reg_sfoe_fsm_info_lsb 0
#define xd_r_reg_sfoe_pullin_cnt    (*(volatile byte xdata *) 0xF568)
#define    r_reg_sfoe_pullin_cnt    0xF568
#define reg_sfoe_pullin_cnt_pos 0
#define reg_sfoe_pullin_cnt_len 4
#define reg_sfoe_pullin_cnt_lsb 0
#define xd_r_reg_sfoe_sf_cnt    (*(volatile byte xdata *) 0xF569)
#define    r_reg_sfoe_sf_cnt    0xF569
#define reg_sfoe_sf_cnt_pos 0
#define reg_sfoe_sf_cnt_len 4
#define reg_sfoe_sf_cnt_lsb 0
#define xd_p_reg_fste_phase_ini_7_0 (*(volatile byte xdata *) 0xF56A)
#define    p_reg_fste_phase_ini_7_0 0xF56A
#define reg_fste_phase_ini_7_0_pos 0
#define reg_fste_phase_ini_7_0_len 8
#define reg_fste_phase_ini_7_0_lsb 0
#define xd_p_reg_fste_phase_ini_11_8    (*(volatile byte xdata *) 0xF56B)
#define    p_reg_fste_phase_ini_11_8    0xF56B
#define reg_fste_phase_ini_11_8_pos 0
#define reg_fste_phase_ini_11_8_len 4
#define reg_fste_phase_ini_11_8_lsb 8
#define xd_p_reg_fste_phase_inc_7_0 (*(volatile byte xdata *) 0xF56C)
#define    p_reg_fste_phase_inc_7_0 0xF56C
#define reg_fste_phase_inc_7_0_pos 0
#define reg_fste_phase_inc_7_0_len 8
#define reg_fste_phase_inc_7_0_lsb 0
#define xd_p_reg_fste_phase_inc_11_8    (*(volatile byte xdata *) 0xF56D)
#define    p_reg_fste_phase_inc_11_8    0xF56D
#define reg_fste_phase_inc_11_8_pos 0
#define reg_fste_phase_inc_11_8_len 4
#define reg_fste_phase_inc_11_8_lsb 8
#define xd_p_reg_fste_acum_cost_cnt_max (*(volatile byte xdata *) 0xF56E)
#define    p_reg_fste_acum_cost_cnt_max 0xF56E
#define reg_fste_acum_cost_cnt_max_pos 0
#define reg_fste_acum_cost_cnt_max_len 4
#define reg_fste_acum_cost_cnt_max_lsb 0
#define xd_p_reg_fste_step_size_std (*(volatile byte xdata *) 0xF56F)
#define    p_reg_fste_step_size_std 0xF56F
#define reg_fste_step_size_std_pos 0
#define reg_fste_step_size_std_len 4
#define reg_fste_step_size_std_lsb 0
#define xd_p_reg_fste_step_size_max (*(volatile byte xdata *) 0xF570)
#define    p_reg_fste_step_size_max 0xF570
#define reg_fste_step_size_max_pos 0
#define reg_fste_step_size_max_len 4
#define reg_fste_step_size_max_lsb 0
#define xd_p_reg_fste_rpd_dir_cnt_max   (*(volatile byte xdata *) 0xF571)
#define    p_reg_fste_rpd_dir_cnt_max   0xF571
#define reg_fste_rpd_dir_cnt_max_pos 0
#define reg_fste_rpd_dir_cnt_max_len 4
#define reg_fste_rpd_dir_cnt_max_lsb 0
#define xd_p_reg_fste_frac_cost_cnt_max_7_0 (*(volatile byte xdata *) 0xF572)
#define    p_reg_fste_frac_cost_cnt_max_7_0 0xF572
#define reg_fste_frac_cost_cnt_max_7_0_pos 0
#define reg_fste_frac_cost_cnt_max_7_0_len 8
#define reg_fste_frac_cost_cnt_max_7_0_lsb 0
#define xd_p_reg_fste_frac_cost_cnt_max_9_8 (*(volatile byte xdata *) 0xF573)
#define    p_reg_fste_frac_cost_cnt_max_9_8 0xF573
#define reg_fste_frac_cost_cnt_max_9_8_pos 0
#define reg_fste_frac_cost_cnt_max_9_8_len 2
#define reg_fste_frac_cost_cnt_max_9_8_lsb 8
#define xd_p_reg_fste_isLongWeakTail    (*(volatile byte xdata *) 0xF574)
#define    p_reg_fste_isLongWeakTail    0xF574
#define reg_fste_isLongWeakTail_pos 0
#define reg_fste_isLongWeakTail_len 1
#define reg_fste_isLongWeakTail_lsb 0
#define xd_p_reg_fste_isLongWeakHead    (*(volatile byte xdata *) 0xF575)
#define    p_reg_fste_isLongWeakHead    0xF575
#define reg_fste_isLongWeakHead_pos 0
#define reg_fste_isLongWeakHead_len 1
#define reg_fste_isLongWeakHead_lsb 0
#define xd_p_reg_fste_w0_7_0    (*(volatile byte xdata *) 0xF576)
#define    p_reg_fste_w0_7_0    0xF576
#define reg_fste_w0_7_0_pos 0
#define reg_fste_w0_7_0_len 8
#define reg_fste_w0_7_0_lsb 0
#define xd_p_reg_fste_w0_9_8    (*(volatile byte xdata *) 0xF577)
#define    p_reg_fste_w0_9_8    0xF577
#define reg_fste_w0_9_8_pos 0
#define reg_fste_w0_9_8_len 2
#define reg_fste_w0_9_8_lsb 8
#define xd_p_reg_fste_w1_7_0    (*(volatile byte xdata *) 0xF578)
#define    p_reg_fste_w1_7_0    0xF578
#define reg_fste_w1_7_0_pos 0
#define reg_fste_w1_7_0_len 8
#define reg_fste_w1_7_0_lsb 0
#define xd_p_reg_fste_w1_9_8    (*(volatile byte xdata *) 0xF579)
#define    p_reg_fste_w1_9_8    0xF579
#define reg_fste_w1_9_8_pos 0
#define reg_fste_w1_9_8_len 2
#define reg_fste_w1_9_8_lsb 8
#define xd_p_reg_fste_w2_7_0    (*(volatile byte xdata *) 0xF57A)
#define    p_reg_fste_w2_7_0    0xF57A
#define reg_fste_w2_7_0_pos 0
#define reg_fste_w2_7_0_len 8
#define reg_fste_w2_7_0_lsb 0
#define xd_p_reg_fste_w2_9_8    (*(volatile byte xdata *) 0xF57B)
#define    p_reg_fste_w2_9_8    0xF57B
#define reg_fste_w2_9_8_pos 0
#define reg_fste_w2_9_8_len 2
#define reg_fste_w2_9_8_lsb 8
#define xd_p_reg_fste_w3_7_0    (*(volatile byte xdata *) 0xF57C)
#define    p_reg_fste_w3_7_0    0xF57C
#define reg_fste_w3_7_0_pos 0
#define reg_fste_w3_7_0_len 8
#define reg_fste_w3_7_0_lsb 0
#define xd_p_reg_fste_w3_9_8    (*(volatile byte xdata *) 0xF57D)
#define    p_reg_fste_w3_9_8    0xF57D
#define reg_fste_w3_9_8_pos 0
#define reg_fste_w3_9_8_len 2
#define reg_fste_w3_9_8_lsb 8
#define xd_p_reg_fste_w4_7_0    (*(volatile byte xdata *) 0xF57E)
#define    p_reg_fste_w4_7_0    0xF57E
#define reg_fste_w4_7_0_pos 0
#define reg_fste_w4_7_0_len 8
#define reg_fste_w4_7_0_lsb 0
#define xd_p_reg_fste_w4_9_8    (*(volatile byte xdata *) 0xF57F)
#define    p_reg_fste_w4_9_8    0xF57F
#define reg_fste_w4_9_8_pos 0
#define reg_fste_w4_9_8_len 2
#define reg_fste_w4_9_8_lsb 8
#define xd_p_reg_fste_w5_7_0    (*(volatile byte xdata *) 0xF580)
#define    p_reg_fste_w5_7_0    0xF580
#define reg_fste_w5_7_0_pos 0
#define reg_fste_w5_7_0_len 8
#define reg_fste_w5_7_0_lsb 0
#define xd_p_reg_fste_w5_9_8    (*(volatile byte xdata *) 0xF581)
#define    p_reg_fste_w5_9_8    0xF581
#define reg_fste_w5_9_8_pos 0
#define reg_fste_w5_9_8_len 2
#define reg_fste_w5_9_8_lsb 8
#define xd_p_reg_fste_w6_7_0    (*(volatile byte xdata *) 0xF582)
#define    p_reg_fste_w6_7_0    0xF582
#define reg_fste_w6_7_0_pos 0
#define reg_fste_w6_7_0_len 8
#define reg_fste_w6_7_0_lsb 0
#define xd_p_reg_fste_w6_9_8    (*(volatile byte xdata *) 0xF583)
#define    p_reg_fste_w6_9_8    0xF583
#define reg_fste_w6_9_8_pos 0
#define reg_fste_w6_9_8_len 2
#define reg_fste_w6_9_8_lsb 8
#define xd_p_reg_fste_w7_7_0    (*(volatile byte xdata *) 0xF584)
#define    p_reg_fste_w7_7_0    0xF584
#define reg_fste_w7_7_0_pos 0
#define reg_fste_w7_7_0_len 8
#define reg_fste_w7_7_0_lsb 0
#define xd_p_reg_fste_w7_9_8    (*(volatile byte xdata *) 0xF585)
#define    p_reg_fste_w7_9_8    0xF585
#define reg_fste_w7_9_8_pos 0
#define reg_fste_w7_9_8_len 2
#define reg_fste_w7_9_8_lsb 8
#define xd_p_reg_fste_w8_7_0    (*(volatile byte xdata *) 0xF586)
#define    p_reg_fste_w8_7_0    0xF586
#define reg_fste_w8_7_0_pos 0
#define reg_fste_w8_7_0_len 8
#define reg_fste_w8_7_0_lsb 0
#define xd_p_reg_fste_w8_9_8    (*(volatile byte xdata *) 0xF587)
#define    p_reg_fste_w8_9_8    0xF587
#define reg_fste_w8_9_8_pos 0
#define reg_fste_w8_9_8_len 2
#define reg_fste_w8_9_8_lsb 8
#define xd_p_reg_fste_w9_7_0    (*(volatile byte xdata *) 0xF588)
#define    p_reg_fste_w9_7_0    0xF588
#define reg_fste_w9_7_0_pos 0
#define reg_fste_w9_7_0_len 8
#define reg_fste_w9_7_0_lsb 0
#define xd_p_reg_fste_w9_9_8    (*(volatile byte xdata *) 0xF589)
#define    p_reg_fste_w9_9_8    0xF589
#define reg_fste_w9_9_8_pos 0
#define reg_fste_w9_9_8_len 2
#define reg_fste_w9_9_8_lsb 8
#define xd_p_reg_fste_wa_7_0    (*(volatile byte xdata *) 0xF58A)
#define    p_reg_fste_wa_7_0    0xF58A
#define reg_fste_wa_7_0_pos 0
#define reg_fste_wa_7_0_len 8
#define reg_fste_wa_7_0_lsb 0
#define xd_p_reg_fste_wa_9_8    (*(volatile byte xdata *) 0xF58B)
#define    p_reg_fste_wa_9_8    0xF58B
#define reg_fste_wa_9_8_pos 0
#define reg_fste_wa_9_8_len 2
#define reg_fste_wa_9_8_lsb 8
#define xd_p_reg_fste_wb_7_0    (*(volatile byte xdata *) 0xF58C)
#define    p_reg_fste_wb_7_0    0xF58C
#define reg_fste_wb_7_0_pos 0
#define reg_fste_wb_7_0_len 8
#define reg_fste_wb_7_0_lsb 0
#define xd_p_reg_fste_wb_9_8    (*(volatile byte xdata *) 0xF58D)
#define    p_reg_fste_wb_9_8    0xF58D
#define reg_fste_wb_9_8_pos 0
#define reg_fste_wb_9_8_len 2
#define reg_fste_wb_9_8_lsb 8
#define xd_p_reg_fste_wc_7_0    (*(volatile byte xdata *) 0xF58E)
#define    p_reg_fste_wc_7_0    0xF58E
#define reg_fste_wc_7_0_pos 0
#define reg_fste_wc_7_0_len 8
#define reg_fste_wc_7_0_lsb 0
#define xd_p_reg_fste_wc_9_8    (*(volatile byte xdata *) 0xF58F)
#define    p_reg_fste_wc_9_8    0xF58F
#define reg_fste_wc_9_8_pos 0
#define reg_fste_wc_9_8_len 2
#define reg_fste_wc_9_8_lsb 8
#define xd_p_reg_fste_wd_7_0    (*(volatile byte xdata *) 0xF590)
#define    p_reg_fste_wd_7_0    0xF590
#define reg_fste_wd_7_0_pos 0
#define reg_fste_wd_7_0_len 8
#define reg_fste_wd_7_0_lsb 0
#define xd_p_reg_fste_wd_9_8    (*(volatile byte xdata *) 0xF591)
#define    p_reg_fste_wd_9_8    0xF591
#define reg_fste_wd_9_8_pos 0
#define reg_fste_wd_9_8_len 2
#define reg_fste_wd_9_8_lsb 8
#define xd_p_reg_fste_we_7_0    (*(volatile byte xdata *) 0xF592)
#define    p_reg_fste_we_7_0    0xF592
#define reg_fste_we_7_0_pos 0
#define reg_fste_we_7_0_len 8
#define reg_fste_we_7_0_lsb 0
#define xd_p_reg_fste_we_9_8    (*(volatile byte xdata *) 0xF593)
#define    p_reg_fste_we_9_8    0xF593
#define reg_fste_we_9_8_pos 0
#define reg_fste_we_9_8_len 2
#define reg_fste_we_9_8_lsb 8
#define xd_p_reg_fste_wf_7_0    (*(volatile byte xdata *) 0xF594)
#define    p_reg_fste_wf_7_0    0xF594
#define reg_fste_wf_7_0_pos 0
#define reg_fste_wf_7_0_len 8
#define reg_fste_wf_7_0_lsb 0
#define xd_p_reg_fste_wf_9_8    (*(volatile byte xdata *) 0xF595)
#define    p_reg_fste_wf_9_8    0xF595
#define reg_fste_wf_9_8_pos 0
#define reg_fste_wf_9_8_len 2
#define reg_fste_wf_9_8_lsb 8
#define xd_p_reg_fste_wg_7_0    (*(volatile byte xdata *) 0xF596)
#define    p_reg_fste_wg_7_0    0xF596
#define reg_fste_wg_7_0_pos 0
#define reg_fste_wg_7_0_len 8
#define reg_fste_wg_7_0_lsb 0
#define xd_p_reg_fste_wg_9_8    (*(volatile byte xdata *) 0xF597)
#define    p_reg_fste_wg_9_8    0xF597
#define reg_fste_wg_9_8_pos 0
#define reg_fste_wg_9_8_len 2
#define reg_fste_wg_9_8_lsb 8
#define xd_p_reg_fste_wh_7_0    (*(volatile byte xdata *) 0xF598)
#define    p_reg_fste_wh_7_0    0xF598
#define reg_fste_wh_7_0_pos 0
#define reg_fste_wh_7_0_len 8
#define reg_fste_wh_7_0_lsb 0
#define xd_p_reg_fste_wh_9_8    (*(volatile byte xdata *) 0xF599)
#define    p_reg_fste_wh_9_8    0xF599
#define reg_fste_wh_9_8_pos 0
#define reg_fste_wh_9_8_len 2
#define reg_fste_wh_9_8_lsb 8
#define xd_r_fd_fste_i_adj_org  (*(volatile byte xdata *) 0xF59A)
#define    r_fd_fste_i_adj_org  0xF59A
#define fd_fste_i_adj_org_pos 0
#define fd_fste_i_adj_org_len 5
#define fd_fste_i_adj_org_lsb 0
#define xd_r_fd_fste_f_adj_7_0  (*(volatile byte xdata *) 0xF59B)
#define    r_fd_fste_f_adj_7_0  0xF59B
#define fd_fste_f_adj_7_0_pos 0
#define fd_fste_f_adj_7_0_len 8
#define fd_fste_f_adj_7_0_lsb 0
#define xd_r_fd_fste_f_adj_15_8 (*(volatile byte xdata *) 0xF59C)
#define    r_fd_fste_f_adj_15_8 0xF59C
#define fd_fste_f_adj_15_8_pos 0
#define fd_fste_f_adj_15_8_len 8
#define fd_fste_f_adj_15_8_lsb 8
#define xd_r_fd_fste_f_adj_19_16    (*(volatile byte xdata *) 0xF59D)
#define    r_fd_fste_f_adj_19_16    0xF59D
#define fd_fste_f_adj_19_16_pos 0
#define fd_fste_f_adj_19_16_len 4
#define fd_fste_f_adj_19_16_lsb 16
#define xd_p_reg_fste_ehw_7_0   (*(volatile byte xdata *) 0xF59E)
#define    p_reg_fste_ehw_7_0   0xF59E
#define reg_fste_ehw_7_0_pos 0
#define reg_fste_ehw_7_0_len 8
#define reg_fste_ehw_7_0_lsb 0
#define xd_p_reg_fste_ehw_12_8  (*(volatile byte xdata *) 0xF59F)
#define    p_reg_fste_ehw_12_8  0xF59F
#define reg_fste_ehw_12_8_pos 0
#define reg_fste_ehw_12_8_len 5
#define reg_fste_ehw_12_8_lsb 8
#define xd_p_reg_fste_i_adj_vld (*(volatile byte xdata *) 0xF5A0)
#define    p_reg_fste_i_adj_vld 0xF5A0
#define reg_fste_i_adj_vld_pos 0
#define reg_fste_i_adj_vld_len 1
#define reg_fste_i_adj_vld_lsb 0
#define xd_p_reg_fste_ceTimesPhasor_real    (*(volatile byte xdata *) 0xF5A1)
#define    p_reg_fste_ceTimesPhasor_real    0xF5A1
#define reg_fste_ceTimesPhasor_real_pos 0
#define reg_fste_ceTimesPhasor_real_len 1
#define reg_fste_ceTimesPhasor_real_lsb 0
#define xd_p_reg_fste_ceTimesPhasor_imag    (*(volatile byte xdata *) 0xF5A2)
#define    p_reg_fste_ceTimesPhasor_imag    0xF5A2
#define reg_fste_ceTimesPhasor_imag_pos 0
#define reg_fste_ceTimesPhasor_imag_len 1
#define reg_fste_ceTimesPhasor_imag_lsb 0
#define xd_p_reg_fste_cerTimesW_real    (*(volatile byte xdata *) 0xF5A3)
#define    p_reg_fste_cerTimesW_real    0xF5A3
#define reg_fste_cerTimesW_real_pos 0
#define reg_fste_cerTimesW_real_len 1
#define reg_fste_cerTimesW_real_lsb 0
#define xd_p_reg_fste_cerTimesW_imag    (*(volatile byte xdata *) 0xF5A4)
#define    p_reg_fste_cerTimesW_imag    0xF5A4
#define reg_fste_cerTimesW_imag_pos 0
#define reg_fste_cerTimesW_imag_len 1
#define reg_fste_cerTimesW_imag_lsb 0
#define xd_p_reg_fste_cerTimesWAccum_real   (*(volatile byte xdata *) 0xF5A5)
#define    p_reg_fste_cerTimesWAccum_real   0xF5A5
#define reg_fste_cerTimesWAccum_real_pos 0
#define reg_fste_cerTimesWAccum_real_len 1
#define reg_fste_cerTimesWAccum_real_lsb 0
#define xd_p_reg_fste_cerTimesWAccum_imag   (*(volatile byte xdata *) 0xF5A6)
#define    p_reg_fste_cerTimesWAccum_imag   0xF5A6
#define reg_fste_cerTimesWAccum_imag_pos 0
#define reg_fste_cerTimesWAccum_imag_len 1
#define reg_fste_cerTimesWAccum_imag_lsb 0
#define xd_p_reg_fste_cost  (*(volatile byte xdata *) 0xF5A7)
#define    p_reg_fste_cost  0xF5A7
#define reg_fste_cost_pos 0
#define reg_fste_cost_len 1
#define reg_fste_cost_lsb 0
#define xd_p_fd_tpsd_en (*(volatile byte xdata *) 0xF5A8)
#define    p_fd_tpsd_en 0xF5A8
#define fd_tpsd_en_pos 0
#define fd_tpsd_en_len 1
#define fd_tpsd_en_lsb 0
#define xd_p_fd_tpsd_lock   (*(volatile byte xdata *) 0xF5A9)
#define    p_fd_tpsd_lock   0xF5A9
#define fd_tpsd_lock_pos 0
#define fd_tpsd_lock_len 1
#define fd_tpsd_lock_lsb 0
#define xd_r_fd_tpsd_s19    (*(volatile byte xdata *) 0xF5AA)
#define    r_fd_tpsd_s19    0xF5AA
#define fd_tpsd_s19_pos 0
#define fd_tpsd_s19_len 1
#define fd_tpsd_s19_lsb 0
#define xd_r_fd_tpsd_s17    (*(volatile byte xdata *) 0xF5AB)
#define    r_fd_tpsd_s17    0xF5AB
#define fd_tpsd_s17_pos 0
#define fd_tpsd_s17_len 1
#define fd_tpsd_s17_lsb 0
#define xd_p_fd_sfr_ste_en  (*(volatile byte xdata *) 0xF5AC)
#define    p_fd_sfr_ste_en  0xF5AC
#define fd_sfr_ste_en_pos 0
#define fd_sfr_ste_en_len 1
#define fd_sfr_ste_en_lsb 0
#define xd_p_fd_sfr_ste_mode    (*(volatile byte xdata *) 0xF5AD)
#define    p_fd_sfr_ste_mode    0xF5AD
#define fd_sfr_ste_mode_pos 0
#define fd_sfr_ste_mode_len 2
#define fd_sfr_ste_mode_lsb 0
#define xd_p_fd_sfr_ste_done    (*(volatile byte xdata *) 0xF5AE)
#define    p_fd_sfr_ste_done    0xF5AE
#define fd_sfr_ste_done_pos 0
#define fd_sfr_ste_done_len 1
#define fd_sfr_ste_done_lsb 0
#define xd_p_reg_cfoe_ffoe_en   (*(volatile byte xdata *) 0xF5AF)
#define    p_reg_cfoe_ffoe_en   0xF5AF
#define reg_cfoe_ffoe_en_pos 0
#define reg_cfoe_ffoe_en_len 1
#define reg_cfoe_ffoe_en_lsb 0
#define xd_p_reg_cfoe_ifoe_en   (*(volatile byte xdata *) 0xF5B0)
#define    p_reg_cfoe_ifoe_en   0xF5B0
#define reg_cfoe_ifoe_en_pos 0
#define reg_cfoe_ifoe_en_len 1
#define reg_cfoe_ifoe_en_lsb 0
#define xd_p_reg_cfoe_fot_en    (*(volatile byte xdata *) 0xF5B1)
#define    p_reg_cfoe_fot_en    0xF5B1
#define reg_cfoe_fot_en_pos 0
#define reg_cfoe_fot_en_len 1
#define reg_cfoe_fot_en_lsb 0
#define xd_p_reg_cfoe_fot_lm_en (*(volatile byte xdata *) 0xF5B2)
#define    p_reg_cfoe_fot_lm_en 0xF5B2
#define reg_cfoe_fot_lm_en_pos 0
#define reg_cfoe_fot_lm_en_len 1
#define reg_cfoe_fot_lm_en_lsb 0
#define xd_p_reg_cfoe_fot_rst   (*(volatile byte xdata *) 0xF5B3)
#define    p_reg_cfoe_fot_rst   0xF5B3
#define reg_cfoe_fot_rst_pos 0
#define reg_cfoe_fot_rst_len 1
#define reg_cfoe_fot_rst_lsb 0
#define xd_r_fd_cfoe_ffoe_done  (*(volatile byte xdata *) 0xF5B4)
#define    r_fd_cfoe_ffoe_done  0xF5B4
#define fd_cfoe_ffoe_done_pos 0
#define fd_cfoe_ffoe_done_len 1
#define fd_cfoe_ffoe_done_lsb 0
#define xd_p_fd_cfoe_metric_vld (*(volatile byte xdata *) 0xF5B5)
#define    p_fd_cfoe_metric_vld 0xF5B5
#define fd_cfoe_metric_vld_pos 0
#define fd_cfoe_metric_vld_len 1
#define fd_cfoe_metric_vld_lsb 0
#define xd_p_reg_cfoe_ifod_vld  (*(volatile byte xdata *) 0xF5B6)
#define    p_reg_cfoe_ifod_vld  0xF5B6
#define reg_cfoe_ifod_vld_pos 0
#define reg_cfoe_ifod_vld_len 1
#define reg_cfoe_ifod_vld_lsb 0
#define xd_r_fd_cfoe_ifoe_done  (*(volatile byte xdata *) 0xF5B7)
#define    r_fd_cfoe_ifoe_done  0xF5B7
#define fd_cfoe_ifoe_done_pos 0
#define fd_cfoe_ifoe_done_len 1
#define fd_cfoe_ifoe_done_lsb 0
#define xd_p_reg_cfoe_ifoe_spec_inv (*(volatile byte xdata *) 0xF5B8)
#define    p_reg_cfoe_ifoe_spec_inv 0xF5B8
#define reg_cfoe_ifoe_spec_inv_pos 0
#define reg_cfoe_ifoe_spec_inv_len 1
#define reg_cfoe_ifoe_spec_inv_lsb 0
#define xd_p_reg_cfoe_divg_int  (*(volatile byte xdata *) 0xF5B9)
#define    p_reg_cfoe_divg_int  0xF5B9
#define reg_cfoe_divg_int_pos 0
#define reg_cfoe_divg_int_len 1
#define reg_cfoe_divg_int_lsb 0
#define xd_r_reg_cfoe_divg_flag (*(volatile byte xdata *) 0xF5BA)
#define    r_reg_cfoe_divg_flag 0xF5BA
#define reg_cfoe_divg_flag_pos 0
#define reg_cfoe_divg_flag_len 1
#define reg_cfoe_divg_flag_lsb 0
#define xd_p_reg_sfoe_en    (*(volatile byte xdata *) 0xF5BB)
#define    p_reg_sfoe_en    0xF5BB
#define reg_sfoe_en_pos 0
#define reg_sfoe_en_len 1
#define reg_sfoe_en_lsb 0
#define xd_p_reg_sfoe_dis   (*(volatile byte xdata *) 0xF5BC)
#define    p_reg_sfoe_dis   0xF5BC
#define reg_sfoe_dis_pos 0
#define reg_sfoe_dis_len 1
#define reg_sfoe_dis_lsb 0
#define xd_p_reg_sfoe_rst   (*(volatile byte xdata *) 0xF5BD)
#define    p_reg_sfoe_rst   0xF5BD
#define reg_sfoe_rst_pos 0
#define reg_sfoe_rst_len 1
#define reg_sfoe_rst_lsb 0
#define xd_p_reg_sfoe_vld_int   (*(volatile byte xdata *) 0xF5BE)
#define    p_reg_sfoe_vld_int   0xF5BE
#define reg_sfoe_vld_int_pos 0
#define reg_sfoe_vld_int_len 1
#define reg_sfoe_vld_int_lsb 0
#define xd_p_reg_sfoe_lm_en (*(volatile byte xdata *) 0xF5BF)
#define    p_reg_sfoe_lm_en 0xF5BF
#define reg_sfoe_lm_en_pos 0
#define reg_sfoe_lm_en_len 1
#define reg_sfoe_lm_en_lsb 0
#define xd_p_reg_sfoe_divg_int  (*(volatile byte xdata *) 0xF5C0)
#define    p_reg_sfoe_divg_int  0xF5C0
#define reg_sfoe_divg_int_pos 0
#define reg_sfoe_divg_int_len 1
#define reg_sfoe_divg_int_lsb 0
#define xd_r_reg_sfoe_divg_flag (*(volatile byte xdata *) 0xF5C1)
#define    r_reg_sfoe_divg_flag 0xF5C1
#define reg_sfoe_divg_flag_pos 0
#define reg_sfoe_divg_flag_len 1
#define reg_sfoe_divg_flag_lsb 0
#define xd_p_reg_fft_rst    (*(volatile byte xdata *) 0xF5C2)
#define    p_reg_fft_rst    0xF5C2
#define reg_fft_rst_pos 0
#define reg_fft_rst_len 1
#define reg_fft_rst_lsb 0
#define xd_p_reg_fft_mask2_en   (*(volatile byte xdata *) 0xF5C3)
#define    p_reg_fft_mask2_en   0xF5C3
#define reg_fft_mask2_en_pos 0
#define reg_fft_mask2_en_len 1
#define reg_fft_mask2_en_lsb 0
#define xd_p_reg_fft_mask3_en   (*(volatile byte xdata *) 0xF5C4)
#define    p_reg_fft_mask3_en   0xF5C4
#define reg_fft_mask3_en_pos 0
#define reg_fft_mask3_en_len 1
#define reg_fft_mask3_en_lsb 0
#define xd_p_reg_fft_crc_en (*(volatile byte xdata *) 0xF5C5)
#define    p_reg_fft_crc_en 0xF5C5
#define reg_fft_crc_en_pos 0
#define reg_fft_crc_en_len 1
#define reg_fft_crc_en_lsb 0
#define xd_p_reg_fft_mask0_en   (*(volatile byte xdata *) 0xF5C6)
#define    p_reg_fft_mask0_en   0xF5C6
#define reg_fft_mask0_en_pos 0
#define reg_fft_mask0_en_len 1
#define reg_fft_mask0_en_lsb 0
#define xd_p_reg_fft_mask1_en   (*(volatile byte xdata *) 0xF5C7)
#define    p_reg_fft_mask1_en   0xF5C7
#define reg_fft_mask1_en_pos 0
#define reg_fft_mask1_en_len 1
#define reg_fft_mask1_en_lsb 0
#define xd_p_fd_fste_en (*(volatile byte xdata *) 0xF5C8)
#define    p_fd_fste_en 0xF5C8
#define fd_fste_en_pos 0
#define fd_fste_en_len 1
#define fd_fste_en_lsb 0
#define xd_p_reg_feq_eh2_comp_en    (*(volatile byte xdata *) 0xF5C9)
#define    p_reg_feq_eh2_comp_en    0xF5C9
#define reg_feq_eh2_comp_en_pos 0
#define reg_feq_eh2_comp_en_len 1
#define reg_feq_eh2_comp_en_lsb 0
#define xd_p_reg_feq_read_update    (*(volatile byte xdata *) 0xF5CA)
#define    p_reg_feq_read_update    0xF5CA
#define reg_feq_read_update_pos 0
#define reg_feq_read_update_len 1
#define reg_feq_read_update_lsb 0
#define xd_p_reg_feq_data_vld   (*(volatile byte xdata *) 0xF5CB)
#define    p_reg_feq_data_vld   0xF5CB
#define reg_feq_data_vld_pos 0
#define reg_feq_data_vld_len 1
#define reg_feq_data_vld_lsb 0
#define xd_p_reg_feq_tone_idx_7_0   (*(volatile byte xdata *) 0xF5CC)
#define    p_reg_feq_tone_idx_7_0   0xF5CC
#define reg_feq_tone_idx_7_0_pos 0
#define reg_feq_tone_idx_7_0_len 8
#define reg_feq_tone_idx_7_0_lsb 0
#define xd_p_reg_feq_tone_idx_12_8  (*(volatile byte xdata *) 0xF5CD)
#define    p_reg_feq_tone_idx_12_8  0xF5CD
#define reg_feq_tone_idx_12_8_pos 0
#define reg_feq_tone_idx_12_8_len 5
#define reg_feq_tone_idx_12_8_lsb 8
#define xd_r_reg_feq_data_re_7_0    (*(volatile byte xdata *) 0xF5CE)
#define    r_reg_feq_data_re_7_0    0xF5CE
#define reg_feq_data_re_7_0_pos 0
#define reg_feq_data_re_7_0_len 8
#define reg_feq_data_re_7_0_lsb 0
#define xd_r_reg_feq_data_re_15_8   (*(volatile byte xdata *) 0xF5CF)
#define    r_reg_feq_data_re_15_8   0xF5CF
#define reg_feq_data_re_15_8_pos 0
#define reg_feq_data_re_15_8_len 8
#define reg_feq_data_re_15_8_lsb 8
#define xd_r_reg_feq_data_re_21_16  (*(volatile byte xdata *) 0xF5D0)
#define    r_reg_feq_data_re_21_16  0xF5D0
#define reg_feq_data_re_21_16_pos 0
#define reg_feq_data_re_21_16_len 6
#define reg_feq_data_re_21_16_lsb 16
#define xd_r_reg_feq_data_im_7_0    (*(volatile byte xdata *) 0xF5D1)
#define    r_reg_feq_data_im_7_0    0xF5D1
#define reg_feq_data_im_7_0_pos 0
#define reg_feq_data_im_7_0_len 8
#define reg_feq_data_im_7_0_lsb 0
#define xd_r_reg_feq_data_im_15_8   (*(volatile byte xdata *) 0xF5D2)
#define    r_reg_feq_data_im_15_8   0xF5D2
#define reg_feq_data_im_15_8_pos 0
#define reg_feq_data_im_15_8_len 8
#define reg_feq_data_im_15_8_lsb 8
#define xd_r_reg_feq_data_im_21_16  (*(volatile byte xdata *) 0xF5D3)
#define    r_reg_feq_data_im_21_16  0xF5D3
#define reg_feq_data_im_21_16_pos 0
#define reg_feq_data_im_21_16_len 6
#define reg_feq_data_im_21_16_lsb 16
#define xd_r_reg_feq_data_h2_7_0    (*(volatile byte xdata *) 0xF5D4)
#define    r_reg_feq_data_h2_7_0    0xF5D4
#define reg_feq_data_h2_7_0_pos 0
#define reg_feq_data_h2_7_0_len 8
#define reg_feq_data_h2_7_0_lsb 0
#define xd_r_reg_feq_data_h2_15_8   (*(volatile byte xdata *) 0xF5D5)
#define    r_reg_feq_data_h2_15_8   0xF5D5
#define reg_feq_data_h2_15_8_pos 0
#define reg_feq_data_h2_15_8_len 8
#define reg_feq_data_h2_15_8_lsb 8
#define xd_r_reg_feq_data_h2_18_16  (*(volatile byte xdata *) 0xF5D6)
#define    r_reg_feq_data_h2_18_16  0xF5D6
#define reg_feq_data_h2_18_16_pos 0
#define reg_feq_data_h2_18_16_len 3
#define reg_feq_data_h2_18_16_lsb 16
#define xd_p_reg_fs_en  (*(volatile byte xdata *) 0xF5D7)
#define    p_reg_fs_en  0xF5D7
#define reg_fs_en_pos 0
#define reg_fs_en_len 1
#define reg_fs_en_lsb 0
#define xd_p_reg_fs_offset  (*(volatile byte xdata *) 0xF5D8)
#define    p_reg_fs_offset  0xF5D8
#define reg_fs_offset_pos 0
#define reg_fs_offset_len 3
#define reg_fs_offset_lsb 0
#define xd_p_reg_fs_debug   (*(volatile byte xdata *) 0xF5D9)
#define    p_reg_fs_debug   0xF5D9
#define reg_fs_debug_pos 0
#define reg_fs_debug_len 1
#define reg_fs_debug_lsb 0
#define xd_p_reg_fs_half_inv    (*(volatile byte xdata *) 0xF5DA)
#define    p_reg_fs_half_inv    0xF5DA
#define reg_fs_half_inv_pos 0
#define reg_fs_half_inv_len 1
#define reg_fs_half_inv_lsb 0
#define xd_p_reg_cdpf_currentfftposition_7_0    (*(volatile byte xdata *) 0xF5DB)
#define    p_reg_cdpf_currentfftposition_7_0    0xF5DB
#define reg_cdpf_currentfftposition_7_0_pos 0
#define reg_cdpf_currentfftposition_7_0_len 8
#define reg_cdpf_currentfftposition_7_0_lsb 0
#define xd_p_reg_cdpf_currentfftposition_14_8   (*(volatile byte xdata *) 0xF5DC)
#define    p_reg_cdpf_currentfftposition_14_8   0xF5DC
#define reg_cdpf_currentfftposition_14_8_pos 0
#define reg_cdpf_currentfftposition_14_8_len 7
#define reg_cdpf_currentfftposition_14_8_lsb 8
#define xd_r_reg_cdpf_fftshift_7_0  (*(volatile byte xdata *) 0xF5DD)
#define    r_reg_cdpf_fftshift_7_0  0xF5DD
#define reg_cdpf_fftshift_7_0_pos 0
#define reg_cdpf_fftshift_7_0_len 8
#define reg_cdpf_fftshift_7_0_lsb 0
#define xd_r_reg_cdpf_fftshift_13_8 (*(volatile byte xdata *) 0xF5DE)
#define    r_reg_cdpf_fftshift_13_8 0xF5DE
#define reg_cdpf_fftshift_13_8_pos 0
#define reg_cdpf_fftshift_13_8_len 6
#define reg_cdpf_fftshift_13_8_lsb 8
#define xd_p_reg_cdpf_channelpowerdown_7_0  (*(volatile byte xdata *) 0xF5DF)
#define    p_reg_cdpf_channelpowerdown_7_0  0xF5DF
#define reg_cdpf_channelpowerdown_7_0_pos 0
#define reg_cdpf_channelpowerdown_7_0_len 8
#define reg_cdpf_channelpowerdown_7_0_lsb 0
#define xd_p_reg_cdpf_channelpowerdown_10_8 (*(volatile byte xdata *) 0xF5E0)
#define    p_reg_cdpf_channelpowerdown_10_8 0xF5E0
#define reg_cdpf_channelpowerdown_10_8_pos 0
#define reg_cdpf_channelpowerdown_10_8_len 3
#define reg_cdpf_channelpowerdown_10_8_lsb 8
#define xd_p_reg_cdpf_state (*(volatile byte xdata *) 0xF5E1)
#define    p_reg_cdpf_state 0xF5E1
#define reg_cdpf_state_pos 0
#define reg_cdpf_state_len 4
#define reg_cdpf_state_lsb 0
#define xd_p_reg_cdpf_echotestsearchingrange    (*(volatile byte xdata *) 0xF5E2)
#define    p_reg_cdpf_echotestsearchingrange    0xF5E2
#define reg_cdpf_echotestsearchingrange_pos 0
#define reg_cdpf_echotestsearchingrange_len 8
#define reg_cdpf_echotestsearchingrange_lsb 0
#define xd_p_reg_cdpf_rxsymboldelay (*(volatile byte xdata *) 0xF5E3)
#define    p_reg_cdpf_rxsymboldelay 0xF5E3
#define reg_cdpf_rxsymboldelay_pos 0
#define reg_cdpf_rxsymboldelay_len 4
#define reg_cdpf_rxsymboldelay_lsb 0
#define xd_p_reg_cdpf_ceavesymbolno (*(volatile byte xdata *) 0xF5E4)
#define    p_reg_cdpf_ceavesymbolno 0xF5E4
#define reg_cdpf_ceavesymbolno_pos 0
#define reg_cdpf_ceavesymbolno_len 4
#define reg_cdpf_ceavesymbolno_lsb 0
#define xd_p_reg_cdpf_ceshift   (*(volatile byte xdata *) 0xF5E5)
#define    p_reg_cdpf_ceshift   0xF5E5
#define reg_cdpf_ceshift_pos 0
#define reg_cdpf_ceshift_len 3
#define reg_cdpf_ceshift_lsb 0
#define xd_p_reg_cdpf_postpreechotry    (*(volatile byte xdata *) 0xF5E6)
#define    p_reg_cdpf_postpreechotry    0xF5E6
#define reg_cdpf_postpreechotry_pos 0
#define reg_cdpf_postpreechotry_len 2
#define reg_cdpf_postpreechotry_lsb 0
#define xd_p_reg_cdpf_en    (*(volatile byte xdata *) 0xF5E7)
#define    p_reg_cdpf_en    0xF5E7
#define reg_cdpf_en_pos 0
#define reg_cdpf_en_len 1
#define reg_cdpf_en_lsb 0
#define xd_p_reg_cdpf_stateready    (*(volatile byte xdata *) 0xF5E8)
#define    p_reg_cdpf_stateready    0xF5E8
#define reg_cdpf_stateready_pos 0
#define reg_cdpf_stateready_len 1
#define reg_cdpf_stateready_lsb 0
#define xd_r_reg_cdpf_prepostpowercompare   (*(volatile byte xdata *) 0xF5E9)
#define    r_reg_cdpf_prepostpowercompare   0xF5E9
#define reg_cdpf_prepostpowercompare_pos 0
#define reg_cdpf_prepostpowercompare_len 1
#define reg_cdpf_prepostpowercompare_lsb 0
#define xd_r_reg_cdpf_candidateno   (*(volatile byte xdata *) 0xF5EA)
#define    r_reg_cdpf_candidateno   0xF5EA
#define reg_cdpf_candidateno_pos 0
#define reg_cdpf_candidateno_len 6
#define reg_cdpf_candidateno_lsb 0
#define xd_p_reg_cdpf_preechopower_7_0  (*(volatile byte xdata *) 0xF5EB)
#define    p_reg_cdpf_preechopower_7_0  0xF5EB
#define reg_cdpf_preechopower_7_0_pos 0
#define reg_cdpf_preechopower_7_0_len 8
#define reg_cdpf_preechopower_7_0_lsb 0
#define xd_p_reg_cdpf_preechopower_15_8 (*(volatile byte xdata *) 0xF5EC)
#define    p_reg_cdpf_preechopower_15_8 0xF5EC
#define reg_cdpf_preechopower_15_8_pos 0
#define reg_cdpf_preechopower_15_8_len 8
#define reg_cdpf_preechopower_15_8_lsb 8
#define xd_p_reg_cdpf_postechopower_7_0 (*(volatile byte xdata *) 0xF5ED)
#define    p_reg_cdpf_postechopower_7_0 0xF5ED
#define reg_cdpf_postechopower_7_0_pos 0
#define reg_cdpf_postechopower_7_0_len 8
#define reg_cdpf_postechopower_7_0_lsb 0
#define xd_p_reg_cdpf_postechopower_15_8    (*(volatile byte xdata *) 0xF5EE)
#define    p_reg_cdpf_postechopower_15_8    0xF5EE
#define reg_cdpf_postechopower_15_8_pos 0
#define reg_cdpf_postechopower_15_8_len 8
#define reg_cdpf_postechopower_15_8_lsb 8
#define xd_p_reg_cdpf_searchingend  (*(volatile byte xdata *) 0xF5EF)
#define    p_reg_cdpf_searchingend  0xF5EF
#define reg_cdpf_searchingend_pos 0
#define reg_cdpf_searchingend_len 8
#define reg_cdpf_searchingend_lsb 0
#define xd_r_reg_cdpf_candidate_7_0 (*(volatile byte xdata *) 0xF5F0)
#define    r_reg_cdpf_candidate_7_0 0xF5F0
#define reg_cdpf_candidate_7_0_pos 0
#define reg_cdpf_candidate_7_0_len 8
#define reg_cdpf_candidate_7_0_lsb 0
#define xd_r_reg_cdpf_candidate_15_8    (*(volatile byte xdata *) 0xF5F1)
#define    r_reg_cdpf_candidate_15_8    0xF5F1
#define reg_cdpf_candidate_15_8_pos 0
#define reg_cdpf_candidate_15_8_len 8
#define reg_cdpf_candidate_15_8_lsb 8
#define xd_p_reg_cdpf_candidate_rptr    (*(volatile byte xdata *) 0xF5F2)
#define    p_reg_cdpf_candidate_rptr    0xF5F2
#define reg_cdpf_candidate_rptr_pos 0
#define reg_cdpf_candidate_rptr_len 7
#define reg_cdpf_candidate_rptr_lsb 0
#define xd_p_reg_cdpf_candidate_rptr_force  (*(volatile byte xdata *) 0xF5F3)
#define    p_reg_cdpf_candidate_rptr_force  0xF5F3
#define reg_cdpf_candidate_rptr_force_pos 0
#define reg_cdpf_candidate_rptr_force_len 1
#define reg_cdpf_candidate_rptr_force_lsb 0
#define xd_p_reg_cdpf_trialshiftoffset_7_0  (*(volatile byte xdata *) 0xF5F4)
#define    p_reg_cdpf_trialshiftoffset_7_0  0xF5F4
#define reg_cdpf_trialshiftoffset_7_0_pos 0
#define reg_cdpf_trialshiftoffset_7_0_len 8
#define reg_cdpf_trialshiftoffset_7_0_lsb 0
#define xd_p_reg_cdpf_trialshiftoffset_13_8 (*(volatile byte xdata *) 0xF5F5)
#define    p_reg_cdpf_trialshiftoffset_13_8 0xF5F5
#define reg_cdpf_trialshiftoffset_13_8_pos 0
#define reg_cdpf_trialshiftoffset_13_8_len 6
#define reg_cdpf_trialshiftoffset_13_8_lsb 8
#define xd_p_reg_cdpf_channellength_7_0 (*(volatile byte xdata *) 0xF5F6)
#define    p_reg_cdpf_channellength_7_0 0xF5F6
#define reg_cdpf_channellength_7_0_pos 0
#define reg_cdpf_channellength_7_0_len 8
#define reg_cdpf_channellength_7_0_lsb 0
#define xd_p_reg_cdpf_channellength_12_8    (*(volatile byte xdata *) 0xF5F7)
#define    p_reg_cdpf_channellength_12_8    0xF5F7
#define reg_cdpf_channellength_12_8_pos 0
#define reg_cdpf_channellength_12_8_len 5
#define reg_cdpf_channellength_12_8_lsb 8
#define xd_p_reg_cdpf_hardwaresort  (*(volatile byte xdata *) 0xF5F8)
#define    p_reg_cdpf_hardwaresort  0xF5F8
#define reg_cdpf_hardwaresort_pos 0
#define reg_cdpf_hardwaresort_len 1
#define reg_cdpf_hardwaresort_lsb 0
#define xd_p_reg_cdpf_maxcandidateno    (*(volatile byte xdata *) 0xF5F9)
#define    p_reg_cdpf_maxcandidateno    0xF5F9
#define reg_cdpf_maxcandidateno_pos 0
#define reg_cdpf_maxcandidateno_len 3
#define reg_cdpf_maxcandidateno_lsb 0
#define xd_p_reg_cdpf_channelleftindex  (*(volatile byte xdata *) 0xF5FA)
#define    p_reg_cdpf_channelleftindex  0xF5FA
#define reg_cdpf_channelleftindex_pos 0
#define reg_cdpf_channelleftindex_len 4
#define reg_cdpf_channelleftindex_lsb 0
#define xd_r_reg_cdpf_fdishift_7_0  (*(volatile byte xdata *) 0xF5FB)
#define    r_reg_cdpf_fdishift_7_0  0xF5FB
#define reg_cdpf_fdishift_7_0_pos 0
#define reg_cdpf_fdishift_7_0_len 8
#define reg_cdpf_fdishift_7_0_lsb 0
#define xd_r_reg_cdpf_fdishift_15_8 (*(volatile byte xdata *) 0xF5FC)
#define    r_reg_cdpf_fdishift_15_8 0xF5FC
#define reg_cdpf_fdishift_15_8_pos 0
#define reg_cdpf_fdishift_15_8_len 8
#define reg_cdpf_fdishift_15_8_lsb 8
#define xd_p_reg_cdpf_guardband (*(volatile byte xdata *) 0xF5FD)
#define    p_reg_cdpf_guardband 0xF5FD
#define reg_cdpf_guardband_pos 0
#define reg_cdpf_guardband_len 5
#define reg_cdpf_guardband_lsb 0
#define xd_p_reg_cdpf_maxtonemaxindex_7_0   (*(volatile byte xdata *) 0xF5FE)
#define    p_reg_cdpf_maxtonemaxindex_7_0   0xF5FE
#define reg_cdpf_maxtonemaxindex_7_0_pos 0
#define reg_cdpf_maxtonemaxindex_7_0_len 8
#define reg_cdpf_maxtonemaxindex_7_0_lsb 0
#define xd_p_reg_cdpf_maxtonemaxindex_12_8  (*(volatile byte xdata *) 0xF5FF)
#define    p_reg_cdpf_maxtonemaxindex_12_8  0xF5FF
#define reg_cdpf_maxtonemaxindex_12_8_pos 0
#define reg_cdpf_maxtonemaxindex_12_8_len 5
#define reg_cdpf_maxtonemaxindex_12_8_lsb 8
#define xd_p_reg_cdpf_fdiw0 (*(volatile byte xdata *) 0xF600)
#define    p_reg_cdpf_fdiw0 0xF600
#define reg_cdpf_fdiw0_pos 0
#define reg_cdpf_fdiw0_len 7
#define reg_cdpf_fdiw0_lsb 0
#define xd_p_reg_cdpf_fdiw1 (*(volatile byte xdata *) 0xF601)
#define    p_reg_cdpf_fdiw1 0xF601
#define reg_cdpf_fdiw1_pos 0
#define reg_cdpf_fdiw1_len 7
#define reg_cdpf_fdiw1_lsb 0
#define xd_p_reg_cdpf_fdiw2 (*(volatile byte xdata *) 0xF602)
#define    p_reg_cdpf_fdiw2 0xF602
#define reg_cdpf_fdiw2_pos 0
#define reg_cdpf_fdiw2_len 7
#define reg_cdpf_fdiw2_lsb 0
#define xd_p_reg_cdpf_fdiw3 (*(volatile byte xdata *) 0xF603)
#define    p_reg_cdpf_fdiw3 0xF603
#define reg_cdpf_fdiw3_pos 0
#define reg_cdpf_fdiw3_len 7
#define reg_cdpf_fdiw3_lsb 0
#define xd_p_reg_cdpf_fdiw4 (*(volatile byte xdata *) 0xF604)
#define    p_reg_cdpf_fdiw4 0xF604
#define reg_cdpf_fdiw4_pos 0
#define reg_cdpf_fdiw4_len 7
#define reg_cdpf_fdiw4_lsb 0
#define xd_p_reg_cdpf_fdiw5 (*(volatile byte xdata *) 0xF605)
#define    p_reg_cdpf_fdiw5 0xF605
#define reg_cdpf_fdiw5_pos 0
#define reg_cdpf_fdiw5_len 7
#define reg_cdpf_fdiw5_lsb 0
#define xd_p_reg_cdpf_fdiw6 (*(volatile byte xdata *) 0xF606)
#define    p_reg_cdpf_fdiw6 0xF606
#define reg_cdpf_fdiw6_pos 0
#define reg_cdpf_fdiw6_len 7
#define reg_cdpf_fdiw6_lsb 0
#define xd_p_reg_cdpf_fdiw7 (*(volatile byte xdata *) 0xF607)
#define    p_reg_cdpf_fdiw7 0xF607
#define reg_cdpf_fdiw7_pos 0
#define reg_cdpf_fdiw7_len 7
#define reg_cdpf_fdiw7_lsb 0
#define xd_r_reg_cdpf_fdiwindowsize (*(volatile byte xdata *) 0xF608)
#define    r_reg_cdpf_fdiwindowsize 0xF608
#define reg_cdpf_fdiwindowsize_pos 0
#define reg_cdpf_fdiwindowsize_len 4
#define reg_cdpf_fdiwindowsize_lsb 0
#define xd_p_reg_stes_mode  (*(volatile byte xdata *) 0xF609)
#define    p_reg_stes_mode  0xF609
#define reg_stes_mode_pos 0
#define reg_stes_mode_len 1
#define reg_stes_mode_lsb 0
#define xd_p_reg_stes_done_st   (*(volatile byte xdata *) 0xF60A)
#define    p_reg_stes_done_st   0xF60A
#define reg_stes_done_st_pos 0
#define reg_stes_done_st_len 2
#define reg_stes_done_st_lsb 0
#define xd_p_reg_stes_done  (*(volatile byte xdata *) 0xF60B)
#define    p_reg_stes_done  0xF60B
#define reg_stes_done_pos 0
#define reg_stes_done_len 1
#define reg_stes_done_lsb 0
#define xd_p_reg_stes_timing_7_0    (*(volatile byte xdata *) 0xF60C)
#define    p_reg_stes_timing_7_0    0xF60C
#define reg_stes_timing_7_0_pos 0
#define reg_stes_timing_7_0_len 8
#define reg_stes_timing_7_0_lsb 0
#define xd_p_reg_stes_timing_15_8   (*(volatile byte xdata *) 0xF60D)
#define    p_reg_stes_timing_15_8   0xF60D
#define reg_stes_timing_15_8_pos 0
#define reg_stes_timing_15_8_len 8
#define reg_stes_timing_15_8_lsb 8
#define xd_p_reg_stes_sym_tot_adj_thre_7_0  (*(volatile byte xdata *) 0xF60E)
#define    p_reg_stes_sym_tot_adj_thre_7_0  0xF60E
#define reg_stes_sym_tot_adj_thre_7_0_pos 0
#define reg_stes_sym_tot_adj_thre_7_0_len 8
#define reg_stes_sym_tot_adj_thre_7_0_lsb 0
#define xd_p_reg_stes_sym_tot_adj_thre_15_8 (*(volatile byte xdata *) 0xF60F)
#define    p_reg_stes_sym_tot_adj_thre_15_8 0xF60F
#define reg_stes_sym_tot_adj_thre_15_8_pos 0
#define reg_stes_sym_tot_adj_thre_15_8_len 8
#define reg_stes_sym_tot_adj_thre_15_8_lsb 8
#define xd_p_reg_stes_sym_thre_9_2  (*(volatile byte xdata *) 0xF610)
#define    p_reg_stes_sym_thre_9_2  0xF610
#define reg_stes_sym_thre_9_2_pos 0
#define reg_stes_sym_thre_9_2_len 8
#define reg_stes_sym_thre_9_2_lsb 0
#define xd_p_reg_stes_sym_wo_adj_thre_9_2   (*(volatile byte xdata *) 0xF611)
#define    p_reg_stes_sym_wo_adj_thre_9_2   0xF611
#define reg_stes_sym_wo_adj_thre_9_2_pos 0
#define reg_stes_sym_wo_adj_thre_9_2_len 8
#define reg_stes_sym_wo_adj_thre_9_2_lsb 0
#define xd_p_reg_fste_i_adj_7_0 (*(volatile byte xdata *) 0xF612)
#define    p_reg_fste_i_adj_7_0 0xF612
#define reg_fste_i_adj_7_0_pos 0
#define reg_fste_i_adj_7_0_len 8
#define reg_fste_i_adj_7_0_lsb 0
#define xd_p_reg_fste_i_adj_15_8    (*(volatile byte xdata *) 0xF613)
#define    p_reg_fste_i_adj_15_8    0xF613
#define reg_fste_i_adj_15_8_pos 0
#define reg_fste_i_adj_15_8_len 8
#define reg_fste_i_adj_15_8_lsb 8
#define xd_r_fd_stes_iadj_val_7_0   (*(volatile byte xdata *) 0xF614)
#define    r_fd_stes_iadj_val_7_0   0xF614
#define fd_stes_iadj_val_7_0_pos 0
#define fd_stes_iadj_val_7_0_len 8
#define fd_stes_iadj_val_7_0_lsb 0
#define xd_r_fd_stes_iadj_val_15_8  (*(volatile byte xdata *) 0xF615)
#define    r_fd_stes_iadj_val_15_8  0xF615
#define fd_stes_iadj_val_15_8_pos 0
#define fd_stes_iadj_val_15_8_len 8
#define fd_stes_iadj_val_15_8_lsb 8
#define xd_r_fd_stes_symb_cnt_9_2   (*(volatile byte xdata *) 0xF616)
#define    r_fd_stes_symb_cnt_9_2   0xF616
#define fd_stes_symb_cnt_9_2_pos 0
#define fd_stes_symb_cnt_9_2_len 8
#define fd_stes_symb_cnt_9_2_lsb 0
#define xd_r_fd_stes_snoi_cnt_9_2   (*(volatile byte xdata *) 0xF617)
#define    r_fd_stes_snoi_cnt_9_2   0xF617
#define fd_stes_snoi_cnt_9_2_pos 0
#define fd_stes_snoi_cnt_9_2_len 8
#define fd_stes_snoi_cnt_9_2_lsb 0
#define xd_r_fd_last_iadj_val_7_0   (*(volatile byte xdata *) 0xF618)
#define    r_fd_last_iadj_val_7_0   0xF618
#define fd_last_iadj_val_7_0_pos 0
#define fd_last_iadj_val_7_0_len 8
#define fd_last_iadj_val_7_0_lsb 0
#define xd_r_fd_last_iadj_val_15_8  (*(volatile byte xdata *) 0xF619)
#define    r_fd_last_iadj_val_15_8  0xF619
#define fd_last_iadj_val_15_8_pos 0
#define fd_last_iadj_val_15_8_len 8
#define fd_last_iadj_val_15_8_lsb 8
#define xd_p_reg_stes_bypass    (*(volatile byte xdata *) 0xF61A)
#define    p_reg_stes_bypass    0xF61A
#define reg_stes_bypass_pos 0
#define reg_stes_bypass_len 1
#define reg_stes_bypass_lsb 0
#define xd_p_reg_stes_best_timing_idx   (*(volatile byte xdata *) 0xF61B)
#define    p_reg_stes_best_timing_idx   0xF61B
#define reg_stes_best_timing_idx_pos 0
#define reg_stes_best_timing_idx_len 4
#define reg_stes_best_timing_idx_lsb 0
#define xd_p_reg_stes_iadj_val_7_0  (*(volatile byte xdata *) 0xF61C)
#define    p_reg_stes_iadj_val_7_0  0xF61C
#define reg_stes_iadj_val_7_0_pos 0
#define reg_stes_iadj_val_7_0_len 8
#define reg_stes_iadj_val_7_0_lsb 0
#define xd_p_reg_stes_iadj_val_15_8 (*(volatile byte xdata *) 0xF61D)
#define    p_reg_stes_iadj_val_15_8 0xF61D
#define reg_stes_iadj_val_15_8_pos 0
#define reg_stes_iadj_val_15_8_len 8
#define reg_stes_iadj_val_15_8_lsb 8
#define xd_p_reg_p_ste_start_guard_7_0  (*(volatile byte xdata *) 0xF620)
#define    p_reg_p_ste_start_guard_7_0  0xF620
#define reg_p_ste_start_guard_7_0_pos 0
#define reg_p_ste_start_guard_7_0_len 8
#define reg_p_ste_start_guard_7_0_lsb 0
#define xd_p_reg_p_ste_start_guard_9_8  (*(volatile byte xdata *) 0xF621)
#define    p_reg_p_ste_start_guard_9_8  0xF621
#define reg_p_ste_start_guard_9_8_pos 0
#define reg_p_ste_start_guard_9_8_len 2
#define reg_p_ste_start_guard_9_8_lsb 8
#define xd_p_reg_p_ste_end_guard_7_0    (*(volatile byte xdata *) 0xF622)
#define    p_reg_p_ste_end_guard_7_0    0xF622
#define reg_p_ste_end_guard_7_0_pos 0
#define reg_p_ste_end_guard_7_0_len 8
#define reg_p_ste_end_guard_7_0_lsb 0
#define xd_p_reg_p_ste_end_guard_9_8    (*(volatile byte xdata *) 0xF623)
#define    p_reg_p_ste_end_guard_9_8    0xF623
#define reg_p_ste_end_guard_9_8_pos 0
#define reg_p_ste_end_guard_9_8_len 2
#define reg_p_ste_end_guard_9_8_lsb 8
#define xd_r_reg_r_ste_wrong_beacon_count   (*(volatile byte xdata *) 0xF624)
#define    r_reg_r_ste_wrong_beacon_count   0xF624
#define reg_r_ste_wrong_beacon_count_pos 0
#define reg_r_ste_wrong_beacon_count_len 7
#define reg_r_ste_wrong_beacon_count_lsb 0
#define xd_p_reg_p_fccid_en (*(volatile byte xdata *) 0xF625)
#define    p_reg_p_fccid_en 0xF625
#define reg_p_fccid_en_pos 0
#define reg_p_fccid_en_len 1
#define reg_p_fccid_en_lsb 0
#define xd_p_reg_p_fccid_fft_ave_symbol_num (*(volatile byte xdata *) 0xF626)
#define    p_reg_p_fccid_fft_ave_symbol_num 0xF626
#define reg_p_fccid_fft_ave_symbol_num_pos 0
#define reg_p_fccid_fft_ave_symbol_num_len 6
#define reg_p_fccid_fft_ave_symbol_num_lsb 0
#define xd_p_reg_p_fccid_fft_work_start_tone_7_0    (*(volatile byte xdata *) 0xF627)
#define    p_reg_p_fccid_fft_work_start_tone_7_0    0xF627
#define reg_p_fccid_fft_work_start_tone_7_0_pos 0
#define reg_p_fccid_fft_work_start_tone_7_0_len 8
#define reg_p_fccid_fft_work_start_tone_7_0_lsb 0
#define xd_p_reg_p_fccid_fft_work_start_tone_12_8   (*(volatile byte xdata *) 0xF628)
#define    p_reg_p_fccid_fft_work_start_tone_12_8   0xF628
#define reg_p_fccid_fft_work_start_tone_12_8_pos 0
#define reg_p_fccid_fft_work_start_tone_12_8_len 5
#define reg_p_fccid_fft_work_start_tone_12_8_lsb 8
#define xd_p_reg_p_fccid_fft_work_end_tone_7_0  (*(volatile byte xdata *) 0xF629)
#define    p_reg_p_fccid_fft_work_end_tone_7_0  0xF629
#define reg_p_fccid_fft_work_end_tone_7_0_pos 0
#define reg_p_fccid_fft_work_end_tone_7_0_len 8
#define reg_p_fccid_fft_work_end_tone_7_0_lsb 0
#define xd_p_reg_p_fccid_fft_work_end_tone_12_8 (*(volatile byte xdata *) 0xF62A)
#define    p_reg_p_fccid_fft_work_end_tone_12_8 0xF62A
#define reg_p_fccid_fft_work_end_tone_12_8_pos 0
#define reg_p_fccid_fft_work_end_tone_12_8_len 5
#define reg_p_fccid_fft_work_end_tone_12_8_lsb 8
#define xd_p_reg_p_fccid_peak_to_th_divider (*(volatile byte xdata *) 0xF62B)
#define    p_reg_p_fccid_peak_to_th_divider 0xF62B
#define reg_p_fccid_peak_to_th_divider_pos 0
#define reg_p_fccid_peak_to_th_divider_len 4
#define reg_p_fccid_peak_to_th_divider_lsb 0
#define xd_p_reg_p_fccid_peak_to_th_mode    (*(volatile byte xdata *) 0xF62C)
#define    p_reg_p_fccid_peak_to_th_mode    0xF62C
#define reg_p_fccid_peak_to_th_mode_pos 0
#define reg_p_fccid_peak_to_th_mode_len 2
#define reg_p_fccid_peak_to_th_mode_lsb 0
#define xd_p_reg_p_fccid_search_mode    (*(volatile byte xdata *) 0xF62D)
#define    p_reg_p_fccid_search_mode    0xF62D
#define reg_p_fccid_search_mode_pos 0
#define reg_p_fccid_search_mode_len 1
#define reg_p_fccid_search_mode_lsb 0
#define xd_p_reg_p_fccid_group_th   (*(volatile byte xdata *) 0xF62E)
#define    p_reg_p_fccid_group_th   0xF62E
#define reg_p_fccid_group_th_pos 0
#define reg_p_fccid_group_th_len 7
#define reg_p_fccid_group_th_lsb 0
#define xd_p_reg_p_fccid_search_rdy (*(volatile byte xdata *) 0xF62F)
#define    p_reg_p_fccid_search_rdy 0xF62F
#define reg_p_fccid_search_rdy_pos 0
#define reg_p_fccid_search_rdy_len 1
#define reg_p_fccid_search_rdy_lsb 0
#define xd_r_reg_r_fccid_fft_ave_read_out_7_0   (*(volatile byte xdata *) 0xF630)
#define    r_reg_r_fccid_fft_ave_read_out_7_0   0xF630
#define reg_r_fccid_fft_ave_read_out_7_0_pos 0
#define reg_r_fccid_fft_ave_read_out_7_0_len 8
#define reg_r_fccid_fft_ave_read_out_7_0_lsb 0
#define xd_r_reg_r_fccid_fft_ave_read_out_15_8  (*(volatile byte xdata *) 0xF631)
#define    r_reg_r_fccid_fft_ave_read_out_15_8  0xF631
#define reg_r_fccid_fft_ave_read_out_15_8_pos 0
#define reg_r_fccid_fft_ave_read_out_15_8_len 8
#define reg_r_fccid_fft_ave_read_out_15_8_lsb 8
#define xd_r_reg_r_fccid_large_tone_num_7_0 (*(volatile byte xdata *) 0xF632)
#define    r_reg_r_fccid_large_tone_num_7_0 0xF632
#define reg_r_fccid_large_tone_num_7_0_pos 0
#define reg_r_fccid_large_tone_num_7_0_len 8
#define reg_r_fccid_large_tone_num_7_0_lsb 0
#define xd_r_reg_r_fccid_large_tone_num_12_8    (*(volatile byte xdata *) 0xF633)
#define    r_reg_r_fccid_large_tone_num_12_8    0xF633
#define reg_r_fccid_large_tone_num_12_8_pos 0
#define reg_r_fccid_large_tone_num_12_8_len 5
#define reg_r_fccid_large_tone_num_12_8_lsb 8
#define xd_r_reg_r_fccid_cci1_start_tone_7_0    (*(volatile byte xdata *) 0xF634)
#define    r_reg_r_fccid_cci1_start_tone_7_0    0xF634
#define reg_r_fccid_cci1_start_tone_7_0_pos 0
#define reg_r_fccid_cci1_start_tone_7_0_len 8
#define reg_r_fccid_cci1_start_tone_7_0_lsb 0
#define xd_r_reg_r_fccid_cci1_start_tone_12_8   (*(volatile byte xdata *) 0xF635)
#define    r_reg_r_fccid_cci1_start_tone_12_8   0xF635
#define reg_r_fccid_cci1_start_tone_12_8_pos 0
#define reg_r_fccid_cci1_start_tone_12_8_len 5
#define reg_r_fccid_cci1_start_tone_12_8_lsb 8
#define xd_r_reg_r_fccid_cci1_end_tone_7_0  (*(volatile byte xdata *) 0xF636)
#define    r_reg_r_fccid_cci1_end_tone_7_0  0xF636
#define reg_r_fccid_cci1_end_tone_7_0_pos 0
#define reg_r_fccid_cci1_end_tone_7_0_len 8
#define reg_r_fccid_cci1_end_tone_7_0_lsb 0
#define xd_r_reg_r_fccid_cci1_end_tone_12_8 (*(volatile byte xdata *) 0xF637)
#define    r_reg_r_fccid_cci1_end_tone_12_8 0xF637
#define reg_r_fccid_cci1_end_tone_12_8_pos 0
#define reg_r_fccid_cci1_end_tone_12_8_len 5
#define reg_r_fccid_cci1_end_tone_12_8_lsb 8
#define xd_r_reg_r_fccid_cci1_peak_7_0  (*(volatile byte xdata *) 0xF638)
#define    r_reg_r_fccid_cci1_peak_7_0  0xF638
#define reg_r_fccid_cci1_peak_7_0_pos 0
#define reg_r_fccid_cci1_peak_7_0_len 8
#define reg_r_fccid_cci1_peak_7_0_lsb 0
#define xd_r_reg_r_fccid_cci1_peak_15_8 (*(volatile byte xdata *) 0xF639)
#define    r_reg_r_fccid_cci1_peak_15_8 0xF639
#define reg_r_fccid_cci1_peak_15_8_pos 0
#define reg_r_fccid_cci1_peak_15_8_len 8
#define reg_r_fccid_cci1_peak_15_8_lsb 8
#define xd_r_reg_r_fccid_cci2_start_tone_7_0    (*(volatile byte xdata *) 0xF63A)
#define    r_reg_r_fccid_cci2_start_tone_7_0    0xF63A
#define reg_r_fccid_cci2_start_tone_7_0_pos 0
#define reg_r_fccid_cci2_start_tone_7_0_len 8
#define reg_r_fccid_cci2_start_tone_7_0_lsb 0
#define xd_r_reg_r_fccid_cci2_start_tone_12_8   (*(volatile byte xdata *) 0xF63B)
#define    r_reg_r_fccid_cci2_start_tone_12_8   0xF63B
#define reg_r_fccid_cci2_start_tone_12_8_pos 0
#define reg_r_fccid_cci2_start_tone_12_8_len 5
#define reg_r_fccid_cci2_start_tone_12_8_lsb 8
#define xd_r_reg_r_fccid_cci2_end_tone_7_0  (*(volatile byte xdata *) 0xF63C)
#define    r_reg_r_fccid_cci2_end_tone_7_0  0xF63C
#define reg_r_fccid_cci2_end_tone_7_0_pos 0
#define reg_r_fccid_cci2_end_tone_7_0_len 8
#define reg_r_fccid_cci2_end_tone_7_0_lsb 0
#define xd_r_reg_r_fccid_cci2_end_tone_12_8 (*(volatile byte xdata *) 0xF63D)
#define    r_reg_r_fccid_cci2_end_tone_12_8 0xF63D
#define reg_r_fccid_cci2_end_tone_12_8_pos 0
#define reg_r_fccid_cci2_end_tone_12_8_len 5
#define reg_r_fccid_cci2_end_tone_12_8_lsb 8
#define xd_r_reg_r_fccid_cci2_peak_7_0  (*(volatile byte xdata *) 0xF63E)
#define    r_reg_r_fccid_cci2_peak_7_0  0xF63E
#define reg_r_fccid_cci2_peak_7_0_pos 0
#define reg_r_fccid_cci2_peak_7_0_len 8
#define reg_r_fccid_cci2_peak_7_0_lsb 0
#define xd_r_reg_r_fccid_cci2_peak_15_8 (*(volatile byte xdata *) 0xF63F)
#define    r_reg_r_fccid_cci2_peak_15_8 0xF63F
#define reg_r_fccid_cci2_peak_15_8_pos 0
#define reg_r_fccid_cci2_peak_15_8_len 8
#define reg_r_fccid_cci2_peak_15_8_lsb 8
#define xd_r_reg_r_fccid_cci3_start_tone_7_0    (*(volatile byte xdata *) 0xF640)
#define    r_reg_r_fccid_cci3_start_tone_7_0    0xF640
#define reg_r_fccid_cci3_start_tone_7_0_pos 0
#define reg_r_fccid_cci3_start_tone_7_0_len 8
#define reg_r_fccid_cci3_start_tone_7_0_lsb 0
#define xd_r_reg_r_fccid_cci3_start_tone_12_8   (*(volatile byte xdata *) 0xF641)
#define    r_reg_r_fccid_cci3_start_tone_12_8   0xF641
#define reg_r_fccid_cci3_start_tone_12_8_pos 0
#define reg_r_fccid_cci3_start_tone_12_8_len 5
#define reg_r_fccid_cci3_start_tone_12_8_lsb 8
#define xd_r_reg_r_fccid_cci3_end_tone_7_0  (*(volatile byte xdata *) 0xF642)
#define    r_reg_r_fccid_cci3_end_tone_7_0  0xF642
#define reg_r_fccid_cci3_end_tone_7_0_pos 0
#define reg_r_fccid_cci3_end_tone_7_0_len 8
#define reg_r_fccid_cci3_end_tone_7_0_lsb 0
#define xd_r_reg_r_fccid_cci3_end_tone_12_8 (*(volatile byte xdata *) 0xF643)
#define    r_reg_r_fccid_cci3_end_tone_12_8 0xF643
#define reg_r_fccid_cci3_end_tone_12_8_pos 0
#define reg_r_fccid_cci3_end_tone_12_8_len 5
#define reg_r_fccid_cci3_end_tone_12_8_lsb 8
#define xd_r_reg_r_fccid_cci3_peak_7_0  (*(volatile byte xdata *) 0xF644)
#define    r_reg_r_fccid_cci3_peak_7_0  0xF644
#define reg_r_fccid_cci3_peak_7_0_pos 0
#define reg_r_fccid_cci3_peak_7_0_len 8
#define reg_r_fccid_cci3_peak_7_0_lsb 0
#define xd_r_reg_r_fccid_cci3_peak_15_8 (*(volatile byte xdata *) 0xF645)
#define    r_reg_r_fccid_cci3_peak_15_8 0xF645
#define reg_r_fccid_cci3_peak_15_8_pos 0
#define reg_r_fccid_cci3_peak_15_8_len 8
#define reg_r_fccid_cci3_peak_15_8_lsb 8
#define xd_r_reg_r_fccid_cci4_start_tone_7_0    (*(volatile byte xdata *) 0xF646)
#define    r_reg_r_fccid_cci4_start_tone_7_0    0xF646
#define reg_r_fccid_cci4_start_tone_7_0_pos 0
#define reg_r_fccid_cci4_start_tone_7_0_len 8
#define reg_r_fccid_cci4_start_tone_7_0_lsb 0
#define xd_r_reg_r_fccid_cci4_start_tone_12_8   (*(volatile byte xdata *) 0xF647)
#define    r_reg_r_fccid_cci4_start_tone_12_8   0xF647
#define reg_r_fccid_cci4_start_tone_12_8_pos 0
#define reg_r_fccid_cci4_start_tone_12_8_len 5
#define reg_r_fccid_cci4_start_tone_12_8_lsb 8
#define xd_r_reg_r_fccid_cci4_end_tone_7_0  (*(volatile byte xdata *) 0xF648)
#define    r_reg_r_fccid_cci4_end_tone_7_0  0xF648
#define reg_r_fccid_cci4_end_tone_7_0_pos 0
#define reg_r_fccid_cci4_end_tone_7_0_len 8
#define reg_r_fccid_cci4_end_tone_7_0_lsb 0
#define xd_r_reg_r_fccid_cci4_end_tone_12_8 (*(volatile byte xdata *) 0xF649)
#define    r_reg_r_fccid_cci4_end_tone_12_8 0xF649
#define reg_r_fccid_cci4_end_tone_12_8_pos 0
#define reg_r_fccid_cci4_end_tone_12_8_len 5
#define reg_r_fccid_cci4_end_tone_12_8_lsb 8
#define xd_r_reg_r_fccid_cci4_peak_7_0  (*(volatile byte xdata *) 0xF64A)
#define    r_reg_r_fccid_cci4_peak_7_0  0xF64A
#define reg_r_fccid_cci4_peak_7_0_pos 0
#define reg_r_fccid_cci4_peak_7_0_len 8
#define reg_r_fccid_cci4_peak_7_0_lsb 0
#define xd_r_reg_r_fccid_cci4_peak_15_8 (*(volatile byte xdata *) 0xF64B)
#define    r_reg_r_fccid_cci4_peak_15_8 0xF64B
#define reg_r_fccid_cci4_peak_15_8_pos 0
#define reg_r_fccid_cci4_peak_15_8_len 8
#define reg_r_fccid_cci4_peak_15_8_lsb 8
#define xd_r_reg_r_fccid_cci1_rank  (*(volatile byte xdata *) 0xF64C)
#define    r_reg_r_fccid_cci1_rank  0xF64C
#define reg_r_fccid_cci1_rank_pos 0
#define reg_r_fccid_cci1_rank_len 3
#define reg_r_fccid_cci1_rank_lsb 0
#define xd_r_reg_r_fccid_cci2_rank  (*(volatile byte xdata *) 0xF64D)
#define    r_reg_r_fccid_cci2_rank  0xF64D
#define reg_r_fccid_cci2_rank_pos 0
#define reg_r_fccid_cci2_rank_len 3
#define reg_r_fccid_cci2_rank_lsb 0
#define xd_r_reg_r_fccid_cci3_rank  (*(volatile byte xdata *) 0xF64E)
#define    r_reg_r_fccid_cci3_rank  0xF64E
#define reg_r_fccid_cci3_rank_pos 0
#define reg_r_fccid_cci3_rank_len 3
#define reg_r_fccid_cci3_rank_lsb 0
#define xd_r_reg_r_fccid_cci4_rank  (*(volatile byte xdata *) 0xF64F)
#define    r_reg_r_fccid_cci4_rank  0xF64F
#define reg_r_fccid_cci4_rank_pos 0
#define reg_r_fccid_cci4_rank_len 3
#define reg_r_fccid_cci4_rank_lsb 0
#define xd_p_reg_p_csi_shift3   (*(volatile byte xdata *) 0xF650)
#define    p_reg_p_csi_shift3   0xF650
#define reg_p_csi_shift3_pos 0
#define reg_p_csi_shift3_len 4
#define reg_p_csi_shift3_lsb 0
#define xd_p_reg_p_csi_mul3 (*(volatile byte xdata *) 0xF651)
#define    p_reg_p_csi_mul3 0xF651
#define reg_p_csi_mul3_pos 0
#define reg_p_csi_mul3_len 8
#define reg_p_csi_mul3_lsb 0
#define xd_p_reg_p_csi_level3_7_0   (*(volatile byte xdata *) 0xF652)
#define    p_reg_p_csi_level3_7_0   0xF652
#define reg_p_csi_level3_7_0_pos 0
#define reg_p_csi_level3_7_0_len 8
#define reg_p_csi_level3_7_0_lsb 0
#define xd_p_reg_p_csi_level3_8 (*(volatile byte xdata *) 0xF653)
#define    p_reg_p_csi_level3_8 0xF653
#define reg_p_csi_level3_8_pos 0
#define reg_p_csi_level3_8_len 1
#define reg_p_csi_level3_8_lsb 8
#define xd_p_reg_p_csi_fftout_shift_fix_value   (*(volatile byte xdata *) 0xF654)
#define    p_reg_p_csi_fftout_shift_fix_value   0xF654
#define reg_p_csi_fftout_shift_fix_value_pos 0
#define reg_p_csi_fftout_shift_fix_value_len 4
#define reg_p_csi_fftout_shift_fix_value_lsb 0
#define xd_p_reg_p_feq_scale_pow    (*(volatile byte xdata *) 0xF655)
#define    p_reg_p_feq_scale_pow    0xF655
#define reg_p_feq_scale_pow_pos 0
#define reg_p_feq_scale_pow_len 6
#define reg_p_feq_scale_pow_lsb 0
#define xd_p_reg_p_csi_cp_idx   (*(volatile byte xdata *) 0xF656)
#define    p_reg_p_csi_cp_idx   0xF656
#define reg_p_csi_cp_idx_pos 0
#define reg_p_csi_cp_idx_len 8
#define reg_p_csi_cp_idx_lsb 0
#define xd_p_reg_p_csi_outsh_zero_th_7_0    (*(volatile byte xdata *) 0xF657)
#define    p_reg_p_csi_outsh_zero_th_7_0    0xF657
#define reg_p_csi_outsh_zero_th_7_0_pos 0
#define reg_p_csi_outsh_zero_th_7_0_len 8
#define reg_p_csi_outsh_zero_th_7_0_lsb 0
#define xd_p_reg_p_csi_outsh_zero_th_10_8   (*(volatile byte xdata *) 0xF658)
#define    p_reg_p_csi_outsh_zero_th_10_8   0xF658
#define reg_p_csi_outsh_zero_th_10_8_pos 0
#define reg_p_csi_outsh_zero_th_10_8_len 3
#define reg_p_csi_outsh_zero_th_10_8_lsb 8
#define xd_p_reg_p_csi_ar_ratio (*(volatile byte xdata *) 0xF659)
#define    p_reg_p_csi_ar_ratio 0xF659
#define reg_p_csi_ar_ratio_pos 0
#define reg_p_csi_ar_ratio_len 8
#define reg_p_csi_ar_ratio_lsb 0
#define xd_p_reg_r_csi_cp_vld   (*(volatile byte xdata *) 0xF65A)
#define    p_reg_r_csi_cp_vld   0xF65A
#define reg_r_csi_cp_vld_pos 0
#define reg_r_csi_cp_vld_len 1
#define reg_r_csi_cp_vld_lsb 0
#define xd_p_reg_r_csi_sp_vld   (*(volatile byte xdata *) 0xF65B)
#define    p_reg_r_csi_sp_vld   0xF65B
#define reg_r_csi_sp_vld_pos 0
#define reg_r_csi_sp_vld_len 1
#define reg_r_csi_sp_vld_lsb 0
#define xd_p_reg_p_csi_fft_out_shift_en (*(volatile byte xdata *) 0xF65C)
#define    p_reg_p_csi_fft_out_shift_en 0xF65C
#define reg_p_csi_fft_out_shift_en_pos 0
#define reg_p_csi_fft_out_shift_en_len 1
#define reg_p_csi_fft_out_shift_en_lsb 0
#define xd_p_reg_p_csi_feq_out_shift_en (*(volatile byte xdata *) 0xF65D)
#define    p_reg_p_csi_feq_out_shift_en 0xF65D
#define reg_p_csi_feq_out_shift_en_pos 0
#define reg_p_csi_feq_out_shift_en_len 1
#define reg_p_csi_feq_out_shift_en_lsb 0
#define xd_p_reg_r_csi_cp_fft_out   (*(volatile byte xdata *) 0xF65E)
#define    p_reg_r_csi_cp_fft_out   0xF65E
#define reg_r_csi_cp_fft_out_pos 0
#define reg_r_csi_cp_fft_out_len 1
#define reg_r_csi_cp_fft_out_lsb 0
#define xd_p_reg_r_csi_sp_feq_log2_out  (*(volatile byte xdata *) 0xF65F)
#define    p_reg_r_csi_sp_feq_log2_out  0xF65F
#define reg_r_csi_sp_feq_log2_out_pos 0
#define reg_r_csi_sp_feq_log2_out_len 8
#define reg_r_csi_sp_feq_log2_out_lsb 0
#define xd_p_reg_r_csi_sp_fft_out   (*(volatile byte xdata *) 0xF660)
#define    p_reg_r_csi_sp_fft_out   0xF660
#define reg_r_csi_sp_fft_out_pos 0
#define reg_r_csi_sp_fft_out_len 1
#define reg_r_csi_sp_fft_out_lsb 0
#define xd_p_reg_p_feq_eh2_from_fpcc_en (*(volatile byte xdata *) 0xF661)
#define    p_reg_p_feq_eh2_from_fpcc_en 0xF661
#define reg_p_feq_eh2_from_fpcc_en_pos 0
#define reg_p_feq_eh2_from_fpcc_en_len 1
#define reg_p_feq_eh2_from_fpcc_en_lsb 0
#define xd_r_reg_r_fccid_fft_ave_peak_7_0   (*(volatile byte xdata *) 0xF662)
#define    r_reg_r_fccid_fft_ave_peak_7_0   0xF662
#define reg_r_fccid_fft_ave_peak_7_0_pos 0
#define reg_r_fccid_fft_ave_peak_7_0_len 8
#define reg_r_fccid_fft_ave_peak_7_0_lsb 0
#define xd_r_reg_r_fccid_fft_ave_peak_15_8  (*(volatile byte xdata *) 0xF663)
#define    r_reg_r_fccid_fft_ave_peak_15_8  0xF663
#define reg_r_fccid_fft_ave_peak_15_8_pos 0
#define reg_r_fccid_fft_ave_peak_15_8_len 8
#define reg_r_fccid_fft_ave_peak_15_8_lsb 8
#define xd_r_reg_r_fccid_fft_ave_peak_23_16 (*(volatile byte xdata *) 0xF664)
#define    r_reg_r_fccid_fft_ave_peak_23_16 0xF664
#define reg_r_fccid_fft_ave_peak_23_16_pos 0
#define reg_r_fccid_fft_ave_peak_23_16_len 8
#define reg_r_fccid_fft_ave_peak_23_16_lsb 16
#define xd_r_reg_r_fccid_fft_ave_peak_26_24 (*(volatile byte xdata *) 0xF665)
#define    r_reg_r_fccid_fft_ave_peak_26_24 0xF665
#define reg_r_fccid_fft_ave_peak_26_24_pos 0
#define reg_r_fccid_fft_ave_peak_26_24_len 3
#define reg_r_fccid_fft_ave_peak_26_24_lsb 24
#define xd_p_reg_p_fccid_fft_ave_read_rdy   (*(volatile byte xdata *) 0xF666)
#define    p_reg_p_fccid_fft_ave_read_rdy   0xF666
#define reg_p_fccid_fft_ave_read_rdy_pos 0
#define reg_p_fccid_fft_ave_read_rdy_len 1
#define reg_p_fccid_fft_ave_read_rdy_lsb 0
#define xd_p_reg_p_fccid_fft_ave_read_index_7_0 (*(volatile byte xdata *) 0xF667)
#define    p_reg_p_fccid_fft_ave_read_index_7_0 0xF667
#define reg_p_fccid_fft_ave_read_index_7_0_pos 0
#define reg_p_fccid_fft_ave_read_index_7_0_len 8
#define reg_p_fccid_fft_ave_read_index_7_0_lsb 0
#define xd_p_reg_p_fccid_fft_ave_read_index_12_8    (*(volatile byte xdata *) 0xF668)
#define    p_reg_p_fccid_fft_ave_read_index_12_8    0xF668
#define reg_p_fccid_fft_ave_read_index_12_8_pos 0
#define reg_p_fccid_fft_ave_read_index_12_8_len 5
#define reg_p_fccid_fft_ave_read_index_12_8_lsb 8
#define xd_p_reg_cdpf_candidate_rw  (*(volatile byte xdata *) 0xF669)
#define    p_reg_cdpf_candidate_rw  0xF669
#define reg_cdpf_candidate_rw_pos 0
#define reg_cdpf_candidate_rw_len 1
#define reg_cdpf_candidate_rw_lsb 0
#define xd_p_reg_cdpf_candidate_prog_7_0    (*(volatile byte xdata *) 0xF66A)
#define    p_reg_cdpf_candidate_prog_7_0    0xF66A
#define reg_cdpf_candidate_prog_7_0_pos 0
#define reg_cdpf_candidate_prog_7_0_len 8
#define reg_cdpf_candidate_prog_7_0_lsb 0
#define xd_p_reg_cdpf_candidate_prog_15_8   (*(volatile byte xdata *) 0xF66B)
#define    p_reg_cdpf_candidate_prog_15_8   0xF66B
#define reg_cdpf_candidate_prog_15_8_pos 0
#define reg_cdpf_candidate_prog_15_8_len 8
#define reg_cdpf_candidate_prog_15_8_lsb 8
#define xd_p_reg_cdpf_candidateno_prog  (*(volatile byte xdata *) 0xF66C)
#define    p_reg_cdpf_candidateno_prog  0xF66C
#define reg_cdpf_candidateno_prog_pos 0
#define reg_cdpf_candidateno_prog_len 6
#define reg_cdpf_candidateno_prog_lsb 0
#define xd_p_reg_cdpf_candidateno_switch    (*(volatile byte xdata *) 0xF66D)
#define    p_reg_cdpf_candidateno_switch    0xF66D
#define reg_cdpf_candidateno_switch_pos 0
#define reg_cdpf_candidateno_switch_len 1
#define reg_cdpf_candidateno_switch_lsb 0
#define xd_g_reg_tpsd_txmod (*(volatile byte xdata *) 0xF900)
#define    g_reg_tpsd_txmod 0xF900
#define reg_tpsd_txmod_pos 0
#define reg_tpsd_txmod_len 2
#define reg_tpsd_txmod_lsb 0
#define xd_g_reg_tpsd_gi    (*(volatile byte xdata *) 0xF901)
#define    g_reg_tpsd_gi    0xF901
#define reg_tpsd_gi_pos 0
#define reg_tpsd_gi_len 2
#define reg_tpsd_gi_lsb 0
#define xd_g_reg_tpsd_hier  (*(volatile byte xdata *) 0xF902)
#define    g_reg_tpsd_hier  0xF902
#define reg_tpsd_hier_pos 0
#define reg_tpsd_hier_len 3
#define reg_tpsd_hier_lsb 0
#define xd_g_reg_tpsd_const (*(volatile byte xdata *) 0xF903)
#define    g_reg_tpsd_const 0xF903
#define reg_tpsd_const_pos 0
#define reg_tpsd_const_len 2
#define reg_tpsd_const_lsb 0
#define xd_g_reg_bw (*(volatile byte xdata *) 0xF904)
#define    g_reg_bw 0xF904
#define reg_bw_pos 0
#define reg_bw_len 2
#define reg_bw_lsb 0
#define xd_g_reg_dec_pri    (*(volatile byte xdata *) 0xF905)
#define    g_reg_dec_pri    0xF905
#define reg_dec_pri_pos 0
#define reg_dec_pri_len 1
#define reg_dec_pri_lsb 0
#define xd_g_reg_tpsd_hpcr  (*(volatile byte xdata *) 0xF906)
#define    g_reg_tpsd_hpcr  0xF906
#define reg_tpsd_hpcr_pos 0
#define reg_tpsd_hpcr_len 3
#define reg_tpsd_hpcr_lsb 0
#define xd_g_reg_tpsd_lpcr  (*(volatile byte xdata *) 0xF907)
#define    g_reg_tpsd_lpcr  0xF907
#define reg_tpsd_lpcr_pos 0
#define reg_tpsd_lpcr_len 3
#define reg_tpsd_lpcr_lsb 0
#define xd_g_reg_tpsd_indep (*(volatile byte xdata *) 0xF908)
#define    g_reg_tpsd_indep 0xF908
#define reg_tpsd_indep_pos 0
#define reg_tpsd_indep_len 1
#define reg_tpsd_indep_lsb 0
#define xd_g_reg_tpsd_tslice    (*(volatile byte xdata *) 0xF909)
#define    g_reg_tpsd_tslice    0xF909
#define reg_tpsd_tslice_pos 0
#define reg_tpsd_tslice_len 1
#define reg_tpsd_tslice_lsb 0
#define xd_g_reg_tpsd_mpefec    (*(volatile byte xdata *) 0xF90A)
#define    g_reg_tpsd_mpefec    0xF90A
#define reg_tpsd_mpefec_pos 0
#define reg_tpsd_mpefec_len 1
#define reg_tpsd_mpefec_lsb 0
#define xd_g_reg_sntc_en    (*(volatile byte xdata *) 0xF90B)
#define    g_reg_sntc_en    0xF90B
#define reg_sntc_en_pos 0
#define reg_sntc_en_len 1
#define reg_sntc_en_lsb 0
#define xd_g_reg_intp_sys_div   (*(volatile byte xdata *) 0xF90C)
#define    g_reg_intp_sys_div   0xF90C
#define reg_intp_sys_div_pos 0
#define reg_intp_sys_div_len 1
#define reg_intp_sys_div_lsb 0
#define xd_g_reg_clk_sntc_sel   (*(volatile byte xdata *) 0xF90D)
#define    g_reg_clk_sntc_sel   0xF90D
#define reg_clk_sntc_sel_pos 0
#define reg_clk_sntc_sel_len 3
#define reg_clk_sntc_sel_lsb 0
#define xd_p_reg_ce_gs_force    (*(volatile byte xdata *) 0xFD00)
#define    p_reg_ce_gs_force    0xFD00
#define reg_ce_gs_force_pos 0
#define reg_ce_gs_force_len 1
#define reg_ce_gs_force_lsb 0
#define xd_p_reg_ce_dagcgain_delay  (*(volatile byte xdata *) 0xFD01)
#define    p_reg_ce_dagcgain_delay  0xFD01
#define reg_ce_dagcgain_delay_pos 0
#define reg_ce_dagcgain_delay_len 2
#define reg_ce_dagcgain_delay_lsb 0
#define xd_p_reg_ce_derot_en    (*(volatile byte xdata *) 0xFD02)
#define    p_reg_ce_derot_en    0xFD02
#define reg_ce_derot_en_pos 0
#define reg_ce_derot_en_len 1
#define reg_ce_derot_en_lsb 0
#define xd_p_reg_ce_fctrl_en    (*(volatile byte xdata *) 0xFD05)
#define    p_reg_ce_fctrl_en    0xFD05
#define reg_ce_fctrl_en_pos 0
#define reg_ce_fctrl_en_len 1
#define reg_ce_fctrl_en_lsb 0
#define xd_p_reg_ce_en  (*(volatile byte xdata *) 0xFD06)
#define    p_reg_ce_en  0xFD06
#define reg_ce_en_pos 0
#define reg_ce_en_len 1
#define reg_ce_en_lsb 0
#define xd_p_reg_ce_sat_wes (*(volatile byte xdata *) 0xFD07)
#define    p_reg_ce_sat_wes 0xFD07
#define reg_ce_sat_wes_pos 0
#define reg_ce_sat_wes_len 1
#define reg_ce_sat_wes_lsb 0
#define xd_p_reg_ce_sat_sigma2  (*(volatile byte xdata *) 0xFD08)
#define    p_reg_ce_sat_sigma2  0xFD08
#define reg_ce_sat_sigma2_pos 0
#define reg_ce_sat_sigma2_len 1
#define reg_ce_sat_sigma2_lsb 0
#define xd_p_reg_ce_sat_tdi_br_re   (*(volatile byte xdata *) 0xFD09)
#define    p_reg_ce_sat_tdi_br_re   0xFD09
#define reg_ce_sat_tdi_br_re_pos 0
#define reg_ce_sat_tdi_br_re_len 1
#define reg_ce_sat_tdi_br_re_lsb 0
#define xd_p_reg_ce_sat_tdi_br_im   (*(volatile byte xdata *) 0xFD0A)
#define    p_reg_ce_sat_tdi_br_im   0xFD0A
#define reg_ce_sat_tdi_br_im_pos 0
#define reg_ce_sat_tdi_br_im_len 1
#define reg_ce_sat_tdi_br_im_lsb 0
#define xd_p_reg_ce_sat_tdi_ar_re   (*(volatile byte xdata *) 0xFD0B)
#define    p_reg_ce_sat_tdi_ar_re   0xFD0B
#define reg_ce_sat_tdi_ar_re_pos 0
#define reg_ce_sat_tdi_ar_re_len 1
#define reg_ce_sat_tdi_ar_re_lsb 0
#define xd_p_reg_ce_sat_tdi_ar_im   (*(volatile byte xdata *) 0xFD0C)
#define    p_reg_ce_sat_tdi_ar_im   0xFD0C
#define reg_ce_sat_tdi_ar_im_pos 0
#define reg_ce_sat_tdi_ar_im_len 1
#define reg_ce_sat_tdi_ar_im_lsb 0
#define xd_p_reg_ce_sat_fdi_br_re   (*(volatile byte xdata *) 0xFD0D)
#define    p_reg_ce_sat_fdi_br_re   0xFD0D
#define reg_ce_sat_fdi_br_re_pos 0
#define reg_ce_sat_fdi_br_re_len 1
#define reg_ce_sat_fdi_br_re_lsb 0
#define xd_p_reg_ce_sat_fdi_br_im   (*(volatile byte xdata *) 0xFD0E)
#define    p_reg_ce_sat_fdi_br_im   0xFD0E
#define reg_ce_sat_fdi_br_im_pos 0
#define reg_ce_sat_fdi_br_im_len 1
#define reg_ce_sat_fdi_br_im_lsb 0
#define xd_p_reg_ce_var_forced_value    (*(volatile byte xdata *) 0xFD0F)
#define    p_reg_ce_var_forced_value    0xFD0F
#define reg_ce_var_forced_value_pos 0
#define reg_ce_var_forced_value_len 3
#define reg_ce_var_forced_value_lsb 0
#define xd_p_reg_ce_s1  (*(volatile byte xdata *) 0xFD10)
#define    p_reg_ce_s1  0xFD10
#define reg_ce_s1_pos 0
#define reg_ce_s1_len 5
#define reg_ce_s1_lsb 0
#define xd_r_reg_ce_tdi_flatness_7_0    (*(volatile byte xdata *) 0xFD11)
#define    r_reg_ce_tdi_flatness_7_0    0xFD11
#define reg_ce_tdi_flatness_7_0_pos 0
#define reg_ce_tdi_flatness_7_0_len 8
#define reg_ce_tdi_flatness_7_0_lsb 0
#define xd_r_reg_ce_tdi_flatness_8  (*(volatile byte xdata *) 0xFD12)
#define    r_reg_ce_tdi_flatness_8  0xFD12
#define reg_ce_tdi_flatness_8_pos 0
#define reg_ce_tdi_flatness_8_len 1
#define reg_ce_tdi_flatness_8_lsb 8
#define xd_r_reg_ce_tone_7_0    (*(volatile byte xdata *) 0xFD13)
#define    r_reg_ce_tone_7_0    0xFD13
#define reg_ce_tone_7_0_pos 0
#define reg_ce_tone_7_0_len 8
#define reg_ce_tone_7_0_lsb 0
#define xd_r_reg_ce_tone_12_8   (*(volatile byte xdata *) 0xFD14)
#define    r_reg_ce_tone_12_8   0xFD14
#define reg_ce_tone_12_8_pos 0
#define reg_ce_tone_12_8_len 5
#define reg_ce_tone_12_8_lsb 8
#define xd_p_reg_ce_centroid_drift_th   (*(volatile byte xdata *) 0xFD15)
#define    p_reg_ce_centroid_drift_th   0xFD15
#define reg_ce_centroid_drift_th_pos 0
#define reg_ce_centroid_drift_th_len 8
#define reg_ce_centroid_drift_th_lsb 0
#define xd_p_reg_ce_centroid_bias_inc_7_0   (*(volatile byte xdata *) 0xFD16)
#define    p_reg_ce_centroid_bias_inc_7_0   0xFD16
#define reg_ce_centroid_bias_inc_7_0_pos 0
#define reg_ce_centroid_bias_inc_7_0_len 8
#define reg_ce_centroid_bias_inc_7_0_lsb 0
#define xd_p_reg_ce_centroid_bias_inc_8 (*(volatile byte xdata *) 0xFD17)
#define    p_reg_ce_centroid_bias_inc_8 0xFD17
#define reg_ce_centroid_bias_inc_8_pos 0
#define reg_ce_centroid_bias_inc_8_len 1
#define reg_ce_centroid_bias_inc_8_lsb 8
#define xd_p_reg_ce_centroid_count_max  (*(volatile byte xdata *) 0xFD18)
#define    p_reg_ce_centroid_count_max  0xFD18
#define reg_ce_centroid_count_max_pos 0
#define reg_ce_centroid_count_max_len 4
#define reg_ce_centroid_count_max_lsb 0
#define xd_p_reg_ce_var_th0_7_0 (*(volatile byte xdata *) 0xFD19)
#define    p_reg_ce_var_th0_7_0 0xFD19
#define reg_ce_var_th0_7_0_pos 0
#define reg_ce_var_th0_7_0_len 8
#define reg_ce_var_th0_7_0_lsb 0
#define xd_p_reg_ce_var_th0_15_8    (*(volatile byte xdata *) 0xFD1A)
#define    p_reg_ce_var_th0_15_8    0xFD1A
#define reg_ce_var_th0_15_8_pos 0
#define reg_ce_var_th0_15_8_len 8
#define reg_ce_var_th0_15_8_lsb 8
#define xd_p_reg_ce_var_th1_7_0 (*(volatile byte xdata *) 0xFD1B)
#define    p_reg_ce_var_th1_7_0 0xFD1B
#define reg_ce_var_th1_7_0_pos 0
#define reg_ce_var_th1_7_0_len 8
#define reg_ce_var_th1_7_0_lsb 0
#define xd_p_reg_ce_var_th1_15_8    (*(volatile byte xdata *) 0xFD1C)
#define    p_reg_ce_var_th1_15_8    0xFD1C
#define reg_ce_var_th1_15_8_pos 0
#define reg_ce_var_th1_15_8_len 8
#define reg_ce_var_th1_15_8_lsb 8
#define xd_p_reg_ce_var_th2_7_0 (*(volatile byte xdata *) 0xFD1D)
#define    p_reg_ce_var_th2_7_0 0xFD1D
#define reg_ce_var_th2_7_0_pos 0
#define reg_ce_var_th2_7_0_len 8
#define reg_ce_var_th2_7_0_lsb 0
#define xd_p_reg_ce_var_th2_15_8    (*(volatile byte xdata *) 0xFD1E)
#define    p_reg_ce_var_th2_15_8    0xFD1E
#define reg_ce_var_th2_15_8_pos 0
#define reg_ce_var_th2_15_8_len 8
#define reg_ce_var_th2_15_8_lsb 8
#define xd_p_reg_ce_var_th3_7_0 (*(volatile byte xdata *) 0xFD1F)
#define    p_reg_ce_var_th3_7_0 0xFD1F
#define reg_ce_var_th3_7_0_pos 0
#define reg_ce_var_th3_7_0_len 8
#define reg_ce_var_th3_7_0_lsb 0
#define xd_p_reg_ce_var_th3_15_8    (*(volatile byte xdata *) 0xFD20)
#define    p_reg_ce_var_th3_15_8    0xFD20
#define reg_ce_var_th3_15_8_pos 0
#define reg_ce_var_th3_15_8_len 8
#define reg_ce_var_th3_15_8_lsb 8
#define xd_p_reg_ce_var_th4_7_0 (*(volatile byte xdata *) 0xFD21)
#define    p_reg_ce_var_th4_7_0 0xFD21
#define reg_ce_var_th4_7_0_pos 0
#define reg_ce_var_th4_7_0_len 8
#define reg_ce_var_th4_7_0_lsb 0
#define xd_p_reg_ce_var_th4_15_8    (*(volatile byte xdata *) 0xFD22)
#define    p_reg_ce_var_th4_15_8    0xFD22
#define reg_ce_var_th4_15_8_pos 0
#define reg_ce_var_th4_15_8_len 8
#define reg_ce_var_th4_15_8_lsb 8
#define xd_p_reg_ce_var_th5_7_0 (*(volatile byte xdata *) 0xFD23)
#define    p_reg_ce_var_th5_7_0 0xFD23
#define reg_ce_var_th5_7_0_pos 0
#define reg_ce_var_th5_7_0_len 8
#define reg_ce_var_th5_7_0_lsb 0
#define xd_p_reg_ce_var_th5_15_8    (*(volatile byte xdata *) 0xFD24)
#define    p_reg_ce_var_th5_15_8    0xFD24
#define reg_ce_var_th5_15_8_pos 0
#define reg_ce_var_th5_15_8_len 8
#define reg_ce_var_th5_15_8_lsb 8
#define xd_p_reg_ce_var_th6_7_0 (*(volatile byte xdata *) 0xFD25)
#define    p_reg_ce_var_th6_7_0 0xFD25
#define reg_ce_var_th6_7_0_pos 0
#define reg_ce_var_th6_7_0_len 8
#define reg_ce_var_th6_7_0_lsb 0
#define xd_p_reg_ce_var_th6_15_8    (*(volatile byte xdata *) 0xFD26)
#define    p_reg_ce_var_th6_15_8    0xFD26
#define reg_ce_var_th6_15_8_pos 0
#define reg_ce_var_th6_15_8_len 8
#define reg_ce_var_th6_15_8_lsb 8
#define xd_p_reg_ce_var_max (*(volatile byte xdata *) 0xFD27)
#define    p_reg_ce_var_max 0xFD27
#define reg_ce_var_max_pos 0
#define reg_ce_var_max_len 3
#define reg_ce_var_max_lsb 0
#define xd_p_reg_ce_cent_forced_en  (*(volatile byte xdata *) 0xFD28)
#define    p_reg_ce_cent_forced_en  0xFD28
#define reg_ce_cent_forced_en_pos 0
#define reg_ce_cent_forced_en_len 1
#define reg_ce_cent_forced_en_lsb 0
#define xd_p_reg_ce_var_forced_en   (*(volatile byte xdata *) 0xFD29)
#define    p_reg_ce_var_forced_en   0xFD29
#define reg_ce_var_forced_en_pos 0
#define reg_ce_var_forced_en_len 1
#define reg_ce_var_forced_en_lsb 0
#define xd_p_reg_ce_fctrl_auto_reset_en (*(volatile byte xdata *) 0xFD2A)
#define    p_reg_ce_fctrl_auto_reset_en 0xFD2A
#define reg_ce_fctrl_auto_reset_en_pos 0
#define reg_ce_fctrl_auto_reset_en_len 1
#define reg_ce_fctrl_auto_reset_en_lsb 0
#define xd_p_reg_ce_cent_auto_clr_en    (*(volatile byte xdata *) 0xFD2B)
#define    p_reg_ce_cent_auto_clr_en    0xFD2B
#define reg_ce_cent_auto_clr_en_pos 0
#define reg_ce_cent_auto_clr_en_len 1
#define reg_ce_cent_auto_clr_en_lsb 0
#define xd_p_reg_ce_fctrl_reset (*(volatile byte xdata *) 0xFD2C)
#define    p_reg_ce_fctrl_reset 0xFD2C
#define reg_ce_fctrl_reset_pos 0
#define reg_ce_fctrl_reset_len 1
#define reg_ce_fctrl_reset_lsb 0
#define xd_p_reg_ce_cent_forced_value_7_0   (*(volatile byte xdata *) 0xFD2D)
#define    p_reg_ce_cent_forced_value_7_0   0xFD2D
#define reg_ce_cent_forced_value_7_0_pos 0
#define reg_ce_cent_forced_value_7_0_len 8
#define reg_ce_cent_forced_value_7_0_lsb 0
#define xd_p_reg_ce_cent_forced_value_11_8  (*(volatile byte xdata *) 0xFD2E)
#define    p_reg_ce_cent_forced_value_11_8  0xFD2E
#define reg_ce_cent_forced_value_11_8_pos 0
#define reg_ce_cent_forced_value_11_8_len 4
#define reg_ce_cent_forced_value_11_8_lsb 8
#define xd_p_reg_ce_cent_auto_clr_value_7_0 (*(volatile byte xdata *) 0xFD2F)
#define    p_reg_ce_cent_auto_clr_value_7_0 0xFD2F
#define reg_ce_cent_auto_clr_value_7_0_pos 0
#define reg_ce_cent_auto_clr_value_7_0_len 8
#define reg_ce_cent_auto_clr_value_7_0_lsb 0
#define xd_p_reg_ce_cent_auto_clr_value_11_8    (*(volatile byte xdata *) 0xFD30)
#define    p_reg_ce_cent_auto_clr_value_11_8    0xFD30
#define reg_ce_cent_auto_clr_value_11_8_pos 0
#define reg_ce_cent_auto_clr_value_11_8_len 4
#define reg_ce_cent_auto_clr_value_11_8_lsb 8
#define xd_p_reg_ce_centroid_max_7_0    (*(volatile byte xdata *) 0xFD31)
#define    p_reg_ce_centroid_max_7_0    0xFD31
#define reg_ce_centroid_max_7_0_pos 0
#define reg_ce_centroid_max_7_0_len 8
#define reg_ce_centroid_max_7_0_lsb 0
#define xd_p_reg_ce_centroid_max_11_8   (*(volatile byte xdata *) 0xFD32)
#define    p_reg_ce_centroid_max_11_8   0xFD32
#define reg_ce_centroid_max_11_8_pos 0
#define reg_ce_centroid_max_11_8_len 4
#define reg_ce_centroid_max_11_8_lsb 8
#define xd_p_reg_ce_fctrl_rd    (*(volatile byte xdata *) 0xFD33)
#define    p_reg_ce_fctrl_rd    0xFD33
#define reg_ce_fctrl_rd_pos 0
#define reg_ce_fctrl_rd_len 1
#define reg_ce_fctrl_rd_lsb 0
#define xd_r_reg_ce_centroid_out_7_0    (*(volatile byte xdata *) 0xFD34)
#define    r_reg_ce_centroid_out_7_0    0xFD34
#define reg_ce_centroid_out_7_0_pos 0
#define reg_ce_centroid_out_7_0_len 8
#define reg_ce_centroid_out_7_0_lsb 0
#define xd_r_reg_ce_centroid_out_11_8   (*(volatile byte xdata *) 0xFD35)
#define    r_reg_ce_centroid_out_11_8   0xFD35
#define reg_ce_centroid_out_11_8_pos 0
#define reg_ce_centroid_out_11_8_len 4
#define reg_ce_centroid_out_11_8_lsb 8
#define xd_r_reg_ce_fctrl_rdy   (*(volatile byte xdata *) 0xFD36)
#define    r_reg_ce_fctrl_rdy   0xFD36
#define reg_ce_fctrl_rdy_pos 0
#define reg_ce_fctrl_rdy_len 1
#define reg_ce_fctrl_rdy_lsb 0
#define xd_r_reg_ce_var (*(volatile byte xdata *) 0xFD37)
#define    r_reg_ce_var 0xFD37
#define reg_ce_var_pos 0
#define reg_ce_var_len 3
#define reg_ce_var_lsb 0
#define xd_r_reg_ce_bias_7_0    (*(volatile byte xdata *) 0xFD38)
#define    r_reg_ce_bias_7_0    0xFD38
#define reg_ce_bias_7_0_pos 0
#define reg_ce_bias_7_0_len 8
#define reg_ce_bias_7_0_lsb 0
#define xd_r_reg_ce_bias_11_8   (*(volatile byte xdata *) 0xFD39)
#define    r_reg_ce_bias_11_8   0xFD39
#define reg_ce_bias_11_8_pos 0
#define reg_ce_bias_11_8_len 4
#define reg_ce_bias_11_8_lsb 8
#define xd_r_reg_ce_m1_7_0  (*(volatile byte xdata *) 0xFD3A)
#define    r_reg_ce_m1_7_0  0xFD3A
#define reg_ce_m1_7_0_pos 0
#define reg_ce_m1_7_0_len 8
#define reg_ce_m1_7_0_lsb 0
#define xd_r_reg_ce_m1_11_8 (*(volatile byte xdata *) 0xFD3B)
#define    r_reg_ce_m1_11_8 0xFD3B
#define reg_ce_m1_11_8_pos 0
#define reg_ce_m1_11_8_len 4
#define reg_ce_m1_11_8_lsb 8
#define xd_r_reg_ce_rh0_7_0 (*(volatile byte xdata *) 0xFD3C)
#define    r_reg_ce_rh0_7_0 0xFD3C
#define reg_ce_rh0_7_0_pos 0
#define reg_ce_rh0_7_0_len 8
#define reg_ce_rh0_7_0_lsb 0
#define xd_r_reg_ce_rh0_15_8    (*(volatile byte xdata *) 0xFD3D)
#define    r_reg_ce_rh0_15_8    0xFD3D
#define reg_ce_rh0_15_8_pos 0
#define reg_ce_rh0_15_8_len 8
#define reg_ce_rh0_15_8_lsb 8
#define xd_r_reg_ce_rh0_23_16   (*(volatile byte xdata *) 0xFD3E)
#define    r_reg_ce_rh0_23_16   0xFD3E
#define reg_ce_rh0_23_16_pos 0
#define reg_ce_rh0_23_16_len 8
#define reg_ce_rh0_23_16_lsb 16
#define xd_r_reg_ce_rh0_31_24   (*(volatile byte xdata *) 0xFD3F)
#define    r_reg_ce_rh0_31_24   0xFD3F
#define reg_ce_rh0_31_24_pos 0
#define reg_ce_rh0_31_24_len 8
#define reg_ce_rh0_31_24_lsb 24
#define xd_p_reg_ce_tdi_delta   (*(volatile byte xdata *) 0xFD40)
#define    p_reg_ce_tdi_delta   0xFD40
#define reg_ce_tdi_delta_pos 0
#define reg_ce_tdi_delta_len 3
#define reg_ce_tdi_delta_lsb 0
#define xd_p_reg_ce_fdi_delta   (*(volatile byte xdata *) 0xFD41)
#define    p_reg_ce_fdi_delta   0xFD41
#define reg_ce_fdi_delta_pos 0
#define reg_ce_fdi_delta_len 3
#define reg_ce_fdi_delta_lsb 0
#define xd_p_reg_ce_fste_delta  (*(volatile byte xdata *) 0xFD42)
#define    p_reg_ce_fste_delta  0xFD42
#define reg_ce_fste_delta_pos 0
#define reg_ce_fste_delta_len 3
#define reg_ce_fste_delta_lsb 0
#define xd_r_reg_ce_fft_s1  (*(volatile byte xdata *) 0xFD43)
#define    r_reg_ce_fft_s1  0xFD43
#define reg_ce_fft_s1_pos 0
#define reg_ce_fft_s1_len 4
#define reg_ce_fft_s1_lsb 0
#define xd_r_reg_feq_fix_eh2_7_0    (*(volatile byte xdata *) 0xFD44)
#define    r_reg_feq_fix_eh2_7_0    0xFD44
#define reg_feq_fix_eh2_7_0_pos 0
#define reg_feq_fix_eh2_7_0_len 8
#define reg_feq_fix_eh2_7_0_lsb 0
#define xd_r_reg_feq_fix_eh2_15_8   (*(volatile byte xdata *) 0xFD45)
#define    r_reg_feq_fix_eh2_15_8   0xFD45
#define reg_feq_fix_eh2_15_8_pos 0
#define reg_feq_fix_eh2_15_8_len 8
#define reg_feq_fix_eh2_15_8_lsb 8
#define xd_r_reg_feq_fix_eh2_23_16  (*(volatile byte xdata *) 0xFD46)
#define    r_reg_feq_fix_eh2_23_16  0xFD46
#define reg_feq_fix_eh2_23_16_pos 0
#define reg_feq_fix_eh2_23_16_len 8
#define reg_feq_fix_eh2_23_16_lsb 16
#define xd_r_reg_feq_fix_eh2_31_24  (*(volatile byte xdata *) 0xFD47)
#define    r_reg_feq_fix_eh2_31_24  0xFD47
#define reg_feq_fix_eh2_31_24_pos 0
#define reg_feq_fix_eh2_31_24_len 8
#define reg_feq_fix_eh2_31_24_lsb 24
#define xd_r_reg_ce_m2_central_7_0  (*(volatile byte xdata *) 0xFD48)
#define    r_reg_ce_m2_central_7_0  0xFD48
#define reg_ce_m2_central_7_0_pos 0
#define reg_ce_m2_central_7_0_len 8
#define reg_ce_m2_central_7_0_lsb 0
#define xd_r_reg_ce_m2_central_15_8 (*(volatile byte xdata *) 0xFD49)
#define    r_reg_ce_m2_central_15_8 0xFD49
#define reg_ce_m2_central_15_8_pos 0
#define reg_ce_m2_central_15_8_len 8
#define reg_ce_m2_central_15_8_lsb 8
#define xd_r_reg_ce_sigma2_7_0  (*(volatile byte xdata *) 0xFD4A)
#define    r_reg_ce_sigma2_7_0  0xFD4A
#define reg_ce_sigma2_7_0_pos 0
#define reg_ce_sigma2_7_0_len 8
#define reg_ce_sigma2_7_0_lsb 0
#define xd_r_reg_ce_sigma2_15_8 (*(volatile byte xdata *) 0xFD4B)
#define    r_reg_ce_sigma2_15_8 0xFD4B
#define reg_ce_sigma2_15_8_pos 0
#define reg_ce_sigma2_15_8_len 8
#define reg_ce_sigma2_15_8_lsb 8
#define xd_r_reg_ce_sigma2_19_16    (*(volatile byte xdata *) 0xFD4C)
#define    r_reg_ce_sigma2_19_16    0xFD4C
#define reg_ce_sigma2_19_16_pos 0
#define reg_ce_sigma2_19_16_len 4
#define reg_ce_sigma2_19_16_lsb 16
#define xd_r_reg_ce_data_im_7_0 (*(volatile byte xdata *) 0xFD4D)
#define    r_reg_ce_data_im_7_0 0xFD4D
#define reg_ce_data_im_7_0_pos 0
#define reg_ce_data_im_7_0_len 8
#define reg_ce_data_im_7_0_lsb 0
#define xd_r_reg_ce_data_im_14_8    (*(volatile byte xdata *) 0xFD4E)
#define    r_reg_ce_data_im_14_8    0xFD4E
#define reg_ce_data_im_14_8_pos 0
#define reg_ce_data_im_14_8_len 7
#define reg_ce_data_im_14_8_lsb 8
#define xd_r_reg_ce_data_re_7_0 (*(volatile byte xdata *) 0xFD4F)
#define    r_reg_ce_data_re_7_0 0xFD4F
#define reg_ce_data_re_7_0_pos 0
#define reg_ce_data_re_7_0_len 8
#define reg_ce_data_re_7_0_lsb 0
#define xd_r_reg_ce_data_re_14_8    (*(volatile byte xdata *) 0xFD50)
#define    r_reg_ce_data_re_14_8    0xFD50
#define reg_ce_data_re_14_8_pos 0
#define reg_ce_data_re_14_8_len 7
#define reg_ce_data_re_14_8_lsb 8
#define xd_p_reg_ce_var_default_value   (*(volatile byte xdata *) 0xFD51)
#define    p_reg_ce_var_default_value   0xFD51
#define reg_ce_var_default_value_pos 0
#define reg_ce_var_default_value_len 3
#define reg_ce_var_default_value_lsb 0
#define xd_p_reg_ce_cent_default_value_7_0  (*(volatile byte xdata *) 0xFD52)
#define    p_reg_ce_cent_default_value_7_0  0xFD52
#define reg_ce_cent_default_value_7_0_pos 0
#define reg_ce_cent_default_value_7_0_len 8
#define reg_ce_cent_default_value_7_0_lsb 0
#define xd_p_reg_ce_cent_default_value_11_8 (*(volatile byte xdata *) 0xFD53)
#define    p_reg_ce_cent_default_value_11_8 0xFD53
#define reg_ce_cent_default_value_11_8_pos 0
#define reg_ce_cent_default_value_11_8_len 4
#define reg_ce_cent_default_value_11_8_lsb 8
#define xd_r_reg_ce_var_hw  (*(volatile byte xdata *) 0xFD54)
#define    r_reg_ce_var_hw  0xFD54
#define reg_ce_var_hw_pos 0
#define reg_ce_var_hw_len 3
#define reg_ce_var_hw_lsb 0
#define xd_r_reg_ce_cent_hw_7_0 (*(volatile byte xdata *) 0xFD55)
#define    r_reg_ce_cent_hw_7_0 0xFD55
#define reg_ce_cent_hw_7_0_pos 0
#define reg_ce_cent_hw_7_0_len 8
#define reg_ce_cent_hw_7_0_lsb 0
#define xd_r_reg_ce_cent_hw_11_8    (*(volatile byte xdata *) 0xFD56)
#define    r_reg_ce_cent_hw_11_8    0xFD56
#define reg_ce_cent_hw_11_8_pos 0
#define reg_ce_cent_hw_11_8_len 4
#define reg_ce_cent_hw_11_8_lsb 8
#define xd_p_reg_ce_fdi_cp_test_en  (*(volatile byte xdata *) 0xFD57)
#define    p_reg_ce_fdi_cp_test_en  0xFD57
#define reg_ce_fdi_cp_test_en_pos 0
#define reg_ce_fdi_cp_test_en_len 1
#define reg_ce_fdi_cp_test_en_lsb 0
#define xd_p_reg_ce_cptestindex0_7_0    (*(volatile byte xdata *) 0xFD58)
#define    p_reg_ce_cptestindex0_7_0    0xFD58
#define reg_ce_cptestindex0_7_0_pos 0
#define reg_ce_cptestindex0_7_0_len 8
#define reg_ce_cptestindex0_7_0_lsb 0
#define xd_p_reg_ce_cptestindex0_12_8   (*(volatile byte xdata *) 0xFD59)
#define    p_reg_ce_cptestindex0_12_8   0xFD59
#define reg_ce_cptestindex0_12_8_pos 0
#define reg_ce_cptestindex0_12_8_len 5
#define reg_ce_cptestindex0_12_8_lsb 8
#define xd_p_reg_ce_cptestfdi0  (*(volatile byte xdata *) 0xFD5A)
#define    p_reg_ce_cptestfdi0  0xFD5A
#define reg_ce_cptestfdi0_pos 0
#define reg_ce_cptestfdi0_len 3
#define reg_ce_cptestfdi0_lsb 0
#define xd_p_reg_ce_cptestindex1_7_0    (*(volatile byte xdata *) 0xFD5B)
#define    p_reg_ce_cptestindex1_7_0    0xFD5B
#define reg_ce_cptestindex1_7_0_pos 0
#define reg_ce_cptestindex1_7_0_len 8
#define reg_ce_cptestindex1_7_0_lsb 0
#define xd_p_reg_ce_cptestindex1_12_8   (*(volatile byte xdata *) 0xFD5C)
#define    p_reg_ce_cptestindex1_12_8   0xFD5C
#define reg_ce_cptestindex1_12_8_pos 0
#define reg_ce_cptestindex1_12_8_len 5
#define reg_ce_cptestindex1_12_8_lsb 8
#define xd_p_reg_ce_cptestfdi1  (*(volatile byte xdata *) 0xFD5D)
#define    p_reg_ce_cptestfdi1  0xFD5D
#define reg_ce_cptestfdi1_pos 0
#define reg_ce_cptestfdi1_len 3
#define reg_ce_cptestfdi1_lsb 0
#define xd_p_reg_ce_cptestindex2_7_0    (*(volatile byte xdata *) 0xFD5E)
#define    p_reg_ce_cptestindex2_7_0    0xFD5E
#define reg_ce_cptestindex2_7_0_pos 0
#define reg_ce_cptestindex2_7_0_len 8
#define reg_ce_cptestindex2_7_0_lsb 0
#define xd_p_reg_ce_cptestindex2_12_8   (*(volatile byte xdata *) 0xFD5F)
#define    p_reg_ce_cptestindex2_12_8   0xFD5F
#define reg_ce_cptestindex2_12_8_pos 0
#define reg_ce_cptestindex2_12_8_len 5
#define reg_ce_cptestindex2_12_8_lsb 8
#define xd_p_reg_ce_cptestfdi2  (*(volatile byte xdata *) 0xFD60)
#define    p_reg_ce_cptestfdi2  0xFD60
#define reg_ce_cptestfdi2_pos 0
#define reg_ce_cptestfdi2_len 3
#define reg_ce_cptestfdi2_lsb 0
#define xd_p_reg_ce_cptestindex3_7_0    (*(volatile byte xdata *) 0xFD61)
#define    p_reg_ce_cptestindex3_7_0    0xFD61
#define reg_ce_cptestindex3_7_0_pos 0
#define reg_ce_cptestindex3_7_0_len 8
#define reg_ce_cptestindex3_7_0_lsb 0
#define xd_p_reg_ce_cptestindex3_12_8   (*(volatile byte xdata *) 0xFD62)
#define    p_reg_ce_cptestindex3_12_8   0xFD62
#define reg_ce_cptestindex3_12_8_pos 0
#define reg_ce_cptestindex3_12_8_len 5
#define reg_ce_cptestindex3_12_8_lsb 8
#define xd_p_reg_ce_cptestfdi3  (*(volatile byte xdata *) 0xFD63)
#define    p_reg_ce_cptestfdi3  0xFD63
#define reg_ce_cptestfdi3_pos 0
#define reg_ce_cptestfdi3_len 3
#define reg_ce_cptestfdi3_lsb 0
#define xd_p_reg_ce_cptestindex4_7_0    (*(volatile byte xdata *) 0xFD64)
#define    p_reg_ce_cptestindex4_7_0    0xFD64
#define reg_ce_cptestindex4_7_0_pos 0
#define reg_ce_cptestindex4_7_0_len 8
#define reg_ce_cptestindex4_7_0_lsb 0
#define xd_p_reg_ce_cptestindex4_12_8   (*(volatile byte xdata *) 0xFD65)
#define    p_reg_ce_cptestindex4_12_8   0xFD65
#define reg_ce_cptestindex4_12_8_pos 0
#define reg_ce_cptestindex4_12_8_len 5
#define reg_ce_cptestindex4_12_8_lsb 8
#define xd_p_reg_ce_cptestfdi4  (*(volatile byte xdata *) 0xFD66)
#define    p_reg_ce_cptestfdi4  0xFD66
#define reg_ce_cptestfdi4_pos 0
#define reg_ce_cptestfdi4_len 3
#define reg_ce_cptestfdi4_lsb 0
#define xd_p_reg_ce_cptestindex5_7_0    (*(volatile byte xdata *) 0xFD67)
#define    p_reg_ce_cptestindex5_7_0    0xFD67
#define reg_ce_cptestindex5_7_0_pos 0
#define reg_ce_cptestindex5_7_0_len 8
#define reg_ce_cptestindex5_7_0_lsb 0
#define xd_p_reg_ce_cptestindex5_12_8   (*(volatile byte xdata *) 0xFD68)
#define    p_reg_ce_cptestindex5_12_8   0xFD68
#define reg_ce_cptestindex5_12_8_pos 0
#define reg_ce_cptestindex5_12_8_len 5
#define reg_ce_cptestindex5_12_8_lsb 8
#define xd_p_reg_ce_cptestfdi5  (*(volatile byte xdata *) 0xFD69)
#define    p_reg_ce_cptestfdi5  0xFD69
#define reg_ce_cptestfdi5_pos 0
#define reg_ce_cptestfdi5_len 3
#define reg_ce_cptestfdi5_lsb 0
#define xd_p_reg_ce_cptestindex6_7_0    (*(volatile byte xdata *) 0xFD6A)
#define    p_reg_ce_cptestindex6_7_0    0xFD6A
#define reg_ce_cptestindex6_7_0_pos 0
#define reg_ce_cptestindex6_7_0_len 8
#define reg_ce_cptestindex6_7_0_lsb 0
#define xd_p_reg_ce_cptestindex6_12_8   (*(volatile byte xdata *) 0xFD6B)
#define    p_reg_ce_cptestindex6_12_8   0xFD6B
#define reg_ce_cptestindex6_12_8_pos 0
#define reg_ce_cptestindex6_12_8_len 5
#define reg_ce_cptestindex6_12_8_lsb 8
#define xd_p_reg_ce_cptestfdi6  (*(volatile byte xdata *) 0xFD6C)
#define    p_reg_ce_cptestfdi6  0xFD6C
#define reg_ce_cptestfdi6_pos 0
#define reg_ce_cptestfdi6_len 3
#define reg_ce_cptestfdi6_lsb 0
#define xd_p_reg_ce_cptestindex7_7_0    (*(volatile byte xdata *) 0xFD6D)
#define    p_reg_ce_cptestindex7_7_0    0xFD6D
#define reg_ce_cptestindex7_7_0_pos 0
#define reg_ce_cptestindex7_7_0_len 8
#define reg_ce_cptestindex7_7_0_lsb 0
#define xd_p_reg_ce_cptestindex7_12_8   (*(volatile byte xdata *) 0xFD6E)
#define    p_reg_ce_cptestindex7_12_8   0xFD6E
#define reg_ce_cptestindex7_12_8_pos 0
#define reg_ce_cptestindex7_12_8_len 5
#define reg_ce_cptestindex7_12_8_lsb 8
#define xd_p_reg_ce_cptestfdi7  (*(volatile byte xdata *) 0xFD6F)
#define    p_reg_ce_cptestfdi7  0xFD6F
#define reg_ce_cptestfdi7_pos 0
#define reg_ce_cptestfdi7_len 3
#define reg_ce_cptestfdi7_lsb 0
#define xd_p_reg_ce_cp_replace_tdiout_en    (*(volatile byte xdata *) 0xFD74)
#define    p_reg_ce_cp_replace_tdiout_en    0xFD74
#define reg_ce_cp_replace_tdiout_en_pos 0
#define reg_ce_cp_replace_tdiout_en_len 1
#define reg_ce_cp_replace_tdiout_en_lsb 0
#define xd_p_reg_ce_tdi_mask0_en    (*(volatile byte xdata *) 0xFD7D)
#define    p_reg_ce_tdi_mask0_en    0xFD7D
#define reg_ce_tdi_mask0_en_pos 0
#define reg_ce_tdi_mask0_en_len 1
#define reg_ce_tdi_mask0_en_lsb 0
#define xd_p_reg_ce_tdi_mask_from0_7_0  (*(volatile byte xdata *) 0xFD7E)
#define    p_reg_ce_tdi_mask_from0_7_0  0xFD7E
#define reg_ce_tdi_mask_from0_7_0_pos 0
#define reg_ce_tdi_mask_from0_7_0_len 8
#define reg_ce_tdi_mask_from0_7_0_lsb 0
#define xd_p_reg_ce_tdi_mask_from0_12_8 (*(volatile byte xdata *) 0xFD7F)
#define    p_reg_ce_tdi_mask_from0_12_8 0xFD7F
#define reg_ce_tdi_mask_from0_12_8_pos 0
#define reg_ce_tdi_mask_from0_12_8_len 5
#define reg_ce_tdi_mask_from0_12_8_lsb 8
#define xd_p_reg_ce_tdi_mask_to0_7_0    (*(volatile byte xdata *) 0xFD80)
#define    p_reg_ce_tdi_mask_to0_7_0    0xFD80
#define reg_ce_tdi_mask_to0_7_0_pos 0
#define reg_ce_tdi_mask_to0_7_0_len 8
#define reg_ce_tdi_mask_to0_7_0_lsb 0
#define xd_p_reg_ce_tdi_mask_to0_12_8   (*(volatile byte xdata *) 0xFD81)
#define    p_reg_ce_tdi_mask_to0_12_8   0xFD81
#define reg_ce_tdi_mask_to0_12_8_pos 0
#define reg_ce_tdi_mask_to0_12_8_len 5
#define reg_ce_tdi_mask_to0_12_8_lsb 8
#define xd_p_reg_ce_tdi_mask1_en    (*(volatile byte xdata *) 0xFD82)
#define    p_reg_ce_tdi_mask1_en    0xFD82
#define reg_ce_tdi_mask1_en_pos 0
#define reg_ce_tdi_mask1_en_len 1
#define reg_ce_tdi_mask1_en_lsb 0
#define xd_p_reg_ce_tdi_mask_from1_7_0  (*(volatile byte xdata *) 0xFD83)
#define    p_reg_ce_tdi_mask_from1_7_0  0xFD83
#define reg_ce_tdi_mask_from1_7_0_pos 0
#define reg_ce_tdi_mask_from1_7_0_len 8
#define reg_ce_tdi_mask_from1_7_0_lsb 0
#define xd_p_reg_ce_tdi_mask_from1_12_8 (*(volatile byte xdata *) 0xFD84)
#define    p_reg_ce_tdi_mask_from1_12_8 0xFD84
#define reg_ce_tdi_mask_from1_12_8_pos 0
#define reg_ce_tdi_mask_from1_12_8_len 5
#define reg_ce_tdi_mask_from1_12_8_lsb 8
#define xd_p_reg_ce_tdi_mask_to1_7_0    (*(volatile byte xdata *) 0xFD85)
#define    p_reg_ce_tdi_mask_to1_7_0    0xFD85
#define reg_ce_tdi_mask_to1_7_0_pos 0
#define reg_ce_tdi_mask_to1_7_0_len 8
#define reg_ce_tdi_mask_to1_7_0_lsb 0
#define xd_p_reg_ce_tdi_mask_to1_12_8   (*(volatile byte xdata *) 0xFD86)
#define    p_reg_ce_tdi_mask_to1_12_8   0xFD86
#define reg_ce_tdi_mask_to1_12_8_pos 0
#define reg_ce_tdi_mask_to1_12_8_len 5
#define reg_ce_tdi_mask_to1_12_8_lsb 8
#define xd_p_reg_ce_2nd_var_max (*(volatile byte xdata *) 0xFD87)
#define    p_reg_ce_2nd_var_max 0xFD87
#define reg_ce_2nd_var_max_pos 0
#define reg_ce_2nd_var_max_len 3
#define reg_ce_2nd_var_max_lsb 0
#define xd_p_reg_ce_2nd_cent_forced_en  (*(volatile byte xdata *) 0xFD88)
#define    p_reg_ce_2nd_cent_forced_en  0xFD88
#define reg_ce_2nd_cent_forced_en_pos 0
#define reg_ce_2nd_cent_forced_en_len 1
#define reg_ce_2nd_cent_forced_en_lsb 0
#define xd_p_reg_ce_2nd_var_forced_en   (*(volatile byte xdata *) 0xFD89)
#define    p_reg_ce_2nd_var_forced_en   0xFD89
#define reg_ce_2nd_var_forced_en_pos 0
#define reg_ce_2nd_var_forced_en_len 1
#define reg_ce_2nd_var_forced_en_lsb 0
#define xd_p_reg_ce_2nd_fctrl_auto_reset_en (*(volatile byte xdata *) 0xFD8A)
#define    p_reg_ce_2nd_fctrl_auto_reset_en 0xFD8A
#define reg_ce_2nd_fctrl_auto_reset_en_pos 0
#define reg_ce_2nd_fctrl_auto_reset_en_len 1
#define reg_ce_2nd_fctrl_auto_reset_en_lsb 0
#define xd_p_reg_ce_2nd_cent_auto_clr_en    (*(volatile byte xdata *) 0xFD8B)
#define    p_reg_ce_2nd_cent_auto_clr_en    0xFD8B
#define reg_ce_2nd_cent_auto_clr_en_pos 0
#define reg_ce_2nd_cent_auto_clr_en_len 1
#define reg_ce_2nd_cent_auto_clr_en_lsb 0
#define xd_p_reg_ce_2nd_cent_forced_value_7_0   (*(volatile byte xdata *) 0xFD8C)
#define    p_reg_ce_2nd_cent_forced_value_7_0   0xFD8C
#define reg_ce_2nd_cent_forced_value_7_0_pos 0
#define reg_ce_2nd_cent_forced_value_7_0_len 8
#define reg_ce_2nd_cent_forced_value_7_0_lsb 0
#define xd_p_reg_ce_2nd_cent_forced_value_11_8  (*(volatile byte xdata *) 0xFD8D)
#define    p_reg_ce_2nd_cent_forced_value_11_8  0xFD8D
#define reg_ce_2nd_cent_forced_value_11_8_pos 0
#define reg_ce_2nd_cent_forced_value_11_8_len 4
#define reg_ce_2nd_cent_forced_value_11_8_lsb 8
#define xd_p_reg_ce_2nd_cent_auto_clr_value_7_0 (*(volatile byte xdata *) 0xFD8E)
#define    p_reg_ce_2nd_cent_auto_clr_value_7_0 0xFD8E
#define reg_ce_2nd_cent_auto_clr_value_7_0_pos 0
#define reg_ce_2nd_cent_auto_clr_value_7_0_len 8
#define reg_ce_2nd_cent_auto_clr_value_7_0_lsb 0
#define xd_p_reg_ce_2nd_cent_auto_clr_value_11_8    (*(volatile byte xdata *) 0xFD8F)
#define    p_reg_ce_2nd_cent_auto_clr_value_11_8    0xFD8F
#define reg_ce_2nd_cent_auto_clr_value_11_8_pos 0
#define reg_ce_2nd_cent_auto_clr_value_11_8_len 4
#define reg_ce_2nd_cent_auto_clr_value_11_8_lsb 8
#define xd_p_reg_ce_gs_s1_var   (*(volatile byte xdata *) 0xFD90)
#define    p_reg_ce_gs_s1_var   0xFD90
#define reg_ce_gs_s1_var_pos 0
#define reg_ce_gs_s1_var_len 4
#define reg_ce_gs_s1_var_lsb 0
#define xd_p_reg_ce_2nd_centroid_max_7_0    (*(volatile byte xdata *) 0xFD91)
#define    p_reg_ce_2nd_centroid_max_7_0    0xFD91
#define reg_ce_2nd_centroid_max_7_0_pos 0
#define reg_ce_2nd_centroid_max_7_0_len 8
#define reg_ce_2nd_centroid_max_7_0_lsb 0
#define xd_p_reg_ce_2nd_centroid_max_11_8   (*(volatile byte xdata *) 0xFD92)
#define    p_reg_ce_2nd_centroid_max_11_8   0xFD92
#define reg_ce_2nd_centroid_max_11_8_pos 0
#define reg_ce_2nd_centroid_max_11_8_len 4
#define reg_ce_2nd_centroid_max_11_8_lsb 8
#define xd_r_reg_ce_2nd_centroid_out_7_0    (*(volatile byte xdata *) 0xFD93)
#define    r_reg_ce_2nd_centroid_out_7_0    0xFD93
#define reg_ce_2nd_centroid_out_7_0_pos 0
#define reg_ce_2nd_centroid_out_7_0_len 8
#define reg_ce_2nd_centroid_out_7_0_lsb 0
#define xd_r_reg_ce_2nd_centroid_out_11_8   (*(volatile byte xdata *) 0xFD94)
#define    r_reg_ce_2nd_centroid_out_11_8   0xFD94
#define reg_ce_2nd_centroid_out_11_8_pos 0
#define reg_ce_2nd_centroid_out_11_8_len 4
#define reg_ce_2nd_centroid_out_11_8_lsb 8
#define xd_r_reg_ce_2nd_fctrl_rdy   (*(volatile byte xdata *) 0xFD95)
#define    r_reg_ce_2nd_fctrl_rdy   0xFD95
#define reg_ce_2nd_fctrl_rdy_pos 0
#define reg_ce_2nd_fctrl_rdy_len 1
#define reg_ce_2nd_fctrl_rdy_lsb 0
#define xd_r_reg_ce_2nd_var (*(volatile byte xdata *) 0xFD96)
#define    r_reg_ce_2nd_var 0xFD96
#define reg_ce_2nd_var_pos 0
#define reg_ce_2nd_var_len 3
#define reg_ce_2nd_var_lsb 0
#define xd_r_reg_ce_2nd_bias_7_0    (*(volatile byte xdata *) 0xFD97)
#define    r_reg_ce_2nd_bias_7_0    0xFD97
#define reg_ce_2nd_bias_7_0_pos 0
#define reg_ce_2nd_bias_7_0_len 8
#define reg_ce_2nd_bias_7_0_lsb 0
#define xd_r_reg_ce_2nd_bias_11_8   (*(volatile byte xdata *) 0xFD98)
#define    r_reg_ce_2nd_bias_11_8   0xFD98
#define reg_ce_2nd_bias_11_8_pos 0
#define reg_ce_2nd_bias_11_8_len 4
#define reg_ce_2nd_bias_11_8_lsb 8
#define xd_r_reg_ce_2nd_m1_7_0  (*(volatile byte xdata *) 0xFD99)
#define    r_reg_ce_2nd_m1_7_0  0xFD99
#define reg_ce_2nd_m1_7_0_pos 0
#define reg_ce_2nd_m1_7_0_len 8
#define reg_ce_2nd_m1_7_0_lsb 0
#define xd_r_reg_ce_2nd_m1_11_8 (*(volatile byte xdata *) 0xFD9A)
#define    r_reg_ce_2nd_m1_11_8 0xFD9A
#define reg_ce_2nd_m1_11_8_pos 0
#define reg_ce_2nd_m1_11_8_len 4
#define reg_ce_2nd_m1_11_8_lsb 8
#define xd_p_reg_ce_2nd_var_forced_value    (*(volatile byte xdata *) 0xFD9B)
#define    p_reg_ce_2nd_var_forced_value    0xFD9B
#define reg_ce_2nd_var_forced_value_pos 0
#define reg_ce_2nd_var_forced_value_len 3
#define reg_ce_2nd_var_forced_value_lsb 0
#define xd_r_reg_ce_2nd_m2_central_7_0  (*(volatile byte xdata *) 0xFD9C)
#define    r_reg_ce_2nd_m2_central_7_0  0xFD9C
#define reg_ce_2nd_m2_central_7_0_pos 0
#define reg_ce_2nd_m2_central_7_0_len 8
#define reg_ce_2nd_m2_central_7_0_lsb 0
#define xd_r_reg_ce_2nd_m2_central_15_8 (*(volatile byte xdata *) 0xFD9D)
#define    r_reg_ce_2nd_m2_central_15_8 0xFD9D
#define reg_ce_2nd_m2_central_15_8_pos 0
#define reg_ce_2nd_m2_central_15_8_len 8
#define reg_ce_2nd_m2_central_15_8_lsb 8
#define xd_p_reg_ce_2nd_var_default_value   (*(volatile byte xdata *) 0xFD9E)
#define    p_reg_ce_2nd_var_default_value   0xFD9E
#define reg_ce_2nd_var_default_value_pos 0
#define reg_ce_2nd_var_default_value_len 3
#define reg_ce_2nd_var_default_value_lsb 0
#define xd_p_reg_ce_2nd_cent_default_value_7_0  (*(volatile byte xdata *) 0xFD9F)
#define    p_reg_ce_2nd_cent_default_value_7_0  0xFD9F
#define reg_ce_2nd_cent_default_value_7_0_pos 0
#define reg_ce_2nd_cent_default_value_7_0_len 8
#define reg_ce_2nd_cent_default_value_7_0_lsb 0
#define xd_p_reg_ce_2nd_cent_default_value_11_8 (*(volatile byte xdata *) 0xFDA0)
#define    p_reg_ce_2nd_cent_default_value_11_8 0xFDA0
#define reg_ce_2nd_cent_default_value_11_8_pos 0
#define reg_ce_2nd_cent_default_value_11_8_len 4
#define reg_ce_2nd_cent_default_value_11_8_lsb 8
#define xd_p_reg_ce_use_fdi_long    (*(volatile byte xdata *) 0xFDA1)
#define    p_reg_ce_use_fdi_long    0xFDA1
#define reg_ce_use_fdi_long_pos 0
#define reg_ce_use_fdi_long_len 1
#define reg_ce_use_fdi_long_lsb 0
#define xd_p_reg_p_ce_tdi_lms_en    (*(volatile byte xdata *) 0xFDA2)
#define    p_reg_p_ce_tdi_lms_en    0xFDA2
#define reg_p_ce_tdi_lms_en_pos 0
#define reg_p_ce_tdi_lms_en_len 1
#define reg_p_ce_tdi_lms_en_lsb 0
#define xd_p_reg_p_ce_tdi_lms_bufshift  (*(volatile byte xdata *) 0xFDA3)
#define    p_reg_p_ce_tdi_lms_bufshift  0xFDA3
#define reg_p_ce_tdi_lms_bufshift_pos 0
#define reg_p_ce_tdi_lms_bufshift_len 2
#define reg_p_ce_tdi_lms_bufshift_lsb 0
#define xd_p_reg_p_ce_tdi_lms_ave_ratio (*(volatile byte xdata *) 0xFDA4)
#define    p_reg_p_ce_tdi_lms_ave_ratio 0xFDA4
#define reg_p_ce_tdi_lms_ave_ratio_pos 0
#define reg_p_ce_tdi_lms_ave_ratio_len 5
#define reg_p_ce_tdi_lms_ave_ratio_lsb 0
#define xd_p_reg_p_ce_conf2_in_con0_en  (*(volatile byte xdata *) 0xFDA5)
#define    p_reg_p_ce_conf2_in_con0_en  0xFDA5
#define reg_p_ce_conf2_in_con0_en_pos 0
#define reg_p_ce_conf2_in_con0_en_len 1
#define reg_p_ce_conf2_in_con0_en_lsb 0
// biu_reg.h 7-6-2007
// gen_biu Ver 1.0 generated by
#define xd_p_fec_rsd_packet_unit_7_0    (*(volatile byte xdata *) 0xF700)
#define    p_fec_rsd_packet_unit_7_0    0xF700
#define fec_rsd_packet_unit_7_0_pos 0
#define fec_rsd_packet_unit_7_0_len 8
#define fec_rsd_packet_unit_7_0_lsb 0
#define xd_p_fec_rsd_packet_unit_15_8   (*(volatile byte xdata *) 0xF701)
#define    p_fec_rsd_packet_unit_15_8   0xF701
#define fec_rsd_packet_unit_15_8_pos 0
#define fec_rsd_packet_unit_15_8_len 8
#define fec_rsd_packet_unit_15_8_lsb 8
#define xd_r_reg_rsd_bit_err_cnt_7_0    (*(volatile byte xdata *) 0xF702)
#define    r_reg_rsd_bit_err_cnt_7_0    0xF702
#define reg_rsd_bit_err_cnt_7_0_pos 0
#define reg_rsd_bit_err_cnt_7_0_len 8
#define reg_rsd_bit_err_cnt_7_0_lsb 0
#define xd_r_reg_rsd_bit_err_cnt_15_8   (*(volatile byte xdata *) 0xF703)
#define    r_reg_rsd_bit_err_cnt_15_8   0xF703
#define reg_rsd_bit_err_cnt_15_8_pos 0
#define reg_rsd_bit_err_cnt_15_8_len 8
#define reg_rsd_bit_err_cnt_15_8_lsb 8
#define xd_r_reg_rsd_bit_err_cnt_23_16  (*(volatile byte xdata *) 0xF704)
#define    r_reg_rsd_bit_err_cnt_23_16  0xF704
#define reg_rsd_bit_err_cnt_23_16_pos 0
#define reg_rsd_bit_err_cnt_23_16_len 8
#define reg_rsd_bit_err_cnt_23_16_lsb 16
#define xd_r_reg_rsd_abort_packet_cnt_7_0   (*(volatile byte xdata *) 0xF705)
#define    r_reg_rsd_abort_packet_cnt_7_0   0xF705
#define reg_rsd_abort_packet_cnt_7_0_pos 0
#define reg_rsd_abort_packet_cnt_7_0_len 8
#define reg_rsd_abort_packet_cnt_7_0_lsb 0
#define xd_r_reg_rsd_abort_packet_cnt_15_8  (*(volatile byte xdata *) 0xF706)
#define    r_reg_rsd_abort_packet_cnt_15_8  0xF706
#define reg_rsd_abort_packet_cnt_15_8_pos 0
#define reg_rsd_abort_packet_cnt_15_8_len 8
#define reg_rsd_abort_packet_cnt_15_8_lsb 8
#define xd_p_fec_RSD_PKT_NUM_PER_UNIT_7_0   (*(volatile byte xdata *) 0xF707)
#define    p_fec_RSD_PKT_NUM_PER_UNIT_7_0   0xF707
#define fec_RSD_PKT_NUM_PER_UNIT_7_0_pos 0
#define fec_RSD_PKT_NUM_PER_UNIT_7_0_len 8
#define fec_RSD_PKT_NUM_PER_UNIT_7_0_lsb 0
#define xd_p_fec_RSD_PKT_NUM_PER_UNIT_15_8  (*(volatile byte xdata *) 0xF708)
#define    p_fec_RSD_PKT_NUM_PER_UNIT_15_8  0xF708
#define fec_RSD_PKT_NUM_PER_UNIT_15_8_pos 0
#define fec_RSD_PKT_NUM_PER_UNIT_15_8_len 8
#define fec_RSD_PKT_NUM_PER_UNIT_15_8_lsb 8
#define xd_p_fec_RS_TH_1_7_0    (*(volatile byte xdata *) 0xF709)
#define    p_fec_RS_TH_1_7_0    0xF709
#define fec_RS_TH_1_7_0_pos 0
#define fec_RS_TH_1_7_0_len 8
#define fec_RS_TH_1_7_0_lsb 0
#define xd_p_fec_RS_TH_1_15_8   (*(volatile byte xdata *) 0xF70A)
#define    p_fec_RS_TH_1_15_8   0xF70A
#define fec_RS_TH_1_15_8_pos 0
#define fec_RS_TH_1_15_8_len 8
#define fec_RS_TH_1_15_8_lsb 8
#define xd_p_fec_RS_TH_2    (*(volatile byte xdata *) 0xF70B)
#define    p_fec_RS_TH_2    0xF70B
#define fec_RS_TH_2_pos 0
#define fec_RS_TH_2_len 8
#define fec_RS_TH_2_lsb 0
#define xd_p_fec_rsd_ber_rst    (*(volatile byte xdata *) 0xF70C)
#define    p_fec_rsd_ber_rst    0xF70C
#define fec_rsd_ber_rst_pos 0
#define fec_rsd_ber_rst_len 1
#define fec_rsd_ber_rst_lsb 0
#define xd_p_reg_rsd_ber_rdy    (*(volatile byte xdata *) 0xF70D)
#define    p_reg_rsd_ber_rdy    0xF70D
#define reg_rsd_ber_rdy_pos 0
#define reg_rsd_ber_rdy_len 1
#define reg_rsd_ber_rdy_lsb 0
#define xd_p_reg_rsd_trigger_retrain    (*(volatile byte xdata *) 0xF70E)
#define    p_reg_rsd_trigger_retrain    0xF70E
#define reg_rsd_trigger_retrain_pos 0
#define reg_rsd_trigger_retrain_len 1
#define reg_rsd_trigger_retrain_lsb 0
#define xd_p_reg_sync_recover   (*(volatile byte xdata *) 0xF70F)
#define    p_reg_sync_recover   0xF70F
#define reg_sync_recover_pos 0
#define reg_sync_recover_len 1
#define reg_sync_recover_lsb 0
#define xd_p_fec_crc_en (*(volatile byte xdata *) 0xF710)
#define    p_fec_crc_en 0xF710
#define fec_crc_en_pos 0
#define fec_crc_en_len 1
#define fec_crc_en_lsb 0
#define xd_p_fec_mon_en (*(volatile byte xdata *) 0xF711)
#define    p_fec_mon_en 0xF711
#define fec_mon_en_pos 0
#define fec_mon_en_len 1
#define fec_mon_en_lsb 0
#define xd_p_reg_sync_chk   (*(volatile byte xdata *) 0xF712)
#define    p_reg_sync_chk   0xF712
#define reg_sync_chk_pos 0
#define reg_sync_chk_len 1
#define reg_sync_chk_lsb 0
#define xd_p_fec_dummy_reg_2    (*(volatile byte xdata *) 0xF713)
#define    p_fec_dummy_reg_2    0xF713
#define fec_dummy_reg_2_pos 0
#define fec_dummy_reg_2_len 3
#define fec_dummy_reg_2_lsb 0
#define xd_p_reg_fec_data_en    (*(volatile byte xdata *) 0xF714)
#define    p_reg_fec_data_en    0xF714
#define reg_fec_data_en_pos 0
#define reg_fec_data_en_len 1
#define reg_fec_data_en_lsb 0
#define xd_p_fec_vtb_rsd_mon_en (*(volatile byte xdata *) 0xF715)
#define    p_fec_vtb_rsd_mon_en 0xF715
#define fec_vtb_rsd_mon_en_pos 0
#define fec_vtb_rsd_mon_en_len 1
#define fec_vtb_rsd_mon_en_lsb 0
#define xd_p_reg_fec_sw_rst (*(volatile byte xdata *) 0xF716)
#define    p_reg_fec_sw_rst 0xF716
#define reg_fec_sw_rst_pos 0
#define reg_fec_sw_rst_len 1
#define reg_fec_sw_rst_lsb 0
#define xd_r_fec_vtb_pm_crc (*(volatile byte xdata *) 0xF717)
#define    r_fec_vtb_pm_crc 0xF717
#define fec_vtb_pm_crc_pos 0
#define fec_vtb_pm_crc_len 8
#define fec_vtb_pm_crc_lsb 0
#define xd_r_fec_vtb_tb_7_crc   (*(volatile byte xdata *) 0xF718)
#define    r_fec_vtb_tb_7_crc   0xF718
#define fec_vtb_tb_7_crc_pos 0
#define fec_vtb_tb_7_crc_len 8
#define fec_vtb_tb_7_crc_lsb 0
#define xd_r_fec_vtb_tb_6_crc   (*(volatile byte xdata *) 0xF719)
#define    r_fec_vtb_tb_6_crc   0xF719
#define fec_vtb_tb_6_crc_pos 0
#define fec_vtb_tb_6_crc_len 8
#define fec_vtb_tb_6_crc_lsb 0
#define xd_r_fec_vtb_tb_5_crc   (*(volatile byte xdata *) 0xF71A)
#define    r_fec_vtb_tb_5_crc   0xF71A
#define fec_vtb_tb_5_crc_pos 0
#define fec_vtb_tb_5_crc_len 8
#define fec_vtb_tb_5_crc_lsb 0
#define xd_r_fec_vtb_tb_4_crc   (*(volatile byte xdata *) 0xF71B)
#define    r_fec_vtb_tb_4_crc   0xF71B
#define fec_vtb_tb_4_crc_pos 0
#define fec_vtb_tb_4_crc_len 8
#define fec_vtb_tb_4_crc_lsb 0
#define xd_r_fec_vtb_tb_3_crc   (*(volatile byte xdata *) 0xF71C)
#define    r_fec_vtb_tb_3_crc   0xF71C
#define fec_vtb_tb_3_crc_pos 0
#define fec_vtb_tb_3_crc_len 8
#define fec_vtb_tb_3_crc_lsb 0
#define xd_r_fec_vtb_tb_2_crc   (*(volatile byte xdata *) 0xF71D)
#define    r_fec_vtb_tb_2_crc   0xF71D
#define fec_vtb_tb_2_crc_pos 0
#define fec_vtb_tb_2_crc_len 8
#define fec_vtb_tb_2_crc_lsb 0
#define xd_r_fec_vtb_tb_1_crc   (*(volatile byte xdata *) 0xF71E)
#define    r_fec_vtb_tb_1_crc   0xF71E
#define fec_vtb_tb_1_crc_pos 0
#define fec_vtb_tb_1_crc_len 8
#define fec_vtb_tb_1_crc_lsb 0
#define xd_r_fec_vtb_tb_0_crc   (*(volatile byte xdata *) 0xF71F)
#define    r_fec_vtb_tb_0_crc   0xF71F
#define fec_vtb_tb_0_crc_pos 0
#define fec_vtb_tb_0_crc_len 8
#define fec_vtb_tb_0_crc_lsb 0
#define xd_r_fec_rsd_bank0_crc  (*(volatile byte xdata *) 0xF720)
#define    r_fec_rsd_bank0_crc  0xF720
#define fec_rsd_bank0_crc_pos 0
#define fec_rsd_bank0_crc_len 8
#define fec_rsd_bank0_crc_lsb 0
#define xd_r_fec_rsd_bank1_crc  (*(volatile byte xdata *) 0xF721)
#define    r_fec_rsd_bank1_crc  0xF721
#define fec_rsd_bank1_crc_pos 0
#define fec_rsd_bank1_crc_len 8
#define fec_rsd_bank1_crc_lsb 0
#define xd_r_fec_idi_vtb_crc    (*(volatile byte xdata *) 0xF722)
#define    r_fec_idi_vtb_crc    0xF722
#define fec_idi_vtb_crc_pos 0
#define fec_idi_vtb_crc_len 8
#define fec_idi_vtb_crc_lsb 0
#define xd_p_reg_fec_rsd_packet_unit_exp    (*(volatile byte xdata *) 0xF723)
#define    p_reg_fec_rsd_packet_unit_exp    0xF723
#define reg_fec_rsd_packet_unit_exp_pos 0
#define reg_fec_rsd_packet_unit_exp_len 4
#define reg_fec_rsd_packet_unit_exp_lsb 0
#define xd_p_reg_rsd_bit_err_exp_rdy    (*(volatile byte xdata *) 0xF724)
#define    p_reg_rsd_bit_err_exp_rdy    0xF724
#define reg_rsd_bit_err_exp_rdy_pos 0
#define reg_rsd_bit_err_exp_rdy_len 1
#define reg_rsd_bit_err_exp_rdy_lsb 0
#define xd_r_reg_rsd_bit_err_exp    (*(volatile byte xdata *) 0xF725)
#define    r_reg_rsd_bit_err_exp    0xF725
#define reg_rsd_bit_err_exp_pos 0
#define reg_rsd_bit_err_exp_len 5
#define reg_rsd_bit_err_exp_lsb 0
#define xd_p_fec_rsd_packet_unit1_7_0   (*(volatile byte xdata *) 0xF726)
#define    p_fec_rsd_packet_unit1_7_0   0xF726
#define fec_rsd_packet_unit1_7_0_pos 0
#define fec_rsd_packet_unit1_7_0_len 8
#define fec_rsd_packet_unit1_7_0_lsb 0
#define xd_p_fec_rsd_packet_unit1_15_8  (*(volatile byte xdata *) 0xF727)
#define    p_fec_rsd_packet_unit1_15_8  0xF727
#define fec_rsd_packet_unit1_15_8_pos 0
#define fec_rsd_packet_unit1_15_8_len 8
#define fec_rsd_packet_unit1_15_8_lsb 8
#define xd_r_reg_rsd_bit_err_cnt1_7_0   (*(volatile byte xdata *) 0xF728)
#define    r_reg_rsd_bit_err_cnt1_7_0   0xF728
#define reg_rsd_bit_err_cnt1_7_0_pos 0
#define reg_rsd_bit_err_cnt1_7_0_len 8
#define reg_rsd_bit_err_cnt1_7_0_lsb 0
#define xd_r_reg_rsd_bit_err_cnt1_15_8  (*(volatile byte xdata *) 0xF729)
#define    r_reg_rsd_bit_err_cnt1_15_8  0xF729
#define reg_rsd_bit_err_cnt1_15_8_pos 0
#define reg_rsd_bit_err_cnt1_15_8_len 8
#define reg_rsd_bit_err_cnt1_15_8_lsb 8
#define xd_r_reg_rsd_bit_err_cnt1_23_16 (*(volatile byte xdata *) 0xF72A)
#define    r_reg_rsd_bit_err_cnt1_23_16 0xF72A
#define reg_rsd_bit_err_cnt1_23_16_pos 0
#define reg_rsd_bit_err_cnt1_23_16_len 8
#define reg_rsd_bit_err_cnt1_23_16_lsb 16
#define xd_r_reg_rsd_abort_packet_cnt1_7_0  (*(volatile byte xdata *) 0xF72B)
#define    r_reg_rsd_abort_packet_cnt1_7_0  0xF72B
#define reg_rsd_abort_packet_cnt1_7_0_pos 0
#define reg_rsd_abort_packet_cnt1_7_0_len 8
#define reg_rsd_abort_packet_cnt1_7_0_lsb 0
#define xd_r_reg_rsd_abort_packet_cnt1_15_8 (*(volatile byte xdata *) 0xF72C)
#define    r_reg_rsd_abort_packet_cnt1_15_8 0xF72C
#define reg_rsd_abort_packet_cnt1_15_8_pos 0
#define reg_rsd_abort_packet_cnt1_15_8_len 8
#define reg_rsd_abort_packet_cnt1_15_8_lsb 8
#define xd_p_fec_rsd_ber_rst1   (*(volatile byte xdata *) 0xF72D)
#define    p_fec_rsd_ber_rst1   0xF72D
#define fec_rsd_ber_rst1_pos 0
#define fec_rsd_ber_rst1_len 1
#define fec_rsd_ber_rst1_lsb 0
#define xd_p_reg_rsd_ber_rdy1   (*(volatile byte xdata *) 0xF72E)
#define    p_reg_rsd_ber_rdy1   0xF72E
#define reg_rsd_ber_rdy1_pos 0
#define reg_rsd_ber_rdy1_len 1
#define reg_rsd_ber_rdy1_lsb 0
#define xd_p_reg_dca_txmod_sel  (*(volatile byte xdata *) 0xF72F)
#define    p_reg_dca_txmod_sel  0xF72F
#define reg_dca_txmod_sel_pos 0
#define reg_dca_txmod_sel_len 1
#define reg_dca_txmod_sel_lsb 0
#define xd_p_reg_dca_platch (*(volatile byte xdata *) 0xF730)
#define    p_reg_dca_platch 0xF730
#define reg_dca_platch_pos 0
#define reg_dca_platch_len 1
#define reg_dca_platch_lsb 0
#define xd_p_reg_dca_upper_chip (*(volatile byte xdata *) 0xF731)
#define    p_reg_dca_upper_chip 0xF731
#define reg_dca_upper_chip_pos 0
#define reg_dca_upper_chip_len 1
#define reg_dca_upper_chip_lsb 0
#define xd_p_reg_dca_lower_chip (*(volatile byte xdata *) 0xF732)
#define    p_reg_dca_lower_chip 0xF732
#define reg_dca_lower_chip_pos 0
#define reg_dca_lower_chip_len 1
#define reg_dca_lower_chip_lsb 0
#define xd_p_reg_dca_enl    (*(volatile byte xdata *) 0xF733)
#define    p_reg_dca_enl    0xF733
#define reg_dca_enl_pos 0
#define reg_dca_enl_len 1
#define reg_dca_enl_lsb 0
#define xd_p_reg_dca_enu    (*(volatile byte xdata *) 0xF734)
#define    p_reg_dca_enu    0xF734
#define reg_dca_enu_pos 0
#define reg_dca_enu_len 1
#define reg_dca_enu_lsb 0
#define xd_p_reg_dca_th (*(volatile byte xdata *) 0xF735)
#define    p_reg_dca_th 0xF735
#define reg_dca_th_pos 0
#define reg_dca_th_len 5
#define reg_dca_th_lsb 0
#define xd_p_reg_dca_scale  (*(volatile byte xdata *) 0xF736)
#define    p_reg_dca_scale  0xF736
#define reg_dca_scale_pos 0
#define reg_dca_scale_len 4
#define reg_dca_scale_lsb 0
#define xd_p_reg_dca_tone_7_0   (*(volatile byte xdata *) 0xF737)
#define    p_reg_dca_tone_7_0   0xF737
#define reg_dca_tone_7_0_pos 0
#define reg_dca_tone_7_0_len 8
#define reg_dca_tone_7_0_lsb 0
#define xd_p_reg_dca_tone_12_8  (*(volatile byte xdata *) 0xF738)
#define    p_reg_dca_tone_12_8  0xF738
#define reg_dca_tone_12_8_pos 0
#define reg_dca_tone_12_8_len 5
#define reg_dca_tone_12_8_lsb 8
#define xd_p_reg_dca_time_7_0   (*(volatile byte xdata *) 0xF739)
#define    p_reg_dca_time_7_0   0xF739
#define reg_dca_time_7_0_pos 0
#define reg_dca_time_7_0_len 8
#define reg_dca_time_7_0_lsb 0
#define xd_p_reg_dca_time_15_8  (*(volatile byte xdata *) 0xF73A)
#define    p_reg_dca_time_15_8  0xF73A
#define reg_dca_time_15_8_pos 0
#define reg_dca_time_15_8_len 8
#define reg_dca_time_15_8_lsb 8
#define xd_r_fec_dcasm  (*(volatile byte xdata *) 0xF73B)
#define    r_fec_dcasm  0xF73B
#define fec_dcasm_pos 0
#define fec_dcasm_len 3
#define fec_dcasm_lsb 0
#define xd_p_reg_dca_stand_alone    (*(volatile byte xdata *) 0xF73C)
#define    p_reg_dca_stand_alone    0xF73C
#define reg_dca_stand_alone_pos 0
#define reg_dca_stand_alone_len 1
#define reg_dca_stand_alone_lsb 0
#define xd_p_reg_dca_upper_out_en   (*(volatile byte xdata *) 0xF73D)
#define    p_reg_dca_upper_out_en   0xF73D
#define reg_dca_upper_out_en_pos 0
#define reg_dca_upper_out_en_len 1
#define reg_dca_upper_out_en_lsb 0
#define xd_p_reg_dca_rc_en  (*(volatile byte xdata *) 0xF73E)
#define    p_reg_dca_rc_en  0xF73E
#define reg_dca_rc_en_pos 0
#define reg_dca_rc_en_len 1
#define reg_dca_rc_en_lsb 0
#define xd_p_reg_dca_retrain_send   (*(volatile byte xdata *) 0xF73F)
#define    p_reg_dca_retrain_send   0xF73F
#define reg_dca_retrain_send_pos 0
#define reg_dca_retrain_send_len 1
#define reg_dca_retrain_send_lsb 0
#define xd_p_reg_dca_retrain_rec    (*(volatile byte xdata *) 0xF740)
#define    p_reg_dca_retrain_rec    0xF740
#define reg_dca_retrain_rec_pos 0
#define reg_dca_retrain_rec_len 1
#define reg_dca_retrain_rec_lsb 0
#define xd_p_reg_dca_gi_gap (*(volatile byte xdata *) 0xF741)
#define    p_reg_dca_gi_gap 0xF741
#define reg_dca_gi_gap_pos 0
#define reg_dca_gi_gap_len 8
#define reg_dca_gi_gap_lsb 0
#define xd_r_reg_dca_rec_up_tpsd_txmod  (*(volatile byte xdata *) 0xF742)
#define    r_reg_dca_rec_up_tpsd_txmod  0xF742
#define reg_dca_rec_up_tpsd_txmod_pos 0
#define reg_dca_rec_up_tpsd_txmod_len 2
#define reg_dca_rec_up_tpsd_txmod_lsb 0
#define xd_r_reg_dca_rec_up_tpsd_const  (*(volatile byte xdata *) 0xF743)
#define    r_reg_dca_rec_up_tpsd_const  0xF743
#define reg_dca_rec_up_tpsd_const_pos 0
#define reg_dca_rec_up_tpsd_const_len 2
#define reg_dca_rec_up_tpsd_const_lsb 0
#define xd_r_reg_dca_rec_up_tpsd_indep  (*(volatile byte xdata *) 0xF744)
#define    r_reg_dca_rec_up_tpsd_indep  0xF744
#define reg_dca_rec_up_tpsd_indep_pos 0
#define reg_dca_rec_up_tpsd_indep_len 1
#define reg_dca_rec_up_tpsd_indep_lsb 0
#define xd_r_reg_dca_rec_up_tpsd_hier   (*(volatile byte xdata *) 0xF745)
#define    r_reg_dca_rec_up_tpsd_hier   0xF745
#define reg_dca_rec_up_tpsd_hier_pos 0
#define reg_dca_rec_up_tpsd_hier_len 2
#define reg_dca_rec_up_tpsd_hier_lsb 0
#define xd_r_reg_dca_rec_up_tpsd_hpcr   (*(volatile byte xdata *) 0xF746)
#define    r_reg_dca_rec_up_tpsd_hpcr   0xF746
#define reg_dca_rec_up_tpsd_hpcr_pos 0
#define reg_dca_rec_up_tpsd_hpcr_len 3
#define reg_dca_rec_up_tpsd_hpcr_lsb 0
#define xd_r_reg_dca_rec_up_tpsd_lpcr   (*(volatile byte xdata *) 0xF747)
#define    r_reg_dca_rec_up_tpsd_lpcr   0xF747
#define reg_dca_rec_up_tpsd_lpcr_pos 0
#define reg_dca_rec_up_tpsd_lpcr_len 3
#define reg_dca_rec_up_tpsd_lpcr_lsb 0
#define xd_r_reg_dca_rec_up_tpsd_lock   (*(volatile byte xdata *) 0xF748)
#define    r_reg_dca_rec_up_tpsd_lock   0xF748
#define reg_dca_rec_up_tpsd_lock_pos 0
#define reg_dca_rec_up_tpsd_lock_len 1
#define reg_dca_rec_up_tpsd_lock_lsb 0
#define xd_r_reg_dca_rec_lo_tpsd_txmod  (*(volatile byte xdata *) 0xF749)
#define    r_reg_dca_rec_lo_tpsd_txmod  0xF749
#define reg_dca_rec_lo_tpsd_txmod_pos 0
#define reg_dca_rec_lo_tpsd_txmod_len 2
#define reg_dca_rec_lo_tpsd_txmod_lsb 0
#define xd_r_reg_dca_rec_lo_tpsd_const  (*(volatile byte xdata *) 0xF74A)
#define    r_reg_dca_rec_lo_tpsd_const  0xF74A
#define reg_dca_rec_lo_tpsd_const_pos 0
#define reg_dca_rec_lo_tpsd_const_len 2
#define reg_dca_rec_lo_tpsd_const_lsb 0
#define xd_r_reg_dca_rec_lo_tpsd_indep  (*(volatile byte xdata *) 0xF74B)
#define    r_reg_dca_rec_lo_tpsd_indep  0xF74B
#define reg_dca_rec_lo_tpsd_indep_pos 0
#define reg_dca_rec_lo_tpsd_indep_len 1
#define reg_dca_rec_lo_tpsd_indep_lsb 0
#define xd_r_reg_dca_rec_lo_tpsd_hier   (*(volatile byte xdata *) 0xF74C)
#define    r_reg_dca_rec_lo_tpsd_hier   0xF74C
#define reg_dca_rec_lo_tpsd_hier_pos 0
#define reg_dca_rec_lo_tpsd_hier_len 2
#define reg_dca_rec_lo_tpsd_hier_lsb 0
#define xd_r_reg_dca_rec_lo_tpsd_hpcr   (*(volatile byte xdata *) 0xF74D)
#define    r_reg_dca_rec_lo_tpsd_hpcr   0xF74D
#define reg_dca_rec_lo_tpsd_hpcr_pos 0
#define reg_dca_rec_lo_tpsd_hpcr_len 3
#define reg_dca_rec_lo_tpsd_hpcr_lsb 0
#define xd_r_reg_dca_rec_lo_tpsd_lpcr   (*(volatile byte xdata *) 0xF74E)
#define    r_reg_dca_rec_lo_tpsd_lpcr   0xF74E
#define reg_dca_rec_lo_tpsd_lpcr_pos 0
#define reg_dca_rec_lo_tpsd_lpcr_len 3
#define reg_dca_rec_lo_tpsd_lpcr_lsb 0
#define xd_r_reg_dca_rec_lo_tpsd_lock   (*(volatile byte xdata *) 0xF74F)
#define    r_reg_dca_rec_lo_tpsd_lock   0xF74F
#define reg_dca_rec_lo_tpsd_lock_pos 0
#define reg_dca_rec_lo_tpsd_lock_len 1
#define reg_dca_rec_lo_tpsd_lock_lsb 0
#define xd_p_reg_dca_gpr_ctr_up_send    (*(volatile byte xdata *) 0xF750)
#define    p_reg_dca_gpr_ctr_up_send    0xF750
#define reg_dca_gpr_ctr_up_send_pos 0
#define reg_dca_gpr_ctr_up_send_len 8
#define reg_dca_gpr_ctr_up_send_lsb 0
#define xd_p_reg_dca_gpr_dat_up_send_0  (*(volatile byte xdata *) 0xF751)
#define    p_reg_dca_gpr_dat_up_send_0  0xF751
#define reg_dca_gpr_dat_up_send_0_pos 0
#define reg_dca_gpr_dat_up_send_0_len 8
#define reg_dca_gpr_dat_up_send_0_lsb 0
#define xd_p_reg_dca_gpr_dat_up_send_1  (*(volatile byte xdata *) 0xF752)
#define    p_reg_dca_gpr_dat_up_send_1  0xF752
#define reg_dca_gpr_dat_up_send_1_pos 0
#define reg_dca_gpr_dat_up_send_1_len 8
#define reg_dca_gpr_dat_up_send_1_lsb 0
#define xd_p_reg_dca_gpr_dat_up_send_2  (*(volatile byte xdata *) 0xF753)
#define    p_reg_dca_gpr_dat_up_send_2  0xF753
#define reg_dca_gpr_dat_up_send_2_pos 0
#define reg_dca_gpr_dat_up_send_2_len 8
#define reg_dca_gpr_dat_up_send_2_lsb 0
#define xd_p_reg_dca_gpr_dat_up_send_3  (*(volatile byte xdata *) 0xF754)
#define    p_reg_dca_gpr_dat_up_send_3  0xF754
#define reg_dca_gpr_dat_up_send_3_pos 0
#define reg_dca_gpr_dat_up_send_3_len 8
#define reg_dca_gpr_dat_up_send_3_lsb 0
#define xd_p_reg_dca_gpr_dat_up_send_4  (*(volatile byte xdata *) 0xF755)
#define    p_reg_dca_gpr_dat_up_send_4  0xF755
#define reg_dca_gpr_dat_up_send_4_pos 0
#define reg_dca_gpr_dat_up_send_4_len 8
#define reg_dca_gpr_dat_up_send_4_lsb 0
#define xd_p_reg_dca_gpr_dat_up_send_5  (*(volatile byte xdata *) 0xF756)
#define    p_reg_dca_gpr_dat_up_send_5  0xF756
#define reg_dca_gpr_dat_up_send_5_pos 0
#define reg_dca_gpr_dat_up_send_5_len 8
#define reg_dca_gpr_dat_up_send_5_lsb 0
#define xd_p_reg_dca_over_wr_up_send    (*(volatile byte xdata *) 0xF757)
#define    p_reg_dca_over_wr_up_send    0xF757
#define reg_dca_over_wr_up_send_pos 0
#define reg_dca_over_wr_up_send_len 1
#define reg_dca_over_wr_up_send_lsb 0
#define xd_p_reg_dca_int_up_send    (*(volatile byte xdata *) 0xF758)
#define    p_reg_dca_int_up_send    0xF758
#define reg_dca_int_up_send_pos 0
#define reg_dca_int_up_send_len 1
#define reg_dca_int_up_send_lsb 0
#define xd_p_reg_dca_gpr_ctr_lo_send    (*(volatile byte xdata *) 0xF759)
#define    p_reg_dca_gpr_ctr_lo_send    0xF759
#define reg_dca_gpr_ctr_lo_send_pos 0
#define reg_dca_gpr_ctr_lo_send_len 8
#define reg_dca_gpr_ctr_lo_send_lsb 0
#define xd_p_reg_dca_gpr_dat_lo_send_0  (*(volatile byte xdata *) 0xF75A)
#define    p_reg_dca_gpr_dat_lo_send_0  0xF75A
#define reg_dca_gpr_dat_lo_send_0_pos 0
#define reg_dca_gpr_dat_lo_send_0_len 8
#define reg_dca_gpr_dat_lo_send_0_lsb 0
#define xd_p_reg_dca_gpr_dat_lo_send_1  (*(volatile byte xdata *) 0xF75B)
#define    p_reg_dca_gpr_dat_lo_send_1  0xF75B
#define reg_dca_gpr_dat_lo_send_1_pos 0
#define reg_dca_gpr_dat_lo_send_1_len 8
#define reg_dca_gpr_dat_lo_send_1_lsb 0
#define xd_p_reg_dca_gpr_dat_lo_send_2  (*(volatile byte xdata *) 0xF75C)
#define    p_reg_dca_gpr_dat_lo_send_2  0xF75C
#define reg_dca_gpr_dat_lo_send_2_pos 0
#define reg_dca_gpr_dat_lo_send_2_len 8
#define reg_dca_gpr_dat_lo_send_2_lsb 0
#define xd_p_reg_dca_gpr_dat_lo_send_3  (*(volatile byte xdata *) 0xF75D)
#define    p_reg_dca_gpr_dat_lo_send_3  0xF75D
#define reg_dca_gpr_dat_lo_send_3_pos 0
#define reg_dca_gpr_dat_lo_send_3_len 8
#define reg_dca_gpr_dat_lo_send_3_lsb 0
#define xd_p_reg_dca_gpr_dat_lo_send_4  (*(volatile byte xdata *) 0xF75E)
#define    p_reg_dca_gpr_dat_lo_send_4  0xF75E
#define reg_dca_gpr_dat_lo_send_4_pos 0
#define reg_dca_gpr_dat_lo_send_4_len 8
#define reg_dca_gpr_dat_lo_send_4_lsb 0
#define xd_p_reg_dca_gpr_dat_lo_send_5  (*(volatile byte xdata *) 0xF75F)
#define    p_reg_dca_gpr_dat_lo_send_5  0xF75F
#define reg_dca_gpr_dat_lo_send_5_pos 0
#define reg_dca_gpr_dat_lo_send_5_len 8
#define reg_dca_gpr_dat_lo_send_5_lsb 0
#define xd_p_reg_dca_over_wr_lo_send    (*(volatile byte xdata *) 0xF760)
#define    p_reg_dca_over_wr_lo_send    0xF760
#define reg_dca_over_wr_lo_send_pos 0
#define reg_dca_over_wr_lo_send_len 1
#define reg_dca_over_wr_lo_send_lsb 0
#define xd_p_reg_dca_int_lo_send    (*(volatile byte xdata *) 0xF761)
#define    p_reg_dca_int_lo_send    0xF761
#define reg_dca_int_lo_send_pos 0
#define reg_dca_int_lo_send_len 1
#define reg_dca_int_lo_send_lsb 0
#define xd_r_reg_dca_gpr_ctr_up_rec (*(volatile byte xdata *) 0xF762)
#define    r_reg_dca_gpr_ctr_up_rec 0xF762
#define reg_dca_gpr_ctr_up_rec_pos 0
#define reg_dca_gpr_ctr_up_rec_len 8
#define reg_dca_gpr_ctr_up_rec_lsb 0
#define xd_r_reg_dca_gpr_dat_up_rec_0   (*(volatile byte xdata *) 0xF763)
#define    r_reg_dca_gpr_dat_up_rec_0   0xF763
#define reg_dca_gpr_dat_up_rec_0_pos 0
#define reg_dca_gpr_dat_up_rec_0_len 8
#define reg_dca_gpr_dat_up_rec_0_lsb 0
#define xd_r_reg_dca_gpr_dat_up_rec_1   (*(volatile byte xdata *) 0xF764)
#define    r_reg_dca_gpr_dat_up_rec_1   0xF764
#define reg_dca_gpr_dat_up_rec_1_pos 0
#define reg_dca_gpr_dat_up_rec_1_len 8
#define reg_dca_gpr_dat_up_rec_1_lsb 0
#define xd_r_reg_dca_gpr_dat_up_rec_2   (*(volatile byte xdata *) 0xF765)
#define    r_reg_dca_gpr_dat_up_rec_2   0xF765
#define reg_dca_gpr_dat_up_rec_2_pos 0
#define reg_dca_gpr_dat_up_rec_2_len 8
#define reg_dca_gpr_dat_up_rec_2_lsb 0
#define xd_r_reg_dca_gpr_dat_up_rec_3   (*(volatile byte xdata *) 0xF766)
#define    r_reg_dca_gpr_dat_up_rec_3   0xF766
#define reg_dca_gpr_dat_up_rec_3_pos 0
#define reg_dca_gpr_dat_up_rec_3_len 8
#define reg_dca_gpr_dat_up_rec_3_lsb 0
#define xd_r_reg_dca_gpr_dat_up_rec_4   (*(volatile byte xdata *) 0xF767)
#define    r_reg_dca_gpr_dat_up_rec_4   0xF767
#define reg_dca_gpr_dat_up_rec_4_pos 0
#define reg_dca_gpr_dat_up_rec_4_len 8
#define reg_dca_gpr_dat_up_rec_4_lsb 0
#define xd_r_reg_dca_gpr_dat_up_rec_5   (*(volatile byte xdata *) 0xF768)
#define    r_reg_dca_gpr_dat_up_rec_5   0xF768
#define reg_dca_gpr_dat_up_rec_5_pos 0
#define reg_dca_gpr_dat_up_rec_5_len 8
#define reg_dca_gpr_dat_up_rec_5_lsb 0
#define xd_r_reg_dca_over_wr_up_rec (*(volatile byte xdata *) 0xF769)
#define    r_reg_dca_over_wr_up_rec 0xF769
#define reg_dca_over_wr_up_rec_pos 0
#define reg_dca_over_wr_up_rec_len 1
#define reg_dca_over_wr_up_rec_lsb 0
#define xd_p_reg_dca_int_up_rec (*(volatile byte xdata *) 0xF76A)
#define    p_reg_dca_int_up_rec 0xF76A
#define reg_dca_int_up_rec_pos 0
#define reg_dca_int_up_rec_len 1
#define reg_dca_int_up_rec_lsb 0
#define xd_p_reg_dca_fw_read_yet_up (*(volatile byte xdata *) 0xF76B)
#define    p_reg_dca_fw_read_yet_up 0xF76B
#define reg_dca_fw_read_yet_up_pos 0
#define reg_dca_fw_read_yet_up_len 1
#define reg_dca_fw_read_yet_up_lsb 0
#define xd_r_reg_dca_gpr_ctr_lo_rec (*(volatile byte xdata *) 0xF76C)
#define    r_reg_dca_gpr_ctr_lo_rec 0xF76C
#define reg_dca_gpr_ctr_lo_rec_pos 0
#define reg_dca_gpr_ctr_lo_rec_len 8
#define reg_dca_gpr_ctr_lo_rec_lsb 0
#define xd_r_reg_dca_gpr_dat_lo_rec_0   (*(volatile byte xdata *) 0xF76D)
#define    r_reg_dca_gpr_dat_lo_rec_0   0xF76D
#define reg_dca_gpr_dat_lo_rec_0_pos 0
#define reg_dca_gpr_dat_lo_rec_0_len 8
#define reg_dca_gpr_dat_lo_rec_0_lsb 0
#define xd_r_reg_dca_gpr_dat_lo_rec_1   (*(volatile byte xdata *) 0xF76E)
#define    r_reg_dca_gpr_dat_lo_rec_1   0xF76E
#define reg_dca_gpr_dat_lo_rec_1_pos 0
#define reg_dca_gpr_dat_lo_rec_1_len 8
#define reg_dca_gpr_dat_lo_rec_1_lsb 0
#define xd_r_reg_dca_gpr_dat_lo_rec_2   (*(volatile byte xdata *) 0xF76F)
#define    r_reg_dca_gpr_dat_lo_rec_2   0xF76F
#define reg_dca_gpr_dat_lo_rec_2_pos 0
#define reg_dca_gpr_dat_lo_rec_2_len 8
#define reg_dca_gpr_dat_lo_rec_2_lsb 0
#define xd_r_reg_dca_gpr_dat_lo_rec_3   (*(volatile byte xdata *) 0xF770)
#define    r_reg_dca_gpr_dat_lo_rec_3   0xF770
#define reg_dca_gpr_dat_lo_rec_3_pos 0
#define reg_dca_gpr_dat_lo_rec_3_len 8
#define reg_dca_gpr_dat_lo_rec_3_lsb 0
#define xd_r_reg_dca_gpr_dat_lo_rec_4   (*(volatile byte xdata *) 0xF771)
#define    r_reg_dca_gpr_dat_lo_rec_4   0xF771
#define reg_dca_gpr_dat_lo_rec_4_pos 0
#define reg_dca_gpr_dat_lo_rec_4_len 8
#define reg_dca_gpr_dat_lo_rec_4_lsb 0
#define xd_r_reg_dca_gpr_dat_lo_rec_5   (*(volatile byte xdata *) 0xF772)
#define    r_reg_dca_gpr_dat_lo_rec_5   0xF772
#define reg_dca_gpr_dat_lo_rec_5_pos 0
#define reg_dca_gpr_dat_lo_rec_5_len 8
#define reg_dca_gpr_dat_lo_rec_5_lsb 0
#define xd_r_reg_dca_over_wr_lo_rec (*(volatile byte xdata *) 0xF773)
#define    r_reg_dca_over_wr_lo_rec 0xF773
#define reg_dca_over_wr_lo_rec_pos 0
#define reg_dca_over_wr_lo_rec_len 1
#define reg_dca_over_wr_lo_rec_lsb 0
#define xd_p_reg_dca_int_lo_rec (*(volatile byte xdata *) 0xF774)
#define    p_reg_dca_int_lo_rec 0xF774
#define reg_dca_int_lo_rec_pos 0
#define reg_dca_int_lo_rec_len 1
#define reg_dca_int_lo_rec_lsb 0
#define xd_p_reg_dca_fw_read_yet_lo (*(volatile byte xdata *) 0xF775)
#define    p_reg_dca_fw_read_yet_lo 0xF775
#define reg_dca_fw_read_yet_lo_pos 0
#define reg_dca_fw_read_yet_lo_len 1
#define reg_dca_fw_read_yet_lo_lsb 0
#define xd_p_reg_dca_en (*(volatile byte xdata *) 0xF776)
#define    p_reg_dca_en 0xF776
#define reg_dca_en_pos 0
#define reg_dca_en_len 1
#define reg_dca_en_lsb 0
#define xd_p_reg_dca_ulrdy_delay    (*(volatile byte xdata *) 0xF777)
#define    p_reg_dca_ulrdy_delay    0xF777
#define reg_dca_ulrdy_delay_pos 0
#define reg_dca_ulrdy_delay_len 8
#define reg_dca_ulrdy_delay_lsb 0
#define xd_p_reg_dca_fpga_latch (*(volatile byte xdata *) 0xF778)
#define    p_reg_dca_fpga_latch 0xF778
#define reg_dca_fpga_latch_pos 0
#define reg_dca_fpga_latch_len 8
#define reg_dca_fpga_latch_lsb 0
#define xd_p_reg_dca_vldld_err  (*(volatile byte xdata *) 0xF779)
#define    p_reg_dca_vldld_err  0xF779
#define reg_dca_vldld_err_pos 0
#define reg_dca_vldld_err_len 1
#define reg_dca_vldld_err_lsb 0
#define xd_p_reg_dca_vldud_err  (*(volatile byte xdata *) 0xF77A)
#define    p_reg_dca_vldud_err  0xF77A
#define reg_dca_vldud_err_pos 0
#define reg_dca_vldud_err_len 1
#define reg_dca_vldud_err_lsb 0
#define xd_p_reg_dca_modeu_err  (*(volatile byte xdata *) 0xF77B)
#define    p_reg_dca_modeu_err  0xF77B
#define reg_dca_modeu_err_pos 0
#define reg_dca_modeu_err_len 1
#define reg_dca_modeu_err_lsb 0
#define xd_p_reg_dca_model_err  (*(volatile byte xdata *) 0xF77C)
#define    p_reg_dca_model_err  0xF77C
#define reg_dca_model_err_pos 0
#define reg_dca_model_err_len 1
#define reg_dca_model_err_lsb 0
#define xd_p_reg_dca_interrupt  (*(volatile byte xdata *) 0xF77D)
#define    p_reg_dca_interrupt  0xF77D
#define reg_dca_interrupt_pos 0
#define reg_dca_interrupt_len 1
#define reg_dca_interrupt_lsb 0
#define xd_p_reg_dca_auto_reset_en  (*(volatile byte xdata *) 0xF77E)
#define    p_reg_dca_auto_reset_en  0xF77E
#define reg_dca_auto_reset_en_pos 0
#define reg_dca_auto_reset_en_len 1
#define reg_dca_auto_reset_en_lsb 0
#define xd_p_reg_qnt_valuew_7_0 (*(volatile byte xdata *) 0xF77F)
#define    p_reg_qnt_valuew_7_0 0xF77F
#define reg_qnt_valuew_7_0_pos 0
#define reg_qnt_valuew_7_0_len 8
#define reg_qnt_valuew_7_0_lsb 0
#define xd_p_reg_qnt_valuew_10_8    (*(volatile byte xdata *) 0xF780)
#define    p_reg_qnt_valuew_10_8    0xF780
#define reg_qnt_valuew_10_8_pos 0
#define reg_qnt_valuew_10_8_len 3
#define reg_qnt_valuew_10_8_lsb 8
#define xd_p_reg_qnt_nfvaluew_7_0   (*(volatile byte xdata *) 0xF781)
#define    p_reg_qnt_nfvaluew_7_0   0xF781
#define reg_qnt_nfvaluew_7_0_pos 0
#define reg_qnt_nfvaluew_7_0_len 8
#define reg_qnt_nfvaluew_7_0_lsb 0
#define xd_p_reg_qnt_nfvaluew_10_8  (*(volatile byte xdata *) 0xF782)
#define    p_reg_qnt_nfvaluew_10_8  0xF782
#define reg_qnt_nfvaluew_10_8_pos 0
#define reg_qnt_nfvaluew_10_8_len 3
#define reg_qnt_nfvaluew_10_8_lsb 8
#define xd_p_reg_qnt_flatness_thr_7_0   (*(volatile byte xdata *) 0xF783)
#define    p_reg_qnt_flatness_thr_7_0   0xF783
#define reg_qnt_flatness_thr_7_0_pos 0
#define reg_qnt_flatness_thr_7_0_len 8
#define reg_qnt_flatness_thr_7_0_lsb 0
#define xd_p_reg_qnt_flatness_thr_8 (*(volatile byte xdata *) 0xF784)
#define    p_reg_qnt_flatness_thr_8 0xF784
#define reg_qnt_flatness_thr_8_pos 0
#define reg_qnt_flatness_thr_8_len 1
#define reg_qnt_flatness_thr_8_lsb 8
#define xd_p_reg_llr_to_be_monitor  (*(volatile byte xdata *) 0xF785)
#define    p_reg_llr_to_be_monitor  0xF785
#define reg_llr_to_be_monitor_pos 0
#define reg_llr_to_be_monitor_len 1
#define reg_llr_to_be_monitor_lsb 0
#define xd_p_reg_qnt_vbc_rdy    (*(volatile byte xdata *) 0xF786)
#define    p_reg_qnt_vbc_rdy    0xF786
#define reg_qnt_vbc_rdy_pos 0
#define reg_qnt_vbc_rdy_len 1
#define reg_qnt_vbc_rdy_lsb 0
#define xd_p_reg_qnt_noncmb_vbc_rdy (*(volatile byte xdata *) 0xF787)
#define    p_reg_qnt_noncmb_vbc_rdy 0xF787
#define reg_qnt_noncmb_vbc_rdy_pos 0
#define reg_qnt_noncmb_vbc_rdy_len 1
#define reg_qnt_noncmb_vbc_rdy_lsb 0
#define xd_p_reg_use_eh2_mean   (*(volatile byte xdata *) 0xF788)
#define    p_reg_use_eh2_mean   0xF788
#define reg_use_eh2_mean_pos 0
#define reg_use_eh2_mean_len 1
#define reg_use_eh2_mean_lsb 0
#define xd_p_reg_qnt_vbc_ccid_mode  (*(volatile byte xdata *) 0xF789)
#define    p_reg_qnt_vbc_ccid_mode  0xF789
#define reg_qnt_vbc_ccid_mode_pos 0
#define reg_qnt_vbc_ccid_mode_len 1
#define reg_qnt_vbc_ccid_mode_lsb 0
#define xd_p_reg_qnt_cci_bandsize   (*(volatile byte xdata *) 0xF78A)
#define    p_reg_qnt_cci_bandsize   0xF78A
#define reg_qnt_cci_bandsize_pos 0
#define reg_qnt_cci_bandsize_len 4
#define reg_qnt_cci_bandsize_lsb 0
#define xd_p_reg_qnt_vbc_sframe_num (*(volatile byte xdata *) 0xF78B)
#define    p_reg_qnt_vbc_sframe_num 0xF78B
#define reg_qnt_vbc_sframe_num_pos 0
#define reg_qnt_vbc_sframe_num_len 8
#define reg_qnt_vbc_sframe_num_lsb 0
#define xd_p_reg_sbx_gain_diff_7_0  (*(volatile byte xdata *) 0xF78C)
#define    p_reg_sbx_gain_diff_7_0  0xF78C
#define reg_sbx_gain_diff_7_0_pos 0
#define reg_sbx_gain_diff_7_0_len 8
#define reg_sbx_gain_diff_7_0_lsb 0
#define xd_p_reg_sbx_gain_diff_8    (*(volatile byte xdata *) 0xF78D)
#define    p_reg_sbx_gain_diff_8    0xF78D
#define reg_sbx_gain_diff_8_pos 0
#define reg_sbx_gain_diff_8_len 1
#define reg_sbx_gain_diff_8_lsb 8
#define xd_p_reg_sbx_gain_diff_rdy  (*(volatile byte xdata *) 0xF78E)
#define    p_reg_sbx_gain_diff_rdy  0xF78E
#define reg_sbx_gain_diff_rdy_pos 0
#define reg_sbx_gain_diff_rdy_len 1
#define reg_sbx_gain_diff_rdy_lsb 0
#define xd_p_reg_sbx_noncmb_gain_diff_7_0   (*(volatile byte xdata *) 0xF78F)
#define    p_reg_sbx_noncmb_gain_diff_7_0   0xF78F
#define reg_sbx_noncmb_gain_diff_7_0_pos 0
#define reg_sbx_noncmb_gain_diff_7_0_len 8
#define reg_sbx_noncmb_gain_diff_7_0_lsb 0
#define xd_p_reg_sbx_noncmb_gain_diff_8 (*(volatile byte xdata *) 0xF790)
#define    p_reg_sbx_noncmb_gain_diff_8 0xF790
#define reg_sbx_noncmb_gain_diff_8_pos 0
#define reg_sbx_noncmb_gain_diff_8_len 1
#define reg_sbx_noncmb_gain_diff_8_lsb 8
#define xd_p_reg_sbx_noncmb_gain_diff_rdy   (*(volatile byte xdata *) 0xF791)
#define    p_reg_sbx_noncmb_gain_diff_rdy   0xF791
#define reg_sbx_noncmb_gain_diff_rdy_pos 0
#define reg_sbx_noncmb_gain_diff_rdy_len 1
#define reg_sbx_noncmb_gain_diff_rdy_lsb 0
#define xd_r_reg_qnt_vbc_err_7_0    (*(volatile byte xdata *) 0xF792)
#define    r_reg_qnt_vbc_err_7_0    0xF792
#define reg_qnt_vbc_err_7_0_pos 0
#define reg_qnt_vbc_err_7_0_len 8
#define reg_qnt_vbc_err_7_0_lsb 0
#define xd_r_reg_qnt_vbc_err_15_8   (*(volatile byte xdata *) 0xF793)
#define    r_reg_qnt_vbc_err_15_8   0xF793
#define reg_qnt_vbc_err_15_8_pos 0
#define reg_qnt_vbc_err_15_8_len 8
#define reg_qnt_vbc_err_15_8_lsb 8
#define xd_r_reg_qnt_vbc_err_23_16  (*(volatile byte xdata *) 0xF794)
#define    r_reg_qnt_vbc_err_23_16  0xF794
#define reg_qnt_vbc_err_23_16_pos 0
#define reg_qnt_vbc_err_23_16_len 8
#define reg_qnt_vbc_err_23_16_lsb 16
#define xd_r_reg_qnt_noncmb_vbc_err_7_0 (*(volatile byte xdata *) 0xF795)
#define    r_reg_qnt_noncmb_vbc_err_7_0 0xF795
#define reg_qnt_noncmb_vbc_err_7_0_pos 0
#define reg_qnt_noncmb_vbc_err_7_0_len 8
#define reg_qnt_noncmb_vbc_err_7_0_lsb 0
#define xd_r_reg_qnt_noncmb_vbc_err_15_8    (*(volatile byte xdata *) 0xF796)
#define    r_reg_qnt_noncmb_vbc_err_15_8    0xF796
#define reg_qnt_noncmb_vbc_err_15_8_pos 0
#define reg_qnt_noncmb_vbc_err_15_8_len 8
#define reg_qnt_noncmb_vbc_err_15_8_lsb 8
#define xd_r_reg_qnt_noncmb_vbc_err_23_16   (*(volatile byte xdata *) 0xF797)
#define    r_reg_qnt_noncmb_vbc_err_23_16   0xF797
#define reg_qnt_noncmb_vbc_err_23_16_pos 0
#define reg_qnt_noncmb_vbc_err_23_16_len 8
#define reg_qnt_noncmb_vbc_err_23_16_lsb 16
#define xd_p_reg_sbx_signalquality_threshold    (*(volatile byte xdata *) 0xF798)
#define    p_reg_sbx_signalquality_threshold    0xF798
#define reg_sbx_signalquality_threshold_pos 0
#define reg_sbx_signalquality_threshold_len 4
#define reg_sbx_signalquality_threshold_lsb 0
#define xd_r_reg_sbx_signalquality_ind  (*(volatile byte xdata *) 0xF799)
#define    r_reg_sbx_signalquality_ind  0xF799
#define reg_sbx_signalquality_ind_pos 0
#define reg_sbx_signalquality_ind_len 1
#define reg_sbx_signalquality_ind_lsb 0
#define xd_p_reg_p_sbxqnt_th1   (*(volatile byte xdata *) 0xF79A)
#define    p_reg_p_sbxqnt_th1   0xF79A
#define reg_p_sbxqnt_th1_pos 0
#define reg_p_sbxqnt_th1_len 8
#define reg_p_sbxqnt_th1_lsb 0
#define xd_p_reg_p_sbxqnt_th2   (*(volatile byte xdata *) 0xF79B)
#define    p_reg_p_sbxqnt_th2   0xF79B
#define reg_p_sbxqnt_th2_pos 0
#define reg_p_sbxqnt_th2_len 8
#define reg_p_sbxqnt_th2_lsb 0
#define xd_p_reg_p_sbxqnt_th3   (*(volatile byte xdata *) 0xF79C)
#define    p_reg_p_sbxqnt_th3   0xF79C
#define reg_p_sbxqnt_th3_pos 0
#define reg_p_sbxqnt_th3_len 8
#define reg_p_sbxqnt_th3_lsb 0
#define xd_p_reg_p_sbxqnt_th4   (*(volatile byte xdata *) 0xF79D)
#define    p_reg_p_sbxqnt_th4   0xF79D
#define reg_p_sbxqnt_th4_pos 0
#define reg_p_sbxqnt_th4_len 8
#define reg_p_sbxqnt_th4_lsb 0
#define xd_p_reg_p_sbxqnt_th5   (*(volatile byte xdata *) 0xF79E)
#define    p_reg_p_sbxqnt_th5   0xF79E
#define reg_p_sbxqnt_th5_pos 0
#define reg_p_sbxqnt_th5_len 8
#define reg_p_sbxqnt_th5_lsb 0
#define xd_p_reg_p_sbxqnt_th6   (*(volatile byte xdata *) 0xF79F)
#define    p_reg_p_sbxqnt_th6   0xF79F
#define reg_p_sbxqnt_th6_pos 0
#define reg_p_sbxqnt_th6_len 8
#define reg_p_sbxqnt_th6_lsb 0
#define xd_p_reg_p_sbxqnt_th7   (*(volatile byte xdata *) 0xF800)
#define    p_reg_p_sbxqnt_th7   0xF800
#define reg_p_sbxqnt_th7_pos 0
#define reg_p_sbxqnt_th7_len 8
#define reg_p_sbxqnt_th7_lsb 0
#define xd_p_reg_p_sbxqnt_th8   (*(volatile byte xdata *) 0xF801)
#define    p_reg_p_sbxqnt_th8   0xF801
#define reg_p_sbxqnt_th8_pos 0
#define reg_p_sbxqnt_th8_len 8
#define reg_p_sbxqnt_th8_lsb 0
#define xd_p_reg_p_sbxqnt_th9   (*(volatile byte xdata *) 0xF802)
#define    p_reg_p_sbxqnt_th9   0xF802
#define reg_p_sbxqnt_th9_pos 0
#define reg_p_sbxqnt_th9_len 8
#define reg_p_sbxqnt_th9_lsb 0
#define xd_p_reg_p_sbxqnt_th10  (*(volatile byte xdata *) 0xF803)
#define    p_reg_p_sbxqnt_th10  0xF803
#define reg_p_sbxqnt_th10_pos 0
#define reg_p_sbxqnt_th10_len 8
#define reg_p_sbxqnt_th10_lsb 0
#define xd_p_reg_p_sbxqnt_th11  (*(volatile byte xdata *) 0xF804)
#define    p_reg_p_sbxqnt_th11  0xF804
#define reg_p_sbxqnt_th11_pos 0
#define reg_p_sbxqnt_th11_len 8
#define reg_p_sbxqnt_th11_lsb 0
#define xd_p_reg_p_sbxqnt_th12  (*(volatile byte xdata *) 0xF805)
#define    p_reg_p_sbxqnt_th12  0xF805
#define reg_p_sbxqnt_th12_pos 0
#define reg_p_sbxqnt_th12_len 8
#define reg_p_sbxqnt_th12_lsb 0
#define xd_p_reg_p_sbxqnt_th13_7_0  (*(volatile byte xdata *) 0xF806)
#define    p_reg_p_sbxqnt_th13_7_0  0xF806
#define reg_p_sbxqnt_th13_7_0_pos 0
#define reg_p_sbxqnt_th13_7_0_len 8
#define reg_p_sbxqnt_th13_7_0_lsb 0
#define xd_p_reg_p_sbxqnt_th13_9_8  (*(volatile byte xdata *) 0xF807)
#define    p_reg_p_sbxqnt_th13_9_8  0xF807
#define reg_p_sbxqnt_th13_9_8_pos 0
#define reg_p_sbxqnt_th13_9_8_len 2
#define reg_p_sbxqnt_th13_9_8_lsb 8
#define xd_p_reg_p_sbxqnt_th14_7_0  (*(volatile byte xdata *) 0xF808)
#define    p_reg_p_sbxqnt_th14_7_0  0xF808
#define reg_p_sbxqnt_th14_7_0_pos 0
#define reg_p_sbxqnt_th14_7_0_len 8
#define reg_p_sbxqnt_th14_7_0_lsb 0
#define xd_p_reg_p_sbxqnt_th14_9_8  (*(volatile byte xdata *) 0xF809)
#define    p_reg_p_sbxqnt_th14_9_8  0xF809
#define reg_p_sbxqnt_th14_9_8_pos 0
#define reg_p_sbxqnt_th14_9_8_len 2
#define reg_p_sbxqnt_th14_9_8_lsb 8
#define xd_p_reg_p_sbxqnt_th15_7_0  (*(volatile byte xdata *) 0xF80A)
#define    p_reg_p_sbxqnt_th15_7_0  0xF80A
#define reg_p_sbxqnt_th15_7_0_pos 0
#define reg_p_sbxqnt_th15_7_0_len 8
#define reg_p_sbxqnt_th15_7_0_lsb 0
#define xd_p_reg_p_sbxqnt_th15_9_8  (*(volatile byte xdata *) 0xF80B)
#define    p_reg_p_sbxqnt_th15_9_8  0xF80B
#define reg_p_sbxqnt_th15_9_8_pos 0
#define reg_p_sbxqnt_th15_9_8_len 2
#define reg_p_sbxqnt_th15_9_8_lsb 8
#define xd_p_reg_p_sbxqnt_vzh2_th0  (*(volatile byte xdata *) 0xF80C)
#define    p_reg_p_sbxqnt_vzh2_th0  0xF80C
#define reg_p_sbxqnt_vzh2_th0_pos 0
#define reg_p_sbxqnt_vzh2_th0_len 8
#define reg_p_sbxqnt_vzh2_th0_lsb 0
#define xd_p_reg_p_sbxqnt_vzh2_th1  (*(volatile byte xdata *) 0xF80D)
#define    p_reg_p_sbxqnt_vzh2_th1  0xF80D
#define reg_p_sbxqnt_vzh2_th1_pos 0
#define reg_p_sbxqnt_vzh2_th1_len 8
#define reg_p_sbxqnt_vzh2_th1_lsb 0
#define xd_p_reg_p_sbxqnt_vzh2_th2  (*(volatile byte xdata *) 0xF80E)
#define    p_reg_p_sbxqnt_vzh2_th2  0xF80E
#define reg_p_sbxqnt_vzh2_th2_pos 0
#define reg_p_sbxqnt_vzh2_th2_len 8
#define reg_p_sbxqnt_vzh2_th2_lsb 0
#define xd_p_reg_p_qnt_w_comp1  (*(volatile byte xdata *) 0xF80F)
#define    p_reg_p_qnt_w_comp1  0xF80F
#define reg_p_qnt_w_comp1_pos 0
#define reg_p_qnt_w_comp1_len 8
#define reg_p_qnt_w_comp1_lsb 0
#define xd_p_reg_p_qnt_w_comp2  (*(volatile byte xdata *) 0xF810)
#define    p_reg_p_qnt_w_comp2  0xF810
#define reg_p_qnt_w_comp2_pos 0
#define reg_p_qnt_w_comp2_len 8
#define reg_p_qnt_w_comp2_lsb 0
#define xd_p_reg_p_qnt_w_comp3  (*(volatile byte xdata *) 0xF811)
#define    p_reg_p_qnt_w_comp3  0xF811
#define reg_p_qnt_w_comp3_pos 0
#define reg_p_qnt_w_comp3_len 8
#define reg_p_qnt_w_comp3_lsb 0
#define xd_p_reg_p_vtb_in_0 (*(volatile byte xdata *) 0xF821)
#define    p_reg_p_vtb_in_0 0xF821
#define reg_p_vtb_in_0_pos 0
#define reg_p_vtb_in_0_len 6
#define reg_p_vtb_in_0_lsb 0
#define xd_p_reg_p_vtb_in_1 (*(volatile byte xdata *) 0xF822)
#define    p_reg_p_vtb_in_1 0xF822
#define reg_p_vtb_in_1_pos 0
#define reg_p_vtb_in_1_len 6
#define reg_p_vtb_in_1_lsb 0
#define xd_p_reg_p_vtb_in_2 (*(volatile byte xdata *) 0xF823)
#define    p_reg_p_vtb_in_2 0xF823
#define reg_p_vtb_in_2_pos 0
#define reg_p_vtb_in_2_len 6
#define reg_p_vtb_in_2_lsb 0
#define xd_p_reg_p_vtb_in_3 (*(volatile byte xdata *) 0xF824)
#define    p_reg_p_vtb_in_3 0xF824
#define reg_p_vtb_in_3_pos 0
#define reg_p_vtb_in_3_len 6
#define reg_p_vtb_in_3_lsb 0
#define xd_p_reg_p_vtb_in_4 (*(volatile byte xdata *) 0xF825)
#define    p_reg_p_vtb_in_4 0xF825
#define reg_p_vtb_in_4_pos 0
#define reg_p_vtb_in_4_len 6
#define reg_p_vtb_in_4_lsb 0
#define xd_p_reg_p_vtb_in_5 (*(volatile byte xdata *) 0xF826)
#define    p_reg_p_vtb_in_5 0xF826
#define reg_p_vtb_in_5_pos 0
#define reg_p_vtb_in_5_len 6
#define reg_p_vtb_in_5_lsb 0
#define xd_p_reg_p_vtb_in_6 (*(volatile byte xdata *) 0xF827)
#define    p_reg_p_vtb_in_6 0xF827
#define reg_p_vtb_in_6_pos 0
#define reg_p_vtb_in_6_len 6
#define reg_p_vtb_in_6_lsb 0
#define xd_p_reg_p_vtb_in_7 (*(volatile byte xdata *) 0xF828)
#define    p_reg_p_vtb_in_7 0xF828
#define reg_p_vtb_in_7_pos 0
#define reg_p_vtb_in_7_len 6
#define reg_p_vtb_in_7_lsb 0
#define xd_p_reg_p_vtb_in_8 (*(volatile byte xdata *) 0xF829)
#define    p_reg_p_vtb_in_8 0xF829
#define reg_p_vtb_in_8_pos 0
#define reg_p_vtb_in_8_len 6
#define reg_p_vtb_in_8_lsb 0
#define xd_p_reg_p_vtb_in_9 (*(volatile byte xdata *) 0xF82A)
#define    p_reg_p_vtb_in_9 0xF82A
#define reg_p_vtb_in_9_pos 0
#define reg_p_vtb_in_9_len 6
#define reg_p_vtb_in_9_lsb 0
#define xd_p_reg_p_vtb_in_10    (*(volatile byte xdata *) 0xF82B)
#define    p_reg_p_vtb_in_10    0xF82B
#define reg_p_vtb_in_10_pos 0
#define reg_p_vtb_in_10_len 6
#define reg_p_vtb_in_10_lsb 0
#define xd_p_reg_p_vtb_in_11    (*(volatile byte xdata *) 0xF82C)
#define    p_reg_p_vtb_in_11    0xF82C
#define reg_p_vtb_in_11_pos 0
#define reg_p_vtb_in_11_len 6
#define reg_p_vtb_in_11_lsb 0
#define xd_p_reg_p_vtb_in_12    (*(volatile byte xdata *) 0xF82D)
#define    p_reg_p_vtb_in_12    0xF82D
#define reg_p_vtb_in_12_pos 0
#define reg_p_vtb_in_12_len 6
#define reg_p_vtb_in_12_lsb 0
#define xd_p_reg_p_vtb_in_13    (*(volatile byte xdata *) 0xF82E)
#define    p_reg_p_vtb_in_13    0xF82E
#define reg_p_vtb_in_13_pos 0
#define reg_p_vtb_in_13_len 6
#define reg_p_vtb_in_13_lsb 0
#define xd_p_reg_p_vtb_in_14    (*(volatile byte xdata *) 0xF82F)
#define    p_reg_p_vtb_in_14    0xF82F
#define reg_p_vtb_in_14_pos 0
#define reg_p_vtb_in_14_len 6
#define reg_p_vtb_in_14_lsb 0
#define xd_p_reg_p_vtb_in_15    (*(volatile byte xdata *) 0xF830)
#define    p_reg_p_vtb_in_15    0xF830
#define reg_p_vtb_in_15_pos 0
#define reg_p_vtb_in_15_len 6
#define reg_p_vtb_in_15_lsb 0
#define xd_I2C_i2c_m_slave_addr (*(volatile byte xdata *) 0xF940)
#define    I2C_i2c_m_slave_addr 0xF940
#define i2c_m_slave_addr_pos 0
#define i2c_m_slave_addr_len 8
#define i2c_m_slave_addr_lsb 0
#define xd_I2C_i2c_m_data1  (*(volatile byte xdata *) 0xF941)
#define    I2C_i2c_m_data1  0xF941
#define i2c_m_data1_pos 0
#define i2c_m_data1_len 8
#define i2c_m_data1_lsb 0
#define xd_I2C_i2c_m_data2  (*(volatile byte xdata *) 0xF942)
#define    I2C_i2c_m_data2  0xF942
#define i2c_m_data2_pos 0
#define i2c_m_data2_len 8
#define i2c_m_data2_lsb 0
#define xd_I2C_i2c_m_data3  (*(volatile byte xdata *) 0xF943)
#define    I2C_i2c_m_data3  0xF943
#define i2c_m_data3_pos 0
#define i2c_m_data3_len 8
#define i2c_m_data3_lsb 0
#define xd_I2C_i2c_m_data4  (*(volatile byte xdata *) 0xF944)
#define    I2C_i2c_m_data4  0xF944
#define i2c_m_data4_pos 0
#define i2c_m_data4_len 8
#define i2c_m_data4_lsb 0
#define xd_I2C_i2c_m_data5  (*(volatile byte xdata *) 0xF945)
#define    I2C_i2c_m_data5  0xF945
#define i2c_m_data5_pos 0
#define i2c_m_data5_len 8
#define i2c_m_data5_lsb 0
#define xd_I2C_i2c_m_data6  (*(volatile byte xdata *) 0xF946)
#define    I2C_i2c_m_data6  0xF946
#define i2c_m_data6_pos 0
#define i2c_m_data6_len 8
#define i2c_m_data6_lsb 0
#define xd_I2C_i2c_m_data7  (*(volatile byte xdata *) 0xF947)
#define    I2C_i2c_m_data7  0xF947
#define i2c_m_data7_pos 0
#define i2c_m_data7_len 8
#define i2c_m_data7_lsb 0
#define xd_I2C_i2c_m_data8  (*(volatile byte xdata *) 0xF948)
#define    I2C_i2c_m_data8  0xF948
#define i2c_m_data8_pos 0
#define i2c_m_data8_len 8
#define i2c_m_data8_lsb 0
#define xd_I2C_i2c_m_data9  (*(volatile byte xdata *) 0xF949)
#define    I2C_i2c_m_data9  0xF949
#define i2c_m_data9_pos 0
#define i2c_m_data9_len 8
#define i2c_m_data9_lsb 0
#define xd_I2C_i2c_m_data10 (*(volatile byte xdata *) 0xF94A)
#define    I2C_i2c_m_data10 0xF94A
#define i2c_m_data10_pos 0
#define i2c_m_data10_len 8
#define i2c_m_data10_lsb 0
#define xd_I2C_i2c_m_data11 (*(volatile byte xdata *) 0xF94B)
#define    I2C_i2c_m_data11 0xF94B
#define i2c_m_data11_pos 0
#define i2c_m_data11_len 8
#define i2c_m_data11_lsb 0
#define xd_I2C_i2c_m_data12 (*(volatile byte xdata *) 0xF94C)
#define    I2C_i2c_m_data12 0xF94C
#define i2c_m_data12_pos 0
#define i2c_m_data12_len 8
#define i2c_m_data12_lsb 0
#define xd_I2C_i2c_m_data13 (*(volatile byte xdata *) 0xF94D)
#define    I2C_i2c_m_data13 0xF94D
#define i2c_m_data13_pos 0
#define i2c_m_data13_len 8
#define i2c_m_data13_lsb 0
#define xd_I2C_i2c_m_data14 (*(volatile byte xdata *) 0xF94E)
#define    I2C_i2c_m_data14 0xF94E
#define i2c_m_data14_pos 0
#define i2c_m_data14_len 8
#define i2c_m_data14_lsb 0
#define xd_I2C_i2c_m_data15 (*(volatile byte xdata *) 0xF94F)
#define    I2C_i2c_m_data15 0xF94F
#define i2c_m_data15_pos 0
#define i2c_m_data15_len 8
#define i2c_m_data15_lsb 0
#define xd_I2C_i2c_m_data16 (*(volatile byte xdata *) 0xF950)
#define    I2C_i2c_m_data16 0xF950
#define i2c_m_data16_pos 0
#define i2c_m_data16_len 8
#define i2c_m_data16_lsb 0
#define xd_I2C_i2c_m_data17 (*(volatile byte xdata *) 0xF951)
#define    I2C_i2c_m_data17 0xF951
#define i2c_m_data17_pos 0
#define i2c_m_data17_len 8
#define i2c_m_data17_lsb 0
#define xd_I2C_i2c_m_data18 (*(volatile byte xdata *) 0xF952)
#define    I2C_i2c_m_data18 0xF952
#define i2c_m_data18_pos 0
#define i2c_m_data18_len 8
#define i2c_m_data18_lsb 0
#define xd_I2C_i2c_m_data19 (*(volatile byte xdata *) 0xF953)
#define    I2C_i2c_m_data19 0xF953
#define i2c_m_data19_pos 0
#define i2c_m_data19_len 8
#define i2c_m_data19_lsb 0
#define xd_I2C_i2c_m_cmd_rw (*(volatile byte xdata *) 0xF954)
#define    I2C_i2c_m_cmd_rw 0xF954
#define i2c_m_cmd_rw_pos 0
#define i2c_m_cmd_rw_len 1
#define i2c_m_cmd_rw_lsb 0
#define xd_I2C_i2c_m_cmd_rwlen  (*(volatile byte xdata *) 0xF954)
#define    I2C_i2c_m_cmd_rwlen  0xF954
#define i2c_m_cmd_rwlen_pos 3
#define i2c_m_cmd_rwlen_len 4
#define i2c_m_cmd_rwlen_lsb 0
#define xd_I2C_i2c_m_status_cmd_exe (*(volatile byte xdata *) 0xF955)
#define    I2C_i2c_m_status_cmd_exe 0xF955
#define i2c_m_status_cmd_exe_pos 0
#define i2c_m_status_cmd_exe_len 1
#define i2c_m_status_cmd_exe_lsb 0
#define xd_I2C_i2c_m_status_wdat_done   (*(volatile byte xdata *) 0xF955)
#define    I2C_i2c_m_status_wdat_done   0xF955
#define i2c_m_status_wdat_done_pos 1
#define i2c_m_status_wdat_done_len 1
#define i2c_m_status_wdat_done_lsb 0
#define xd_I2C_i2c_m_status_wdat_fail   (*(volatile byte xdata *) 0xF955)
#define    I2C_i2c_m_status_wdat_fail   0xF955
#define i2c_m_status_wdat_fail_pos 2
#define i2c_m_status_wdat_fail_len 1
#define i2c_m_status_wdat_fail_lsb 0
#define xd_I2C_i2c_m_status_rdat_rdy    (*(volatile byte xdata *) 0xF955)
#define    I2C_i2c_m_status_rdat_rdy    0xF955
#define i2c_m_status_rdat_rdy_pos 3
#define i2c_m_status_rdat_rdy_len 1
#define i2c_m_status_rdat_rdy_lsb 0
#define xd_I2C_i2c_m_period (*(volatile byte xdata *) 0xF956)
#define    I2C_i2c_m_period 0xF956
#define i2c_m_period_pos 0
#define i2c_m_period_len 8
#define i2c_m_period_lsb 0
#define xd_I2C_i2c_m_reg_msb_lsb    (*(volatile byte xdata *) 0xF957)
#define    I2C_i2c_m_reg_msb_lsb    0xF957
#define i2c_m_reg_msb_lsb_pos 0
#define i2c_m_reg_msb_lsb_len 1
#define i2c_m_reg_msb_lsb_lsb 0
#define xd_I2C_reg_ofdm_rst (*(volatile byte xdata *) 0xF957)
#define    I2C_reg_ofdm_rst 0xF957
#define reg_ofdm_rst_pos 1
#define reg_ofdm_rst_len 1
#define reg_ofdm_rst_lsb 0
#define xd_I2C_reg_sample_period_on_tuner   (*(volatile byte xdata *) 0xF957)
#define    I2C_reg_sample_period_on_tuner   0xF957
#define reg_sample_period_on_tuner_pos 2
#define reg_sample_period_on_tuner_len 1
#define reg_sample_period_on_tuner_lsb 0
#define xd_I2C_reg_sel_tuner    (*(volatile byte xdata *) 0xF957)
#define    I2C_reg_sel_tuner    0xF957
#define reg_sel_tuner_pos 3
#define reg_sel_tuner_len 1
#define reg_sel_tuner_lsb 0
#define xd_I2C_reg_ofdm_rst_en  (*(volatile byte xdata *) 0xF957)
#define    I2C_reg_ofdm_rst_en  0xF957
#define reg_ofdm_rst_en_pos 4
#define reg_ofdm_rst_en_len 1
#define reg_ofdm_rst_en_lsb 0
#define xd_p_mp2if_psb_overflow (*(volatile byte xdata *) 0xF980)
#define    p_mp2if_psb_overflow 0xF980
#define mp2if_psb_overflow_pos 0
#define mp2if_psb_overflow_len 1
#define mp2if_psb_overflow_lsb 0
#define xd_p_mp2if_no_modify_tei_bit    (*(volatile byte xdata *) 0xF981)
#define    p_mp2if_no_modify_tei_bit    0xF981
#define mp2if_no_modify_tei_bit_pos 0
#define mp2if_no_modify_tei_bit_len 1
#define mp2if_no_modify_tei_bit_lsb 0
#define xd_p_mp2if_keep_sf_sync_byte    (*(volatile byte xdata *) 0xF982)
#define    p_mp2if_keep_sf_sync_byte    0xF982
#define mp2if_keep_sf_sync_byte_pos 0
#define mp2if_keep_sf_sync_byte_len 1
#define mp2if_keep_sf_sync_byte_lsb 0
#define xd_p_mp2if_data_access_disable  (*(volatile byte xdata *) 0xF983)
#define    p_mp2if_data_access_disable  0xF983
#define mp2if_data_access_disable_pos 0
#define mp2if_data_access_disable_len 1
#define mp2if_data_access_disable_lsb 0
#define xd_p_mp2if_mpeg_ser_do7 (*(volatile byte xdata *) 0xF984)
#define    p_mp2if_mpeg_ser_do7 0xF984
#define mp2if_mpeg_ser_do7_pos 0
#define mp2if_mpeg_ser_do7_len 1
#define mp2if_mpeg_ser_do7_lsb 0
#define xd_p_mp2if_mpeg_ser_mode    (*(volatile byte xdata *) 0xF985)
#define    p_mp2if_mpeg_ser_mode    0xF985
#define mp2if_mpeg_ser_mode_pos 0
#define mp2if_mpeg_ser_mode_len 1
#define mp2if_mpeg_ser_mode_lsb 0
#define xd_p_mp2if_mpeg_par_mode    (*(volatile byte xdata *) 0xF986)
#define    p_mp2if_mpeg_par_mode    0xF986
#define mp2if_mpeg_par_mode_pos 0
#define mp2if_mpeg_par_mode_len 1
#define mp2if_mpeg_par_mode_lsb 0
#define xd_r_mp2if_psb_empty    (*(volatile byte xdata *) 0xF987)
#define    r_mp2if_psb_empty    0xF987
#define mp2if_psb_empty_pos 0
#define mp2if_psb_empty_len 1
#define mp2if_psb_empty_lsb 0
#define xd_r_mp2if_ts_not_188   (*(volatile byte xdata *) 0xF988)
#define    r_mp2if_ts_not_188   0xF988
#define mp2if_ts_not_188_pos 0
#define mp2if_ts_not_188_len 1
#define mp2if_ts_not_188_lsb 0
#define xd_p_mp2if_mssync_len   (*(volatile byte xdata *) 0xF989)
#define    p_mp2if_mssync_len   0xF989
#define mp2if_mssync_len_pos 0
#define mp2if_mssync_len_len 1
#define mp2if_mssync_len_lsb 0
#define xd_p_mp2if_msdo_msb (*(volatile byte xdata *) 0xF98A)
#define    p_mp2if_msdo_msb 0xF98A
#define mp2if_msdo_msb_pos 0
#define mp2if_msdo_msb_len 1
#define mp2if_msdo_msb_lsb 0
#define xd_p_mp2if_mpeg_clk_gated   (*(volatile byte xdata *) 0xF98B)
#define    p_mp2if_mpeg_clk_gated   0xF98B
#define mp2if_mpeg_clk_gated_pos 0
#define mp2if_mpeg_clk_gated_len 1
#define mp2if_mpeg_clk_gated_lsb 0
#define xd_p_mp2if_mpeg_err_pol (*(volatile byte xdata *) 0xF98C)
#define    p_mp2if_mpeg_err_pol 0xF98C
#define mp2if_mpeg_err_pol_pos 0
#define mp2if_mpeg_err_pol_len 1
#define mp2if_mpeg_err_pol_lsb 0
#define xd_p_mp2if_mpeg_sync_pol    (*(volatile byte xdata *) 0xF98D)
#define    p_mp2if_mpeg_sync_pol    0xF98D
#define mp2if_mpeg_sync_pol_pos 0
#define mp2if_mpeg_sync_pol_len 1
#define mp2if_mpeg_sync_pol_lsb 0
#define xd_p_mp2if_mpeg_vld_pol (*(volatile byte xdata *) 0xF98E)
#define    p_mp2if_mpeg_vld_pol 0xF98E
#define mp2if_mpeg_vld_pol_pos 0
#define mp2if_mpeg_vld_pol_len 1
#define mp2if_mpeg_vld_pol_lsb 0
#define xd_p_mp2if_mpeg_clk_pol (*(volatile byte xdata *) 0xF98F)
#define    p_mp2if_mpeg_clk_pol 0xF98F
#define mp2if_mpeg_clk_pol_pos 0
#define mp2if_mpeg_clk_pol_len 1
#define mp2if_mpeg_clk_pol_lsb 0
#define xd_p_reg_mpeg_full_speed    (*(volatile byte xdata *) 0xF990)
#define    p_reg_mpeg_full_speed    0xF990
#define reg_mpeg_full_speed_pos 0
#define reg_mpeg_full_speed_len 1
#define reg_mpeg_full_speed_lsb 0
#define xd_p_mp2if_pid_complement   (*(volatile byte xdata *) 0xF991)
#define    p_mp2if_pid_complement   0xF991
#define mp2if_pid_complement_pos 0
#define mp2if_pid_complement_len 1
#define mp2if_pid_complement_lsb 0
#define xd_p_mp2if_pid_rst  (*(volatile byte xdata *) 0xF992)
#define    p_mp2if_pid_rst  0xF992
#define mp2if_pid_rst_pos 0
#define mp2if_pid_rst_len 1
#define mp2if_pid_rst_lsb 0
#define xd_p_mp2if_pid_en   (*(volatile byte xdata *) 0xF993)
#define    p_mp2if_pid_en   0xF993
#define mp2if_pid_en_pos 0
#define mp2if_pid_en_len 1
#define mp2if_pid_en_lsb 0
#define xd_p_mp2if_pid_index_en (*(volatile byte xdata *) 0xF994)
#define    p_mp2if_pid_index_en 0xF994
#define mp2if_pid_index_en_pos 0
#define mp2if_pid_index_en_len 1
#define mp2if_pid_index_en_lsb 0
#define xd_p_mp2if_pid_index    (*(volatile byte xdata *) 0xF995)
#define    p_mp2if_pid_index    0xF995
#define mp2if_pid_index_pos 0
#define mp2if_pid_index_len 5
#define mp2if_pid_index_lsb 0
#define xd_p_mp2if_pid_dat_l    (*(volatile byte xdata *) 0xF996)
#define    p_mp2if_pid_dat_l    0xF996
#define mp2if_pid_dat_l_pos 0
#define mp2if_pid_dat_l_len 8
#define mp2if_pid_dat_l_lsb 0
#define xd_p_mp2if_pid_dat_h    (*(volatile byte xdata *) 0xF997)
#define    p_mp2if_pid_dat_h    0xF997
#define mp2if_pid_dat_h_pos 0
#define mp2if_pid_dat_h_len 5
#define mp2if_pid_dat_h_lsb 0
#define xd_p_reg_latch_clk  (*(volatile byte xdata *) 0xF998)
#define    p_reg_latch_clk  0xF998
#define reg_latch_clk_pos 0
#define reg_latch_clk_len 1
#define reg_latch_clk_lsb 0
#define xd_r_mp2if_sync_byte_locked (*(volatile byte xdata *) 0xF999)
#define    r_mp2if_sync_byte_locked 0xF999
#define mp2if_sync_byte_locked_pos 0
#define mp2if_sync_byte_locked_len 1
#define mp2if_sync_byte_locked_lsb 0
#define xd_p_mp2if_ignore_sync_byte (*(volatile byte xdata *) 0xF99A)
#define    p_mp2if_ignore_sync_byte 0xF99A
#define mp2if_ignore_sync_byte_pos 0
#define mp2if_ignore_sync_byte_len 1
#define mp2if_ignore_sync_byte_lsb 0
#define xd_p_reg_mp2if_clk_en   (*(volatile byte xdata *) 0xF99B)
#define    p_reg_mp2if_clk_en   0xF99B
#define reg_mp2if_clk_en_pos 0
#define reg_mp2if_clk_en_len 1
#define reg_mp2if_clk_en_lsb 0
#define xd_p_reg_mpeg_vld_tgl   (*(volatile byte xdata *) 0xF99C)
#define    p_reg_mpeg_vld_tgl   0xF99C
#define reg_mpeg_vld_tgl_pos 0
#define reg_mpeg_vld_tgl_len 1
#define reg_mpeg_vld_tgl_lsb 0
#define xd_p_reg_mp2_sw_rst (*(volatile byte xdata *) 0xF99D)
#define    p_reg_mp2_sw_rst 0xF99D
#define reg_mp2_sw_rst_pos 0
#define reg_mp2_sw_rst_len 1
#define reg_mp2_sw_rst_lsb 0
#define xd_p_mp2if_psb_en   (*(volatile byte xdata *) 0xF99E)
#define    p_mp2if_psb_en   0xF99E
#define mp2if_psb_en_pos 0
#define mp2if_psb_en_len 1
#define mp2if_psb_en_lsb 0
#define xd_r_mp2if_usb20_mode   (*(volatile byte xdata *) 0xF99F)
#define    r_mp2if_usb20_mode   0xF99F
#define mp2if_usb20_mode_pos 0
#define mp2if_usb20_mode_len 1
#define mp2if_usb20_mode_lsb 0
#define xd_r_mp2if_strap_usb20_mode (*(volatile byte xdata *) 0xF9A0)
#define    r_mp2if_strap_usb20_mode 0xF9A0
#define mp2if_strap_usb20_mode_pos 0
#define mp2if_strap_usb20_mode_len 1
#define mp2if_strap_usb20_mode_lsb 0
#define xd_r_mp2if_lost_pkt_cnt_l   (*(volatile byte xdata *) 0xF9A1)
#define    r_mp2if_lost_pkt_cnt_l   0xF9A1
#define mp2if_lost_pkt_cnt_l_pos 0
#define mp2if_lost_pkt_cnt_l_len 8
#define mp2if_lost_pkt_cnt_l_lsb 0
#define xd_r_mp2if_lost_pkt_cnt_h   (*(volatile byte xdata *) 0xF9A2)
#define    r_mp2if_lost_pkt_cnt_h   0xF9A2
#define mp2if_lost_pkt_cnt_h_pos 0
#define mp2if_lost_pkt_cnt_h_len 8
#define mp2if_lost_pkt_cnt_h_lsb 0
#define xd_p_reg_mp2if2_en  (*(volatile byte xdata *) 0xF9A3)
#define    p_reg_mp2if2_en  0xF9A3
#define reg_mp2if2_en_pos 0
#define reg_mp2if2_en_len 1
#define reg_mp2if2_en_lsb 0
#define xd_p_reg_mp2if2_sw_rst  (*(volatile byte xdata *) 0xF9A4)
#define    p_reg_mp2if2_sw_rst  0xF9A4
#define reg_mp2if2_sw_rst_pos 0
#define reg_mp2if2_sw_rst_len 1
#define reg_mp2if2_sw_rst_lsb 0
#define xd_p_reg_mp2if2_half_psb    (*(volatile byte xdata *) 0xF9A5)
#define    p_reg_mp2if2_half_psb    0xF9A5
#define reg_mp2if2_half_psb_pos 0
#define reg_mp2if2_half_psb_len 1
#define reg_mp2if2_half_psb_lsb 0
#define xd_p_reg_ts_byte_endian (*(volatile byte xdata *) 0xF9A6)
#define    p_reg_ts_byte_endian 0xF9A6
#define reg_ts_byte_endian_pos 0
#define reg_ts_byte_endian_len 1
#define reg_ts_byte_endian_lsb 0
#define xd_p_reg_mp2_dioif  (*(volatile byte xdata *) 0xF9A7)
#define    p_reg_mp2_dioif  0xF9A7
#define reg_mp2_dioif_pos 0
#define reg_mp2_dioif_len 1
#define reg_mp2_dioif_lsb 0
#define xd_p_reg_mp2_dioif_fast (*(volatile byte xdata *) 0xF9A8)
#define    p_reg_mp2_dioif_fast 0xF9A8
#define reg_mp2_dioif_fast_pos 0
#define reg_mp2_dioif_fast_len 1
#define reg_mp2_dioif_fast_lsb 0
#define xd_p_reg_tpsd_bw_mp2if  (*(volatile byte xdata *) 0xF9A9)
#define    p_reg_tpsd_bw_mp2if  0xF9A9
#define reg_tpsd_bw_mp2if_pos 0
#define reg_tpsd_bw_mp2if_len 2
#define reg_tpsd_bw_mp2if_lsb 0
#define xd_p_reg_tpsd_gi_mp2if  (*(volatile byte xdata *) 0xF9AA)
#define    p_reg_tpsd_gi_mp2if  0xF9AA
#define reg_tpsd_gi_mp2if_pos 0
#define reg_tpsd_gi_mp2if_len 2
#define reg_tpsd_gi_mp2if_lsb 0
#define xd_p_reg_tpsd_cr_mp2if  (*(volatile byte xdata *) 0xF9AB)
#define    p_reg_tpsd_cr_mp2if  0xF9AB
#define reg_tpsd_cr_mp2if_pos 0
#define reg_tpsd_cr_mp2if_len 3
#define reg_tpsd_cr_mp2if_lsb 0
#define xd_p_reg_tpsd_cons_mp2if    (*(volatile byte xdata *) 0xF9AC)
#define    p_reg_tpsd_cons_mp2if    0xF9AC
#define reg_tpsd_cons_mp2if_pos 0
#define reg_tpsd_cons_mp2if_len 2
#define reg_tpsd_cons_mp2if_lsb 0
#define xd_p_reg_fw_table_en    (*(volatile byte xdata *) 0xF9AD)
#define    p_reg_fw_table_en    0xF9AD
#define reg_fw_table_en_pos 0
#define reg_fw_table_en_len 1
#define reg_fw_table_en_lsb 0
#define xd_p_reg_p_aud_pk_gen_aud_pk_size   (*(volatile byte xdata *) 0xF9AD)
#define    p_reg_p_aud_pk_gen_aud_pk_size   0xF9AD
#define reg_p_aud_pk_gen_aud_pk_size_pos 1
#define reg_p_aud_pk_gen_aud_pk_size_len 6
#define reg_p_aud_pk_gen_aud_pk_size_lsb 0
#define xd_p_mp2if_psb_num_blk  (*(volatile byte xdata *) 0xF9AE)
#define    p_mp2if_psb_num_blk  0xF9AE
#define mp2if_psb_num_blk_pos 0
#define mp2if_psb_num_blk_len 6
#define mp2if_psb_num_blk_lsb 0
#define xd_p_reg_fec_fake   (*(volatile byte xdata *) 0xF9AF)
#define    p_reg_fec_fake   0xF9AF
#define reg_fec_fake_pos 0
#define reg_fec_fake_len 1
#define reg_fec_fake_lsb 0
#define xd_p_reg_p_ccir_atv_en  (*(volatile byte xdata *) 0xF9AF)
#define    p_reg_p_ccir_atv_en  0xF9AF
#define reg_p_ccir_atv_en_pos 1
#define reg_p_ccir_atv_en_len 1
#define reg_p_ccir_atv_en_lsb 0
#define xd_p_reg_video_stop_n   (*(volatile byte xdata *) 0xF9AF)
#define    p_reg_video_stop_n   0xF9AF
#define reg_video_stop_n_pos 2
#define reg_video_stop_n_len 1
#define reg_video_stop_n_lsb 0
#define xd_p_reg_audio_stop_n   (*(volatile byte xdata *) 0xF9AF)
#define    p_reg_audio_stop_n   0xF9AF
#define reg_audio_stop_n_pos 3
#define reg_audio_stop_n_len 1
#define reg_audio_stop_n_lsb 0
#define xd_p_mp2if_i2smode  (*(volatile byte xdata *) 0xF9AF)
#define    p_mp2if_i2smode  0xF9AF
#define mp2if_i2smode_pos 4
#define mp2if_i2smode_len 2
#define mp2if_i2smode_lsb 0
#define xd_p_mp2if_word_size    (*(volatile byte xdata *) 0xF9AF)
#define    p_mp2if_word_size    0xF9AF
#define mp2if_word_size_pos 6
#define mp2if_word_size_len 2
#define mp2if_word_size_lsb 0
#define xd_p_reg_packet_gap (*(volatile byte xdata *) 0xF9B0)
#define    p_reg_packet_gap 0xF9B0
#define reg_packet_gap_pos 0
#define reg_packet_gap_len 8
#define reg_packet_gap_lsb 0
#define xd_p_reg_ts_dat_inv (*(volatile byte xdata *) 0xF9B2)
#define    p_reg_ts_dat_inv 0xF9B2
#define reg_ts_dat_inv_pos 0
#define reg_ts_dat_inv_len 1
#define reg_ts_dat_inv_lsb 0
#define xd_p_reg_ts_lsb_1st (*(volatile byte xdata *) 0xF9B3)
#define    p_reg_ts_lsb_1st 0xF9B3
#define reg_ts_lsb_1st_pos 0
#define reg_ts_lsb_1st_len 1
#define reg_ts_lsb_1st_lsb 0
#define xd_p_reg_ts_capt_bg_sel (*(volatile byte xdata *) 0xF9B4)
#define    p_reg_ts_capt_bg_sel 0xF9B4
#define reg_ts_capt_bg_sel_pos 0
#define reg_ts_capt_bg_sel_len 1
#define reg_ts_capt_bg_sel_lsb 0
#define xd_p_reg_mp2if_stop_en  (*(volatile byte xdata *) 0xF9B5)
#define    p_reg_mp2if_stop_en  0xF9B5
#define reg_mp2if_stop_en_pos 0
#define reg_mp2if_stop_en_len 1
#define reg_mp2if_stop_en_lsb 0
#define xd_p_reg_mp2if2_pes_base    (*(volatile byte xdata *) 0xF9B6)
#define    p_reg_mp2if2_pes_base    0xF9B6
#define reg_mp2if2_pes_base_pos 0
#define reg_mp2if2_pes_base_len 1
#define reg_mp2if2_pes_base_lsb 0
#define xd_p_reg_ts_sync_inv    (*(volatile byte xdata *) 0xF9B7)
#define    p_reg_ts_sync_inv    0xF9B7
#define reg_ts_sync_inv_pos 0
#define reg_ts_sync_inv_len 1
#define reg_ts_sync_inv_lsb 0
#define xd_p_reg_ts_vld_inv (*(volatile byte xdata *) 0xF9B8)
#define    p_reg_ts_vld_inv 0xF9B8
#define reg_ts_vld_inv_pos 0
#define reg_ts_vld_inv_len 1
#define reg_ts_vld_inv_lsb 0
#define xd_p_reg_sys_buf_overflow   (*(volatile byte xdata *) 0xF9B9)
#define    p_reg_sys_buf_overflow   0xF9B9
#define reg_sys_buf_overflow_pos 0
#define reg_sys_buf_overflow_len 1
#define reg_sys_buf_overflow_lsb 0
#define xd_p_reg_top_dummy0 (*(volatile byte xdata *) 0xF9BB)
#define    p_reg_top_dummy0 0xF9BB
#define reg_top_dummy0_pos 0
#define reg_top_dummy0_len 8
#define reg_top_dummy0_lsb 0
#define xd_p_reg_top_dummy1 (*(volatile byte xdata *) 0xF9BC)
#define    p_reg_top_dummy1 0xF9BC
#define reg_top_dummy1_pos 0
#define reg_top_dummy1_len 8
#define reg_top_dummy1_lsb 0
#define xd_p_reg_top_dummy2 (*(volatile byte xdata *) 0xF9BD)
#define    p_reg_top_dummy2 0xF9BD
#define reg_top_dummy2_pos 0
#define reg_top_dummy2_len 8
#define reg_top_dummy2_lsb 0
#define xd_p_reg_top_dummy3 (*(volatile byte xdata *) 0xF9BE)
#define    p_reg_top_dummy3 0xF9BE
#define reg_top_dummy3_pos 0
#define reg_top_dummy3_len 8
#define reg_top_dummy3_lsb 0
#define xd_p_reg_top_dummy4 (*(volatile byte xdata *) 0xF9BF)
#define    p_reg_top_dummy4 0xF9BF
#define reg_top_dummy4_pos 0
#define reg_top_dummy4_len 8
#define reg_top_dummy4_lsb 0
#define xd_p_reg_top_dummy5 (*(volatile byte xdata *) 0xF9C0)
#define    p_reg_top_dummy5 0xF9C0
#define reg_top_dummy5_pos 0
#define reg_top_dummy5_len 8
#define reg_top_dummy5_lsb 0
#define xd_p_reg_top_dummy6 (*(volatile byte xdata *) 0xF9C1)
#define    p_reg_top_dummy6 0xF9C1
#define reg_top_dummy6_pos 0
#define reg_top_dummy6_len 8
#define reg_top_dummy6_lsb 0
#define xd_p_reg_top_dummy7 (*(volatile byte xdata *) 0xF9C2)
#define    p_reg_top_dummy7 0xF9C2
#define reg_top_dummy7_pos 0
#define reg_top_dummy7_len 8
#define reg_top_dummy7_lsb 0
#define xd_p_reg_top_dummy8 (*(volatile byte xdata *) 0xF9C3)
#define    p_reg_top_dummy8 0xF9C3
#define reg_top_dummy8_pos 0
#define reg_top_dummy8_len 8
#define reg_top_dummy8_lsb 0
#define xd_p_reg_top_dummy9 (*(volatile byte xdata *) 0xF9C4)
#define    p_reg_top_dummy9 0xF9C4
#define reg_top_dummy9_pos 0
#define reg_top_dummy9_len 8
#define reg_top_dummy9_lsb 0
#define xd_p_reg_top_dummyA (*(volatile byte xdata *) 0xF9C5)
#define    p_reg_top_dummyA 0xF9C5
#define reg_top_dummyA_pos 0
#define reg_top_dummyA_len 8
#define reg_top_dummyA_lsb 0
#define xd_p_reg_top_dummyB (*(volatile byte xdata *) 0xF9C6)
#define    p_reg_top_dummyB 0xF9C6
#define reg_top_dummyB_pos 0
#define reg_top_dummyB_len 8
#define reg_top_dummyB_lsb 0
#define xd_p_reg_top_dummyC (*(volatile byte xdata *) 0xF9C7)
#define    p_reg_top_dummyC 0xF9C7
#define reg_top_dummyC_pos 0
#define reg_top_dummyC_len 8
#define reg_top_dummyC_lsb 0
#define xd_p_reg_top_dummyD (*(volatile byte xdata *) 0xF9C8)
#define    p_reg_top_dummyD 0xF9C8
#define reg_top_dummyD_pos 0
#define reg_top_dummyD_len 8
#define reg_top_dummyD_lsb 0
#define xd_p_reg_top_dummyE (*(volatile byte xdata *) 0xF9C9)
#define    p_reg_top_dummyE 0xF9C9
#define reg_top_dummyE_pos 0
#define reg_top_dummyE_len 8
#define reg_top_dummyE_lsb 0
#define xd_p_reg_top_dummyF (*(volatile byte xdata *) 0xF9CA)
#define    p_reg_top_dummyF 0xF9CA
#define reg_top_dummyF_pos 0
#define reg_top_dummyF_len 8
#define reg_top_dummyF_lsb 0
#define xd_p_reg_mp2if_clk_coeff    (*(volatile byte xdata *) 0xF9CB)
#define    p_reg_mp2if_clk_coeff    0xF9CB
#define reg_mp2if_clk_coeff_pos 0
#define reg_mp2if_clk_coeff_len 7
#define reg_mp2if_clk_coeff_lsb 0
#define xd_p_reg_tsip_en    (*(volatile byte xdata *) 0xF9CC)
#define    p_reg_tsip_en    0xF9CC
#define reg_tsip_en_pos 0
#define reg_tsip_en_len 1
#define reg_tsip_en_lsb 0
#define xd_p_reg_tsis_en    (*(volatile byte xdata *) 0xF9CD)
#define    p_reg_tsis_en    0xF9CD
#define reg_tsis_en_pos 0
#define reg_tsis_en_len 1
#define reg_tsis_en_lsb 0
#define xd_p_reg_tsip_br    (*(volatile byte xdata *) 0xF9CE)
#define    p_reg_tsip_br    0xF9CE
#define reg_tsip_br_pos 0
#define reg_tsip_br_len 1
#define reg_tsip_br_lsb 0
#define xd_p_reg_tsip_frm_inv   (*(volatile byte xdata *) 0xF9D0)
#define    p_reg_tsip_frm_inv   0xF9D0
#define reg_tsip_frm_inv_pos 0
#define reg_tsip_frm_inv_len 1
#define reg_tsip_frm_inv_lsb 0
#define xd_p_reg_tsip_str_inv   (*(volatile byte xdata *) 0xF9D1)
#define    p_reg_tsip_str_inv   0xF9D1
#define reg_tsip_str_inv_pos 0
#define reg_tsip_str_inv_len 1
#define reg_tsip_str_inv_lsb 0
#define xd_p_reg_tsip_fail_inv  (*(volatile byte xdata *) 0xF9D2)
#define    p_reg_tsip_fail_inv  0xF9D2
#define reg_tsip_fail_inv_pos 0
#define reg_tsip_fail_inv_len 1
#define reg_tsip_fail_inv_lsb 0
#define xd_p_reg_tsip_frm_ignore    (*(volatile byte xdata *) 0xF9D3)
#define    p_reg_tsip_frm_ignore    0xF9D3
#define reg_tsip_frm_ignore_pos 0
#define reg_tsip_frm_ignore_len 1
#define reg_tsip_frm_ignore_lsb 0
#define xd_p_reg_tsip_str_ignore    (*(volatile byte xdata *) 0xF9D4)
#define    p_reg_tsip_str_ignore    0xF9D4
#define reg_tsip_str_ignore_pos 0
#define reg_tsip_str_ignore_len 1
#define reg_tsip_str_ignore_lsb 0
#define xd_p_reg_tsip_fail_ignore   (*(volatile byte xdata *) 0xF9D5)
#define    p_reg_tsip_fail_ignore   0xF9D5
#define reg_tsip_fail_ignore_pos 0
#define reg_tsip_fail_ignore_len 1
#define reg_tsip_fail_ignore_lsb 0
#define xd_p_reg_tsip_endian    (*(volatile byte xdata *) 0xF9D6)
#define    p_reg_tsip_endian    0xF9D6
#define reg_tsip_endian_pos 0
#define reg_tsip_endian_len 1
#define reg_tsip_endian_lsb 0
#define xd_p_reg_tsip_overflow  (*(volatile byte xdata *) 0xF9D7)
#define    p_reg_tsip_overflow  0xF9D7
#define reg_tsip_overflow_pos 0
#define reg_tsip_overflow_len 1
#define reg_tsip_overflow_lsb 0
#define xd_p_reg_ts_in_src  (*(volatile byte xdata *) 0xF9D8)
#define    p_reg_ts_in_src  0xF9D8
#define reg_ts_in_src_pos 0
#define reg_ts_in_src_len 1
#define reg_ts_in_src_lsb 0
#define xd_r_reg_clk_sel    (*(volatile byte xdata *) 0xF9D9)
#define    r_reg_clk_sel    0xF9D9
#define reg_clk_sel_pos 0
#define reg_clk_sel_len 2
#define reg_clk_sel_lsb 0
#define xd_r_reg_tog_sel    (*(volatile byte xdata *) 0xF9DA)
#define    r_reg_tog_sel    0xF9DA
#define reg_tog_sel_pos 0
#define reg_tog_sel_len 2
#define reg_tog_sel_lsb 0
#define xd_p_reg_ts_str_ignore  (*(volatile byte xdata *) 0xF9DB)
#define    p_reg_ts_str_ignore  0xF9DB
#define reg_ts_str_ignore_pos 0
#define reg_ts_str_ignore_len 1
#define reg_ts_str_ignore_lsb 0
#define xd_p_reg_ts_frm_ignore  (*(volatile byte xdata *) 0xF9DC)
#define    p_reg_ts_frm_ignore  0xF9DC
#define reg_ts_frm_ignore_pos 0
#define reg_ts_frm_ignore_len 1
#define reg_ts_frm_ignore_lsb 0
#define xd_p_reg_clk_sel_fix    (*(volatile byte xdata *) 0xF9DD)
#define    p_reg_clk_sel_fix    0xF9DD
#define reg_clk_sel_fix_pos 0
#define reg_clk_sel_fix_len 2
#define reg_clk_sel_fix_lsb 0
#define xd_p_reg_tog_sel_fix    (*(volatile byte xdata *) 0xF9DE)
#define    p_reg_tog_sel_fix    0xF9DE
#define reg_tog_sel_fix_pos 0
#define reg_tog_sel_fix_len 2
#define reg_tog_sel_fix_lsb 0
#define xd_p_reg_en_fix (*(volatile byte xdata *) 0xF9DF)
#define    p_reg_en_fix 0xF9DF
#define reg_en_fix_pos 0
#define reg_en_fix_len 1
#define reg_en_fix_lsb 0
#define xd_p_reg_check_tpsd_hier    (*(volatile byte xdata *) 0xF9E0)
#define    p_reg_check_tpsd_hier    0xF9E0
#define reg_check_tpsd_hier_pos 0
#define reg_check_tpsd_hier_len 1
#define reg_check_tpsd_hier_lsb 0
#define xd_p_reg_p_i2s_master_mode  (*(volatile byte xdata *) 0xF9E1)
#define    p_reg_p_i2s_master_mode  0xF9E1
#define reg_p_i2s_master_mode_pos 0
#define reg_p_i2s_master_mode_len 1
#define reg_p_i2s_master_mode_lsb 0
#define xd_p_reg_p_sc_lr_ratio  (*(volatile byte xdata *) 0xF9E2)
#define    p_reg_p_sc_lr_ratio  0xF9E2
#define reg_p_sc_lr_ratio_pos 0
#define reg_p_sc_lr_ratio_len 2
#define reg_p_sc_lr_ratio_lsb 0
#define xd_p_reg_p_i2s_fs_type  (*(volatile byte xdata *) 0xF9E2)
#define    p_reg_p_i2s_fs_type  0xF9E2
#define reg_p_i2s_fs_type_pos 2
#define reg_p_i2s_fs_type_len 2
#define reg_p_i2s_fs_type_lsb 0
#define xd_r_reg_r_pp_fullq (*(volatile byte xdata *) 0xF9E3)
#define    r_reg_r_pp_fullq 0xF9E3
#define reg_r_pp_fullq_pos 0
#define reg_r_pp_fullq_len 1
#define reg_r_pp_fullq_lsb 0
#define xd_p_reg_r_ccir_rst (*(volatile byte xdata *) 0xF9E3)
#define    p_reg_r_ccir_rst 0xF9E3
#define reg_r_ccir_rst_pos 1
#define reg_r_ccir_rst_len 1
#define reg_r_ccir_rst_lsb 0
#define xd_p_reg_p_full_en  (*(volatile byte xdata *) 0xF9E3)
#define    p_reg_p_full_en  0xF9E3
#define reg_p_full_en_pos 2
#define reg_p_full_en_len 1
#define reg_p_full_en_lsb 0
#define xd_p_reg_p_vbi_dis  (*(volatile byte xdata *) 0xF9E3)
#define    p_reg_p_vbi_dis  0xF9E3
#define reg_p_vbi_dis_pos 3
#define reg_p_vbi_dis_len 1
#define reg_p_vbi_dis_lsb 0
#define xd_p_reg_p_ccir_all (*(volatile byte xdata *) 0xF9E3)
#define    p_reg_p_ccir_all 0xF9E3
#define reg_p_ccir_all_pos 4
#define reg_p_ccir_all_len 1
#define reg_p_ccir_all_lsb 0
#define xd_p_reg_p_ccir_vbi_raw_en  (*(volatile byte xdata *) 0xF9E3)
#define    p_reg_p_ccir_vbi_raw_en  0xF9E3
#define reg_p_ccir_vbi_raw_en_pos 5
#define reg_p_ccir_vbi_raw_en_len 1
#define reg_p_ccir_vbi_raw_en_lsb 0
#define xd_p_reg_err_byte_en    (*(volatile byte xdata *) 0xF9E4)
#define    p_reg_err_byte_en    0xF9E4
#define reg_err_byte_en_pos 0
#define reg_err_byte_en_len 1
#define reg_err_byte_en_lsb 0
#define xd_p_reg_mp2_f_adc_7_0  (*(volatile byte xdata *) 0xF9E5)
#define    p_reg_mp2_f_adc_7_0  0xF9E5
#define reg_mp2_f_adc_7_0_pos 0
#define reg_mp2_f_adc_7_0_len 8
#define reg_mp2_f_adc_7_0_lsb 0
#define xd_p_reg_mp2_f_adc_15_8 (*(volatile byte xdata *) 0xF9E6)
#define    p_reg_mp2_f_adc_15_8 0xF9E6
#define reg_mp2_f_adc_15_8_pos 0
#define reg_mp2_f_adc_15_8_len 8
#define reg_mp2_f_adc_15_8_lsb 8
#define xd_p_reg_mp2_f_adc_23_16    (*(volatile byte xdata *) 0xF9E7)
#define    p_reg_mp2_f_adc_23_16    0xF9E7
#define reg_mp2_f_adc_23_16_pos 0
#define reg_mp2_f_adc_23_16_len 8
#define reg_mp2_f_adc_23_16_lsb 16
#define xd_p_reg_set_util   (*(volatile byte xdata *) 0xF9E8)
#define    p_reg_set_util   0xF9E8
#define reg_set_util_pos 0
#define reg_set_util_len 8
#define reg_set_util_lsb 0
#define xd_r_reg_err_byte   (*(volatile byte xdata *) 0xF9E9)
#define    r_reg_err_byte   0xF9E9
#define reg_err_byte_pos 0
#define reg_err_byte_len 8
#define reg_err_byte_lsb 0
#define xd_p_reg_p_ln_num1  (*(volatile byte xdata *) 0xF9EA)
#define    p_reg_p_ln_num1  0xF9EA
#define reg_p_ln_num1_pos 0
#define reg_p_ln_num1_len 5
#define reg_p_ln_num1_lsb 0
#define xd_p_reg_p_ln_num2_2_0  (*(volatile byte xdata *) 0xF9EA)
#define    p_reg_p_ln_num2_2_0  0xF9EA
#define reg_p_ln_num2_2_0_pos 5
#define reg_p_ln_num2_2_0_len 3
#define reg_p_ln_num2_2_0_lsb 0
#define xd_p_reg_p_ln_num2_4_3  (*(volatile byte xdata *) 0xF9EB)
#define    p_reg_p_ln_num2_4_3  0xF9EB
#define reg_p_ln_num2_4_3_pos 0
#define reg_p_ln_num2_4_3_len 2
#define reg_p_ln_num2_4_3_lsb 3
#define xd_p_reg_p_ln_num3_5_0  (*(volatile byte xdata *) 0xF9EB)
#define    p_reg_p_ln_num3_5_0  0xF9EB
#define reg_p_ln_num3_5_0_pos 2
#define reg_p_ln_num3_5_0_len 6
#define reg_p_ln_num3_5_0_lsb 0
#define xd_p_reg_p_ln_num3_8_6  (*(volatile byte xdata *) 0xF9EC)
#define    p_reg_p_ln_num3_8_6  0xF9EC
#define reg_p_ln_num3_8_6_pos 0
#define reg_p_ln_num3_8_6_len 3
#define reg_p_ln_num3_8_6_lsb 6
#define xd_p_reg_p_ln_num4_4_0  (*(volatile byte xdata *) 0xF9EC)
#define    p_reg_p_ln_num4_4_0  0xF9EC
#define reg_p_ln_num4_4_0_pos 3
#define reg_p_ln_num4_4_0_len 5
#define reg_p_ln_num4_4_0_lsb 0
#define xd_p_reg_p_ln_num4_8_5  (*(volatile byte xdata *) 0xF9ED)
#define    p_reg_p_ln_num4_8_5  0xF9ED
#define reg_p_ln_num4_8_5_pos 0
#define reg_p_ln_num4_8_5_len 4
#define reg_p_ln_num4_8_5_lsb 5
#define xd_p_reg_p_ln_num5_3_0  (*(volatile byte xdata *) 0xF9ED)
#define    p_reg_p_ln_num5_3_0  0xF9ED
#define reg_p_ln_num5_3_0_pos 4
#define reg_p_ln_num5_3_0_len 4
#define reg_p_ln_num5_3_0_lsb 0
#define xd_p_reg_p_ln_num5_8_4  (*(volatile byte xdata *) 0xF9EE)
#define    p_reg_p_ln_num5_8_4  0xF9EE
#define reg_p_ln_num5_8_4_pos 0
#define reg_p_ln_num5_8_4_len 5
#define reg_p_ln_num5_8_4_lsb 4
#define xd_p_reg_p_ln_num6_2_0  (*(volatile byte xdata *) 0xF9EE)
#define    p_reg_p_ln_num6_2_0  0xF9EE
#define reg_p_ln_num6_2_0_pos 5
#define reg_p_ln_num6_2_0_len 3
#define reg_p_ln_num6_2_0_lsb 0
#define xd_p_reg_p_ln_num6_8_3  (*(volatile byte xdata *) 0xF9EF)
#define    p_reg_p_ln_num6_8_3  0xF9EF
#define reg_p_ln_num6_8_3_pos 0
#define reg_p_ln_num6_8_3_len 6
#define reg_p_ln_num6_8_3_lsb 3
#define xd_p_reg_p_pixel_num_7_0    (*(volatile byte xdata *) 0xF9F0)
#define    p_reg_p_pixel_num_7_0    0xF9F0
#define reg_p_pixel_num_7_0_pos 0
#define reg_p_pixel_num_7_0_len 8
#define reg_p_pixel_num_7_0_lsb 0
#define xd_p_reg_p_pixel_num_10_8   (*(volatile byte xdata *) 0xF9F1)
#define    p_reg_p_pixel_num_10_8   0xF9F1
#define reg_p_pixel_num_10_8_pos 0
#define reg_p_pixel_num_10_8_len 3
#define reg_p_pixel_num_10_8_lsb 8
#define xd_p_reg_p_ccir_yuv_en  (*(volatile byte xdata *) 0xF9F1)
#define    p_reg_p_ccir_yuv_en  0xF9F1
#define reg_p_ccir_yuv_en_pos 3
#define reg_p_ccir_yuv_en_len 1
#define reg_p_ccir_yuv_en_lsb 0
#define xd_p_reg_p_ccir_size_sft    (*(volatile byte xdata *) 0xF9F1)
#define    p_reg_p_ccir_size_sft    0xF9F1
#define reg_p_ccir_size_sft_pos 4
#define reg_p_ccir_size_sft_len 2
#define reg_p_ccir_size_sft_lsb 0
#define xd_p_reg_p_psb_cnt_sft  (*(volatile byte xdata *) 0xF9F1)
#define    p_reg_p_psb_cnt_sft  0xF9F1
#define reg_p_psb_cnt_sft_pos 6
#define reg_p_psb_cnt_sft_len 2
#define reg_p_psb_cnt_sft_lsb 0
#define xd_p_reg_p_tpsd_lock_trigger    (*(volatile byte xdata *) 0xF9F2)
#define    p_reg_p_tpsd_lock_trigger    0xF9F2
#define reg_p_tpsd_lock_trigger_pos 0
#define reg_p_tpsd_lock_trigger_len 1
#define reg_p_tpsd_lock_trigger_lsb 0
#define xd_p_reg_p_ccir_clk_sel (*(volatile byte xdata *) 0xF9F3)
#define    p_reg_p_ccir_clk_sel 0xF9F3
#define reg_p_ccir_clk_sel_pos 0
#define reg_p_ccir_clk_sel_len 1
#define reg_p_ccir_clk_sel_lsb 0
#define xd_p_reg_i2c_16_8_data_sel  (*(volatile byte xdata *) 0xFB00)
#define    p_reg_i2c_16_8_data_sel  0xFB00
#define reg_i2c_16_8_data_sel_pos 0
#define reg_i2c_16_8_data_sel_len 1
#define reg_i2c_16_8_data_sel_lsb 0
#define xd_p_reg_i2c_slave_trigger_byte (*(volatile byte xdata *) 0xFB01)
#define    p_reg_i2c_slave_trigger_byte 0xFB01
#define reg_i2c_slave_trigger_byte_pos 0
#define reg_i2c_slave_trigger_byte_len 1
#define reg_i2c_slave_trigger_byte_lsb 0
#define xd_p_reg_wdti_level (*(volatile byte xdata *) 0xFB05)
#define    p_reg_wdti_level 0xFB05
#define reg_wdti_level_pos 0
#define reg_wdti_level_len 1
#define reg_wdti_level_lsb 0
#define xd_p_reg_rssi_avg_sel_lat   (*(volatile byte xdata *) 0xFB06)
#define    p_reg_rssi_avg_sel_lat   0xFB06
#define reg_rssi_avg_sel_lat_pos 0
#define reg_rssi_avg_sel_lat_len 2
#define reg_rssi_avg_sel_lat_lsb 0
#define xd_r_ofsm_rssi_avg_7_0  (*(volatile byte xdata *) 0xFB07)
#define    r_ofsm_rssi_avg_7_0  0xFB07
#define ofsm_rssi_avg_7_0_pos 0
#define ofsm_rssi_avg_7_0_len 8
#define ofsm_rssi_avg_7_0_lsb 0
#define xd_r_ofsm_rssi_avg_9_8  (*(volatile byte xdata *) 0xFB08)
#define    r_ofsm_rssi_avg_9_8  0xFB08
#define ofsm_rssi_avg_9_8_pos 0
#define ofsm_rssi_avg_9_8_len 2
#define ofsm_rssi_avg_9_8_lsb 8
#define xd_r_ofsm_mbist_fail_mon51  (*(volatile byte xdata *) 0xFB09)
#define    r_ofsm_mbist_fail_mon51  0xFB09
#define ofsm_mbist_fail_mon51_pos 0
#define ofsm_mbist_fail_mon51_len 1
#define ofsm_mbist_fail_mon51_lsb 0
#define xd_r_ofsm_mbist_fail_com    (*(volatile byte xdata *) 0xFB0A)
#define    r_ofsm_mbist_fail_com    0xFB0A
#define ofsm_mbist_fail_com_pos 0
#define ofsm_mbist_fail_com_len 1
#define ofsm_mbist_fail_com_lsb 0
#define xd_r_ofsm_mbist_fail_fft    (*(volatile byte xdata *) 0xFB0B)
#define    r_ofsm_mbist_fail_fft    0xFB0B
#define ofsm_mbist_fail_fft_pos 0
#define ofsm_mbist_fail_fft_len 1
#define ofsm_mbist_fail_fft_lsb 0
#define xd_r_ofsm_mbist_fail_fd (*(volatile byte xdata *) 0xFB0C)
#define    r_ofsm_mbist_fail_fd 0xFB0C
#define ofsm_mbist_fail_fd_pos 0
#define ofsm_mbist_fail_fd_len 1
#define ofsm_mbist_fail_fd_lsb 0
#define xd_r_ofsm_mbist_fail_link   (*(volatile byte xdata *) 0xFB0D)
#define    r_ofsm_mbist_fail_link   0xFB0D
#define ofsm_mbist_fail_link_pos 0
#define ofsm_mbist_fail_link_len 1
#define ofsm_mbist_fail_link_lsb 0
#define xd_r_ofsm_mbist_fail_mpe    (*(volatile byte xdata *) 0xFB0E)
#define    r_ofsm_mbist_fail_mpe    0xFB0E
#define ofsm_mbist_fail_mpe_pos 0
#define ofsm_mbist_fail_mpe_len 1
#define ofsm_mbist_fail_mpe_lsb 0
#define xd_r_ofsm_mbist_done_mpe    (*(volatile byte xdata *) 0xFB0F)
#define    r_ofsm_mbist_done_mpe    0xFB0F
#define ofsm_mbist_done_mpe_pos 0
#define ofsm_mbist_done_mpe_len 1
#define ofsm_mbist_done_mpe_lsb 0
#define xd_r_ofsm_mbist_mode_mpe    (*(volatile byte xdata *) 0xFB10)
#define    r_ofsm_mbist_mode_mpe    0xFB10
#define ofsm_mbist_mode_mpe_pos 0
#define ofsm_mbist_mode_mpe_len 1
#define ofsm_mbist_mode_mpe_lsb 0
#define xd_p_ofsm_cmd_reg   (*(volatile byte xdata *) 0xFB11)
#define    p_ofsm_cmd_reg   0xFB11
#define ofsm_cmd_reg_pos 0
#define ofsm_cmd_reg_len 8
#define ofsm_cmd_reg_lsb 0
#define xd_p_ofsm_addr_reg_h    (*(volatile byte xdata *) 0xFB12)
#define    p_ofsm_addr_reg_h    0xFB12
#define ofsm_addr_reg_h_pos 0
#define ofsm_addr_reg_h_len 8
#define ofsm_addr_reg_h_lsb 0
#define xd_p_ofsm_addr_reg_l    (*(volatile byte xdata *) 0xFB13)
#define    p_ofsm_addr_reg_l    0xFB13
#define ofsm_addr_reg_l_pos 0
#define ofsm_addr_reg_l_len 8
#define ofsm_addr_reg_l_lsb 0
#define xd_p_ofsm_data_reg_0    (*(volatile byte xdata *) 0xFB14)
#define    p_ofsm_data_reg_0    0xFB14
#define ofsm_data_reg_0_pos 0
#define ofsm_data_reg_0_len 8
#define ofsm_data_reg_0_lsb 0
#define xd_p_ofsm_data_reg_1    (*(volatile byte xdata *) 0xFB15)
#define    p_ofsm_data_reg_1    0xFB15
#define ofsm_data_reg_1_pos 0
#define ofsm_data_reg_1_len 8
#define ofsm_data_reg_1_lsb 0
#define xd_p_ofsm_data_reg_2    (*(volatile byte xdata *) 0xFB16)
#define    p_ofsm_data_reg_2    0xFB16
#define ofsm_data_reg_2_pos 0
#define ofsm_data_reg_2_len 8
#define ofsm_data_reg_2_lsb 0
#define xd_p_ofsm_data_reg_3    (*(volatile byte xdata *) 0xFB17)
#define    p_ofsm_data_reg_3    0xFB17
#define ofsm_data_reg_3_pos 0
#define ofsm_data_reg_3_len 8
#define ofsm_data_reg_3_lsb 0
#define xd_p_ofsm_data_reg_4    (*(volatile byte xdata *) 0xFB18)
#define    p_ofsm_data_reg_4    0xFB18
#define ofsm_data_reg_4_pos 0
#define ofsm_data_reg_4_len 8
#define ofsm_data_reg_4_lsb 0
#define xd_p_ofsm_data_reg_5    (*(volatile byte xdata *) 0xFB19)
#define    p_ofsm_data_reg_5    0xFB19
#define ofsm_data_reg_5_pos 0
#define ofsm_data_reg_5_len 8
#define ofsm_data_reg_5_lsb 0
#define xd_p_ofsm_data_reg_6    (*(volatile byte xdata *) 0xFB1A)
#define    p_ofsm_data_reg_6    0xFB1A
#define ofsm_data_reg_6_pos 0
#define ofsm_data_reg_6_len 8
#define ofsm_data_reg_6_lsb 0
#define xd_p_ofsm_data_reg_7    (*(volatile byte xdata *) 0xFB1B)
#define    p_ofsm_data_reg_7    0xFB1B
#define ofsm_data_reg_7_pos 0
#define ofsm_data_reg_7_len 8
#define ofsm_data_reg_7_lsb 0
#define xd_p_ofsm_data_reg_8    (*(volatile byte xdata *) 0xFB1C)
#define    p_ofsm_data_reg_8    0xFB1C
#define ofsm_data_reg_8_pos 0
#define ofsm_data_reg_8_len 8
#define ofsm_data_reg_8_lsb 0
#define xd_p_ofsm_data_reg_9    (*(volatile byte xdata *) 0xFB1D)
#define    p_ofsm_data_reg_9    0xFB1D
#define ofsm_data_reg_9_pos 0
#define ofsm_data_reg_9_len 8
#define ofsm_data_reg_9_lsb 0
#define xd_p_ofsm_data_reg_10   (*(volatile byte xdata *) 0xFB1E)
#define    p_ofsm_data_reg_10   0xFB1E
#define ofsm_data_reg_10_pos 0
#define ofsm_data_reg_10_len 8
#define ofsm_data_reg_10_lsb 0
#define xd_p_ofsm_data_reg_11   (*(volatile byte xdata *) 0xFB1F)
#define    p_ofsm_data_reg_11   0xFB1F
#define ofsm_data_reg_11_pos 0
#define ofsm_data_reg_11_len 8
#define ofsm_data_reg_11_lsb 0
#define xd_p_ofsm_data_reg_12   (*(volatile byte xdata *) 0xFB20)
#define    p_ofsm_data_reg_12   0xFB20
#define ofsm_data_reg_12_pos 0
#define ofsm_data_reg_12_len 8
#define ofsm_data_reg_12_lsb 0
#define xd_p_ofsm_data_reg_13   (*(volatile byte xdata *) 0xFB21)
#define    p_ofsm_data_reg_13   0xFB21
#define ofsm_data_reg_13_pos 0
#define ofsm_data_reg_13_len 8
#define ofsm_data_reg_13_lsb 0
#define xd_p_ofsm_data_reg_14   (*(volatile byte xdata *) 0xFB22)
#define    p_ofsm_data_reg_14   0xFB22
#define ofsm_data_reg_14_pos 0
#define ofsm_data_reg_14_len 8
#define ofsm_data_reg_14_lsb 0
#define xd_p_ofsm_data_reg_15   (*(volatile byte xdata *) 0xFB23)
#define    p_ofsm_data_reg_15   0xFB23
#define ofsm_data_reg_15_pos 0
#define ofsm_data_reg_15_len 8
#define ofsm_data_reg_15_lsb 0
#define xd_p_reg_afe_mem0   (*(volatile byte xdata *) 0xFB24)
#define    p_reg_afe_mem0   0xFB24
#define reg_afe_mem0_pos 0
#define reg_afe_mem0_len 8
#define reg_afe_mem0_lsb 0
#define xd_p_reg_afe_mem1   (*(volatile byte xdata *) 0xFB25)
#define    p_reg_afe_mem1   0xFB25
#define reg_afe_mem1_pos 0
#define reg_afe_mem1_len 8
#define reg_afe_mem1_lsb 0
#define xd_p_reg_afe_mem2   (*(volatile byte xdata *) 0xFB26)
#define    p_reg_afe_mem2   0xFB26
#define reg_afe_mem2_pos 0
#define reg_afe_mem2_len 8
#define reg_afe_mem2_lsb 0
#define xd_p_reg_afe_mem3   (*(volatile byte xdata *) 0xFB27)
#define    p_reg_afe_mem3   0xFB27
#define reg_afe_mem3_pos 0
#define reg_afe_mem3_len 8
#define reg_afe_mem3_lsb 0
#define xd_p_reg_afe_mem4   (*(volatile byte xdata *) 0xFB28)
#define    p_reg_afe_mem4   0xFB28
#define reg_afe_mem4_pos 0
#define reg_afe_mem4_len 8
#define reg_afe_mem4_lsb 0
#define xd_p_reg_afe_mem5   (*(volatile byte xdata *) 0xFB29)
#define    p_reg_afe_mem5   0xFB29
#define reg_afe_mem5_pos 0
#define reg_afe_mem5_len 8
#define reg_afe_mem5_lsb 0
#define xd_p_reg_afe_mem6   (*(volatile byte xdata *) 0xFB2A)
#define    p_reg_afe_mem6   0xFB2A
#define reg_afe_mem6_pos 0
#define reg_afe_mem6_len 8
#define reg_afe_mem6_lsb 0
#define xd_p_reg_afe_mem7   (*(volatile byte xdata *) 0xFB2B)
#define    p_reg_afe_mem7   0xFB2B
#define reg_afe_mem7_pos 0
#define reg_afe_mem7_len 8
#define reg_afe_mem7_lsb 0
#define xd_p_reg_i2cbootreq (*(volatile byte xdata *) 0xFB2C)
#define    p_reg_i2cbootreq 0xFB2C
#define reg_i2cbootreq_pos 0
#define reg_i2cbootreq_len 1
#define reg_i2cbootreq_lsb 0
#define xd_p_reg_rst_i2cm   (*(volatile byte xdata *) 0xFB30)
#define    p_reg_rst_i2cm   0xFB30
#define reg_rst_i2cm_pos 0
#define reg_rst_i2cm_len 1
#define reg_rst_i2cm_lsb 0
#define xd_p_reg_rst_i2cs   (*(volatile byte xdata *) 0xFB31)
#define    p_reg_rst_i2cs   0xFB31
#define reg_rst_i2cs_pos 0
#define reg_rst_i2cs_len 1
#define reg_rst_i2cs_lsb 0
#define xd_r_reg_top_gpioscli   (*(volatile byte xdata *) 0xFB32)
#define    r_reg_top_gpioscli   0xFB32
#define reg_top_gpioscli_pos 0
#define reg_top_gpioscli_len 1
#define reg_top_gpioscli_lsb 0
#define xd_p_reg_top_gpiosclo   (*(volatile byte xdata *) 0xFB33)
#define    p_reg_top_gpiosclo   0xFB33
#define reg_top_gpiosclo_pos 0
#define reg_top_gpiosclo_len 1
#define reg_top_gpiosclo_lsb 0
#define xd_p_reg_top_gpiosclen  (*(volatile byte xdata *) 0xFB34)
#define    p_reg_top_gpiosclen  0xFB34
#define reg_top_gpiosclen_pos 0
#define reg_top_gpiosclen_len 1
#define reg_top_gpiosclen_lsb 0
#define xd_p_reg_top_gpiosclon  (*(volatile byte xdata *) 0xFB35)
#define    p_reg_top_gpiosclon  0xFB35
#define reg_top_gpiosclon_pos 0
#define reg_top_gpiosclon_len 1
#define reg_top_gpiosclon_lsb 0
#define xd_r_reg_top_gpiosdai   (*(volatile byte xdata *) 0xFB36)
#define    r_reg_top_gpiosdai   0xFB36
#define reg_top_gpiosdai_pos 0
#define reg_top_gpiosdai_len 1
#define reg_top_gpiosdai_lsb 0
#define xd_p_reg_top_gpiosdao   (*(volatile byte xdata *) 0xFB37)
#define    p_reg_top_gpiosdao   0xFB37
#define reg_top_gpiosdao_pos 0
#define reg_top_gpiosdao_len 1
#define reg_top_gpiosdao_lsb 0
#define xd_p_reg_top_gpiosdaen  (*(volatile byte xdata *) 0xFB38)
#define    p_reg_top_gpiosdaen  0xFB38
#define reg_top_gpiosdaen_pos 0
#define reg_top_gpiosdaen_len 1
#define reg_top_gpiosdaen_lsb 0
#define xd_p_reg_top_gpiosdaon  (*(volatile byte xdata *) 0xFB39)
#define    p_reg_top_gpiosdaon  0xFB39
#define reg_top_gpiosdaon_pos 0
#define reg_top_gpiosdaon_len 1
#define reg_top_gpiosdaon_lsb 0
#define xd_p_reg_fix_rom_en (*(volatile byte xdata *) 0xFB3A)
#define    p_reg_fix_rom_en 0xFB3A
#define reg_fix_rom_en_pos 0
#define reg_fix_rom_en_len 1
#define reg_fix_rom_en_lsb 0
#define xd_p_reg_ofsm_bug_addh_0    (*(volatile byte xdata *) 0xFB3B)
#define    p_reg_ofsm_bug_addh_0    0xFB3B
#define reg_ofsm_bug_addh_0_pos 0
#define reg_ofsm_bug_addh_0_len 8
#define reg_ofsm_bug_addh_0_lsb 0
#define xd_p_reg_ofsm_bug_addl_0    (*(volatile byte xdata *) 0xFB3C)
#define    p_reg_ofsm_bug_addl_0    0xFB3C
#define reg_ofsm_bug_addl_0_pos 0
#define reg_ofsm_bug_addl_0_len 8
#define reg_ofsm_bug_addl_0_lsb 0
#define xd_p_reg_ofsm_bug_addh_1    (*(volatile byte xdata *) 0xFB3D)
#define    p_reg_ofsm_bug_addh_1    0xFB3D
#define reg_ofsm_bug_addh_1_pos 0
#define reg_ofsm_bug_addh_1_len 8
#define reg_ofsm_bug_addh_1_lsb 0
#define xd_p_reg_ofsm_bug_addl_1    (*(volatile byte xdata *) 0xFB3E)
#define    p_reg_ofsm_bug_addl_1    0xFB3E
#define reg_ofsm_bug_addl_1_pos 0
#define reg_ofsm_bug_addl_1_len 8
#define reg_ofsm_bug_addl_1_lsb 0
#define xd_p_reg_ofsm_bug_addh_2    (*(volatile byte xdata *) 0xFB3F)
#define    p_reg_ofsm_bug_addh_2    0xFB3F
#define reg_ofsm_bug_addh_2_pos 0
#define reg_ofsm_bug_addh_2_len 8
#define reg_ofsm_bug_addh_2_lsb 0
#define xd_p_reg_ofsm_bug_addl_2    (*(volatile byte xdata *) 0xFB40)
#define    p_reg_ofsm_bug_addl_2    0xFB40
#define reg_ofsm_bug_addl_2_pos 0
#define reg_ofsm_bug_addl_2_len 8
#define reg_ofsm_bug_addl_2_lsb 0
#define xd_p_reg_ofsm_bug_addh_3    (*(volatile byte xdata *) 0xFB41)
#define    p_reg_ofsm_bug_addh_3    0xFB41
#define reg_ofsm_bug_addh_3_pos 0
#define reg_ofsm_bug_addh_3_len 8
#define reg_ofsm_bug_addh_3_lsb 0
#define xd_p_reg_ofsm_bug_addl_3    (*(volatile byte xdata *) 0xFB42)
#define    p_reg_ofsm_bug_addl_3    0xFB42
#define reg_ofsm_bug_addl_3_pos 0
#define reg_ofsm_bug_addl_3_len 8
#define reg_ofsm_bug_addl_3_lsb 0
#define xd_p_reg_ofsm_bug_addh_4    (*(volatile byte xdata *) 0xFB43)
#define    p_reg_ofsm_bug_addh_4    0xFB43
#define reg_ofsm_bug_addh_4_pos 0
#define reg_ofsm_bug_addh_4_len 8
#define reg_ofsm_bug_addh_4_lsb 0
#define xd_p_reg_ofsm_bug_addl_4    (*(volatile byte xdata *) 0xFB44)
#define    p_reg_ofsm_bug_addl_4    0xFB44
#define reg_ofsm_bug_addl_4_pos 0
#define reg_ofsm_bug_addl_4_len 8
#define reg_ofsm_bug_addl_4_lsb 0
#define xd_p_reg_ofsm_bug_addh_5    (*(volatile byte xdata *) 0xFB45)
#define    p_reg_ofsm_bug_addh_5    0xFB45
#define reg_ofsm_bug_addh_5_pos 0
#define reg_ofsm_bug_addh_5_len 8
#define reg_ofsm_bug_addh_5_lsb 0
#define xd_p_reg_ofsm_bug_addl_5    (*(volatile byte xdata *) 0xFB46)
#define    p_reg_ofsm_bug_addl_5    0xFB46
#define reg_ofsm_bug_addl_5_pos 0
#define reg_ofsm_bug_addl_5_len 8
#define reg_ofsm_bug_addl_5_lsb 0
#define xd_p_reg_ofsm_bug_addh_6    (*(volatile byte xdata *) 0xFB47)
#define    p_reg_ofsm_bug_addh_6    0xFB47
#define reg_ofsm_bug_addh_6_pos 0
#define reg_ofsm_bug_addh_6_len 8
#define reg_ofsm_bug_addh_6_lsb 0
#define xd_p_reg_ofsm_bug_addl_6    (*(volatile byte xdata *) 0xFB48)
#define    p_reg_ofsm_bug_addl_6    0xFB48
#define reg_ofsm_bug_addl_6_pos 0
#define reg_ofsm_bug_addl_6_len 8
#define reg_ofsm_bug_addl_6_lsb 0
#define xd_p_reg_ofsm_bug_addh_7    (*(volatile byte xdata *) 0xFB49)
#define    p_reg_ofsm_bug_addh_7    0xFB49
#define reg_ofsm_bug_addh_7_pos 0
#define reg_ofsm_bug_addh_7_len 8
#define reg_ofsm_bug_addh_7_lsb 0
#define xd_p_reg_ofsm_bug_addl_7    (*(volatile byte xdata *) 0xFB4A)
#define    p_reg_ofsm_bug_addl_7    0xFB4A
#define reg_ofsm_bug_addl_7_pos 0
#define reg_ofsm_bug_addl_7_len 8
#define reg_ofsm_bug_addl_7_lsb 0
#define xd_p_reg_ofsm_bug_addh_8    (*(volatile byte xdata *) 0xFB4B)
#define    p_reg_ofsm_bug_addh_8    0xFB4B
#define reg_ofsm_bug_addh_8_pos 0
#define reg_ofsm_bug_addh_8_len 8
#define reg_ofsm_bug_addh_8_lsb 0
#define xd_p_reg_ofsm_bug_addl_8    (*(volatile byte xdata *) 0xFB4C)
#define    p_reg_ofsm_bug_addl_8    0xFB4C
#define reg_ofsm_bug_addl_8_pos 0
#define reg_ofsm_bug_addl_8_len 8
#define reg_ofsm_bug_addl_8_lsb 0
#define xd_p_reg_ofsm_bug_addh_9    (*(volatile byte xdata *) 0xFB4D)
#define    p_reg_ofsm_bug_addh_9    0xFB4D
#define reg_ofsm_bug_addh_9_pos 0
#define reg_ofsm_bug_addh_9_len 8
#define reg_ofsm_bug_addh_9_lsb 0
#define xd_p_reg_ofsm_bug_addl_9    (*(volatile byte xdata *) 0xFB4E)
#define    p_reg_ofsm_bug_addl_9    0xFB4E
#define reg_ofsm_bug_addl_9_pos 0
#define reg_ofsm_bug_addl_9_len 8
#define reg_ofsm_bug_addl_9_lsb 0
#define xd_p_reg_ofsm_bug_addh_10   (*(volatile byte xdata *) 0xFB4F)
#define    p_reg_ofsm_bug_addh_10   0xFB4F
#define reg_ofsm_bug_addh_10_pos 0
#define reg_ofsm_bug_addh_10_len 8
#define reg_ofsm_bug_addh_10_lsb 0
#define xd_p_reg_ofsm_bug_addl_10   (*(volatile byte xdata *) 0xFB50)
#define    p_reg_ofsm_bug_addl_10   0xFB50
#define reg_ofsm_bug_addl_10_pos 0
#define reg_ofsm_bug_addl_10_len 8
#define reg_ofsm_bug_addl_10_lsb 0
#define xd_p_reg_ofsm_bug_addh_11   (*(volatile byte xdata *) 0xFB51)
#define    p_reg_ofsm_bug_addh_11   0xFB51
#define reg_ofsm_bug_addh_11_pos 0
#define reg_ofsm_bug_addh_11_len 8
#define reg_ofsm_bug_addh_11_lsb 0
#define xd_p_reg_ofsm_bug_addl_11   (*(volatile byte xdata *) 0xFB52)
#define    p_reg_ofsm_bug_addl_11   0xFB52
#define reg_ofsm_bug_addl_11_pos 0
#define reg_ofsm_bug_addl_11_len 8
#define reg_ofsm_bug_addl_11_lsb 0
#define xd_p_reg_ofsm_bug_addh_12   (*(volatile byte xdata *) 0xFB53)
#define    p_reg_ofsm_bug_addh_12   0xFB53
#define reg_ofsm_bug_addh_12_pos 0
#define reg_ofsm_bug_addh_12_len 8
#define reg_ofsm_bug_addh_12_lsb 0
#define xd_p_reg_ofsm_bug_addl_12   (*(volatile byte xdata *) 0xFB54)
#define    p_reg_ofsm_bug_addl_12   0xFB54
#define reg_ofsm_bug_addl_12_pos 0
#define reg_ofsm_bug_addl_12_len 8
#define reg_ofsm_bug_addl_12_lsb 0
#define xd_p_reg_ofsm_bug_addh_13   (*(volatile byte xdata *) 0xFB55)
#define    p_reg_ofsm_bug_addh_13   0xFB55
#define reg_ofsm_bug_addh_13_pos 0
#define reg_ofsm_bug_addh_13_len 8
#define reg_ofsm_bug_addh_13_lsb 0
#define xd_p_reg_ofsm_bug_addl_13   (*(volatile byte xdata *) 0xFB56)
#define    p_reg_ofsm_bug_addl_13   0xFB56
#define reg_ofsm_bug_addl_13_pos 0
#define reg_ofsm_bug_addl_13_len 8
#define reg_ofsm_bug_addl_13_lsb 0
#define xd_p_reg_ofsm_bug_addh_14   (*(volatile byte xdata *) 0xFB57)
#define    p_reg_ofsm_bug_addh_14   0xFB57
#define reg_ofsm_bug_addh_14_pos 0
#define reg_ofsm_bug_addh_14_len 8
#define reg_ofsm_bug_addh_14_lsb 0
#define xd_p_reg_ofsm_bug_addl_14   (*(volatile byte xdata *) 0xFB58)
#define    p_reg_ofsm_bug_addl_14   0xFB58
#define reg_ofsm_bug_addl_14_pos 0
#define reg_ofsm_bug_addl_14_len 8
#define reg_ofsm_bug_addl_14_lsb 0
#define xd_p_reg_ofsm_bug_addh_15   (*(volatile byte xdata *) 0xFB59)
#define    p_reg_ofsm_bug_addh_15   0xFB59
#define reg_ofsm_bug_addh_15_pos 0
#define reg_ofsm_bug_addh_15_len 8
#define reg_ofsm_bug_addh_15_lsb 0
#define xd_p_reg_ofsm_bug_addl_15   (*(volatile byte xdata *) 0xFB5A)
#define    p_reg_ofsm_bug_addl_15   0xFB5A
#define reg_ofsm_bug_addl_15_pos 0
#define reg_ofsm_bug_addl_15_len 8
#define reg_ofsm_bug_addl_15_lsb 0
#define xd_p_reg_ofsm_jmp_addh_0    (*(volatile byte xdata *) 0xFB5B)
#define    p_reg_ofsm_jmp_addh_0    0xFB5B
#define reg_ofsm_jmp_addh_0_pos 0
#define reg_ofsm_jmp_addh_0_len 8
#define reg_ofsm_jmp_addh_0_lsb 0
#define xd_p_reg_ofsm_jmp_addl_0    (*(volatile byte xdata *) 0xFB5C)
#define    p_reg_ofsm_jmp_addl_0    0xFB5C
#define reg_ofsm_jmp_addl_0_pos 0
#define reg_ofsm_jmp_addl_0_len 8
#define reg_ofsm_jmp_addl_0_lsb 0
#define xd_p_reg_ofsm_jmp_addh_1    (*(volatile byte xdata *) 0xFB5D)
#define    p_reg_ofsm_jmp_addh_1    0xFB5D
#define reg_ofsm_jmp_addh_1_pos 0
#define reg_ofsm_jmp_addh_1_len 8
#define reg_ofsm_jmp_addh_1_lsb 0
#define xd_p_reg_ofsm_jmp_addl_1    (*(volatile byte xdata *) 0xFB5E)
#define    p_reg_ofsm_jmp_addl_1    0xFB5E
#define reg_ofsm_jmp_addl_1_pos 0
#define reg_ofsm_jmp_addl_1_len 8
#define reg_ofsm_jmp_addl_1_lsb 0
#define xd_p_reg_ofsm_jmp_addh_2    (*(volatile byte xdata *) 0xFB5F)
#define    p_reg_ofsm_jmp_addh_2    0xFB5F
#define reg_ofsm_jmp_addh_2_pos 0
#define reg_ofsm_jmp_addh_2_len 8
#define reg_ofsm_jmp_addh_2_lsb 0
#define xd_p_reg_ofsm_jmp_addl_2    (*(volatile byte xdata *) 0xFB60)
#define    p_reg_ofsm_jmp_addl_2    0xFB60
#define reg_ofsm_jmp_addl_2_pos 0
#define reg_ofsm_jmp_addl_2_len 8
#define reg_ofsm_jmp_addl_2_lsb 0
#define xd_p_reg_ofsm_jmp_addh_3    (*(volatile byte xdata *) 0xFB61)
#define    p_reg_ofsm_jmp_addh_3    0xFB61
#define reg_ofsm_jmp_addh_3_pos 0
#define reg_ofsm_jmp_addh_3_len 8
#define reg_ofsm_jmp_addh_3_lsb 0
#define xd_p_reg_ofsm_jmp_addl_3    (*(volatile byte xdata *) 0xFB62)
#define    p_reg_ofsm_jmp_addl_3    0xFB62
#define reg_ofsm_jmp_addl_3_pos 0
#define reg_ofsm_jmp_addl_3_len 8
#define reg_ofsm_jmp_addl_3_lsb 0
#define xd_p_reg_ofsm_jmp_addh_4    (*(volatile byte xdata *) 0xFB63)
#define    p_reg_ofsm_jmp_addh_4    0xFB63
#define reg_ofsm_jmp_addh_4_pos 0
#define reg_ofsm_jmp_addh_4_len 8
#define reg_ofsm_jmp_addh_4_lsb 0
#define xd_p_reg_ofsm_jmp_addl_4    (*(volatile byte xdata *) 0xFB64)
#define    p_reg_ofsm_jmp_addl_4    0xFB64
#define reg_ofsm_jmp_addl_4_pos 0
#define reg_ofsm_jmp_addl_4_len 8
#define reg_ofsm_jmp_addl_4_lsb 0
#define xd_p_reg_ofsm_jmp_addh_5    (*(volatile byte xdata *) 0xFB65)
#define    p_reg_ofsm_jmp_addh_5    0xFB65
#define reg_ofsm_jmp_addh_5_pos 0
#define reg_ofsm_jmp_addh_5_len 8
#define reg_ofsm_jmp_addh_5_lsb 0
#define xd_p_reg_ofsm_jmp_addl_5    (*(volatile byte xdata *) 0xFB66)
#define    p_reg_ofsm_jmp_addl_5    0xFB66
#define reg_ofsm_jmp_addl_5_pos 0
#define reg_ofsm_jmp_addl_5_len 8
#define reg_ofsm_jmp_addl_5_lsb 0
#define xd_p_reg_ofsm_jmp_addh_6    (*(volatile byte xdata *) 0xFB67)
#define    p_reg_ofsm_jmp_addh_6    0xFB67
#define reg_ofsm_jmp_addh_6_pos 0
#define reg_ofsm_jmp_addh_6_len 8
#define reg_ofsm_jmp_addh_6_lsb 0
#define xd_p_reg_ofsm_jmp_addl_6    (*(volatile byte xdata *) 0xFB68)
#define    p_reg_ofsm_jmp_addl_6    0xFB68
#define reg_ofsm_jmp_addl_6_pos 0
#define reg_ofsm_jmp_addl_6_len 8
#define reg_ofsm_jmp_addl_6_lsb 0
#define xd_p_reg_ofsm_jmp_addh_7    (*(volatile byte xdata *) 0xFB69)
#define    p_reg_ofsm_jmp_addh_7    0xFB69
#define reg_ofsm_jmp_addh_7_pos 0
#define reg_ofsm_jmp_addh_7_len 8
#define reg_ofsm_jmp_addh_7_lsb 0
#define xd_p_reg_ofsm_jmp_addl_7    (*(volatile byte xdata *) 0xFB6A)
#define    p_reg_ofsm_jmp_addl_7    0xFB6A
#define reg_ofsm_jmp_addl_7_pos 0
#define reg_ofsm_jmp_addl_7_len 8
#define reg_ofsm_jmp_addl_7_lsb 0
#define xd_p_reg_ofsm_jmp_addh_8    (*(volatile byte xdata *) 0xFB6B)
#define    p_reg_ofsm_jmp_addh_8    0xFB6B
#define reg_ofsm_jmp_addh_8_pos 0
#define reg_ofsm_jmp_addh_8_len 8
#define reg_ofsm_jmp_addh_8_lsb 0
#define xd_p_reg_ofsm_jmp_addl_8    (*(volatile byte xdata *) 0xFB6C)
#define    p_reg_ofsm_jmp_addl_8    0xFB6C
#define reg_ofsm_jmp_addl_8_pos 0
#define reg_ofsm_jmp_addl_8_len 8
#define reg_ofsm_jmp_addl_8_lsb 0
#define xd_p_reg_ofsm_jmp_addh_9    (*(volatile byte xdata *) 0xFB6D)
#define    p_reg_ofsm_jmp_addh_9    0xFB6D
#define reg_ofsm_jmp_addh_9_pos 0
#define reg_ofsm_jmp_addh_9_len 8
#define reg_ofsm_jmp_addh_9_lsb 0
#define xd_p_reg_ofsm_jmp_addl_9    (*(volatile byte xdata *) 0xFB6E)
#define    p_reg_ofsm_jmp_addl_9    0xFB6E
#define reg_ofsm_jmp_addl_9_pos 0
#define reg_ofsm_jmp_addl_9_len 8
#define reg_ofsm_jmp_addl_9_lsb 0
#define xd_p_reg_ofsm_jmp_addh_10   (*(volatile byte xdata *) 0xFB6F)
#define    p_reg_ofsm_jmp_addh_10   0xFB6F
#define reg_ofsm_jmp_addh_10_pos 0
#define reg_ofsm_jmp_addh_10_len 8
#define reg_ofsm_jmp_addh_10_lsb 0
#define xd_p_reg_ofsm_jmp_addl_10   (*(volatile byte xdata *) 0xFB70)
#define    p_reg_ofsm_jmp_addl_10   0xFB70
#define reg_ofsm_jmp_addl_10_pos 0
#define reg_ofsm_jmp_addl_10_len 8
#define reg_ofsm_jmp_addl_10_lsb 0
#define xd_p_reg_ofsm_jmp_addh_11   (*(volatile byte xdata *) 0xFB71)
#define    p_reg_ofsm_jmp_addh_11   0xFB71
#define reg_ofsm_jmp_addh_11_pos 0
#define reg_ofsm_jmp_addh_11_len 8
#define reg_ofsm_jmp_addh_11_lsb 0
#define xd_p_reg_ofsm_jmp_addl_11   (*(volatile byte xdata *) 0xFB72)
#define    p_reg_ofsm_jmp_addl_11   0xFB72
#define reg_ofsm_jmp_addl_11_pos 0
#define reg_ofsm_jmp_addl_11_len 8
#define reg_ofsm_jmp_addl_11_lsb 0
#define xd_p_reg_ofsm_jmp_addh_12   (*(volatile byte xdata *) 0xFB73)
#define    p_reg_ofsm_jmp_addh_12   0xFB73
#define reg_ofsm_jmp_addh_12_pos 0
#define reg_ofsm_jmp_addh_12_len 8
#define reg_ofsm_jmp_addh_12_lsb 0
#define xd_p_reg_ofsm_jmp_addl_12   (*(volatile byte xdata *) 0xFB74)
#define    p_reg_ofsm_jmp_addl_12   0xFB74
#define reg_ofsm_jmp_addl_12_pos 0
#define reg_ofsm_jmp_addl_12_len 8
#define reg_ofsm_jmp_addl_12_lsb 0
#define xd_p_reg_ofsm_jmp_addh_13   (*(volatile byte xdata *) 0xFB75)
#define    p_reg_ofsm_jmp_addh_13   0xFB75
#define reg_ofsm_jmp_addh_13_pos 0
#define reg_ofsm_jmp_addh_13_len 8
#define reg_ofsm_jmp_addh_13_lsb 0
#define xd_p_reg_ofsm_jmp_addl_13   (*(volatile byte xdata *) 0xFB76)
#define    p_reg_ofsm_jmp_addl_13   0xFB76
#define reg_ofsm_jmp_addl_13_pos 0
#define reg_ofsm_jmp_addl_13_len 8
#define reg_ofsm_jmp_addl_13_lsb 0
#define xd_p_reg_ofsm_jmp_addh_14   (*(volatile byte xdata *) 0xFB77)
#define    p_reg_ofsm_jmp_addh_14   0xFB77
#define reg_ofsm_jmp_addh_14_pos 0
#define reg_ofsm_jmp_addh_14_len 8
#define reg_ofsm_jmp_addh_14_lsb 0
#define xd_p_reg_ofsm_jmp_addl_14   (*(volatile byte xdata *) 0xFB78)
#define    p_reg_ofsm_jmp_addl_14   0xFB78
#define reg_ofsm_jmp_addl_14_pos 0
#define reg_ofsm_jmp_addl_14_len 8
#define reg_ofsm_jmp_addl_14_lsb 0
#define xd_p_reg_ofsm_jmp_addh_15   (*(volatile byte xdata *) 0xFB79)
#define    p_reg_ofsm_jmp_addh_15   0xFB79
#define reg_ofsm_jmp_addh_15_pos 0
#define reg_ofsm_jmp_addh_15_len 8
#define reg_ofsm_jmp_addh_15_lsb 0
#define xd_p_reg_ofsm_jmp_addl_15   (*(volatile byte xdata *) 0xFB7A)
#define    p_reg_ofsm_jmp_addl_15   0xFB7A
#define reg_ofsm_jmp_addl_15_pos 0
#define reg_ofsm_jmp_addl_15_len 8
#define reg_ofsm_jmp_addl_15_lsb 0
#define xd_p_reg_sw_mon51   (*(volatile byte xdata *) 0xFB7B)
#define    p_reg_sw_mon51   0xFB7B
#define reg_sw_mon51_pos 0
#define reg_sw_mon51_len 7
#define reg_sw_mon51_lsb 0
#define xd_p_reg_ofdm_mon51_flag    (*(volatile byte xdata *) 0xFB7C)
#define    p_reg_ofdm_mon51_flag    0xFB7C
#define reg_ofdm_mon51_flag_pos 0
#define reg_ofdm_mon51_flag_len 1
#define reg_ofdm_mon51_flag_lsb 0
#define xd_p_reg_ofdm_force_mon51   (*(volatile byte xdata *) 0xFB7D)
#define    p_reg_ofdm_force_mon51   0xFB7D
#define reg_ofdm_force_mon51_pos 0
#define reg_ofdm_force_mon51_len 1
#define reg_ofdm_force_mon51_lsb 0
#define xd_p_reg_ofdm_which_cpu (*(volatile byte xdata *) 0xFB7E)
#define    p_reg_ofdm_which_cpu 0xFB7E
#define reg_ofdm_which_cpu_pos 0
#define reg_ofdm_which_cpu_len 1
#define reg_ofdm_which_cpu_lsb 0
#define xd_p_reg_ofdm_code_ready    (*(volatile byte xdata *) 0xFB7F)
#define    p_reg_ofdm_code_ready    0xFB7F
#define reg_ofdm_code_ready_pos 0
#define reg_ofdm_code_ready_len 1
#define reg_ofdm_code_ready_lsb 0
#define xd_p_reg_ofdm_mailbox_wend  (*(volatile byte xdata *) 0xFB80)
#define    p_reg_ofdm_mailbox_wend  0xFB80
#define reg_ofdm_mailbox_wend_pos 0
#define reg_ofdm_mailbox_wend_len 1
#define reg_ofdm_mailbox_wend_lsb 0
#define xd_r_reg_fast_slow_train    (*(volatile byte xdata *) 0xFB81)
#define    r_reg_fast_slow_train    0xFB81
#define reg_fast_slow_train_pos 0
#define reg_fast_slow_train_len 1
#define reg_fast_slow_train_lsb 0
#define xd_p_reg_ofdm_mailbox_wptr  (*(volatile byte xdata *) 0xFB82)
#define    p_reg_ofdm_mailbox_wptr  0xFB82
#define reg_ofdm_mailbox_wptr_pos 0
#define reg_ofdm_mailbox_wptr_len 8
#define reg_ofdm_mailbox_wptr_lsb 0
#define xd_p_reg_ofdm_mailbox_int   (*(volatile byte xdata *) 0xFB86)
#define    p_reg_ofdm_mailbox_int   0xFB86
#define reg_ofdm_mailbox_int_pos 0
#define reg_ofdm_mailbox_int_len 1
#define reg_ofdm_mailbox_int_lsb 0
#define xd_p_reg_ofdm_lnk2ofdm_int  (*(volatile byte xdata *) 0xFB87)
#define    p_reg_ofdm_lnk2ofdm_int  0xFB87
#define reg_ofdm_lnk2ofdm_int_pos 0
#define reg_ofdm_lnk2ofdm_int_len 1
#define reg_ofdm_lnk2ofdm_int_lsb 0
#define xd_p_reg_ofdm_ofdm2lnk_int  (*(volatile byte xdata *) 0xFB88)
#define    p_reg_ofdm_ofdm2lnk_int  0xFB88
#define reg_ofdm_ofdm2lnk_int_pos 0
#define reg_ofdm_ofdm2lnk_int_len 1
#define reg_ofdm_ofdm2lnk_int_lsb 0
#define xd_r_reg_load_ofdm_reg  (*(volatile byte xdata *) 0xFB8F)
#define    r_reg_load_ofdm_reg  0xFB8F
#define reg_load_ofdm_reg_pos 0
#define reg_load_ofdm_reg_len 1
#define reg_load_ofdm_reg_lsb 0
#define xd_p_reg_lnk_mbx_rd_length_7_0  (*(volatile byte xdata *) 0xFB90)
#define    p_reg_lnk_mbx_rd_length_7_0  0xFB90
#define reg_lnk_mbx_rd_length_7_0_pos 0
#define reg_lnk_mbx_rd_length_7_0_len 8
#define reg_lnk_mbx_rd_length_7_0_lsb 0
#define xd_p_reg_lnk_mbx_rd_length_15_8 (*(volatile byte xdata *) 0xFB91)
#define    p_reg_lnk_mbx_rd_length_15_8 0xFB91
#define reg_lnk_mbx_rd_length_15_8_pos 0
#define reg_lnk_mbx_rd_length_15_8_len 8
#define reg_lnk_mbx_rd_length_15_8_lsb 8
#define xd_p_reg_lnk_mbx_rd_length_17_16    (*(volatile byte xdata *) 0xFB92)
#define    p_reg_lnk_mbx_rd_length_17_16    0xFB92
#define reg_lnk_mbx_rd_length_17_16_pos 0
#define reg_lnk_mbx_rd_length_17_16_len 2
#define reg_lnk_mbx_rd_length_17_16_lsb 16
#define xd_p_reg_lnk_rd_data_sel    (*(volatile byte xdata *) 0xFB93)
#define    p_reg_lnk_rd_data_sel    0xFB93
#define reg_lnk_rd_data_sel_pos 0
#define reg_lnk_rd_data_sel_len 2
#define reg_lnk_rd_data_sel_lsb 0
#define xd_p_reg_ofdm2lnk_data_7_0  (*(volatile byte xdata *) 0xFB96)
#define    p_reg_ofdm2lnk_data_7_0  0xFB96
#define reg_ofdm2lnk_data_7_0_pos 0
#define reg_ofdm2lnk_data_7_0_len 8
#define reg_ofdm2lnk_data_7_0_lsb 0
#define xd_p_reg_ofdm2lnk_data_15_8 (*(volatile byte xdata *) 0xFB97)
#define    p_reg_ofdm2lnk_data_15_8 0xFB97
#define reg_ofdm2lnk_data_15_8_pos 0
#define reg_ofdm2lnk_data_15_8_len 8
#define reg_ofdm2lnk_data_15_8_lsb 8
#define xd_p_reg_ofdm2lnk_data_23_16    (*(volatile byte xdata *) 0xFB98)
#define    p_reg_ofdm2lnk_data_23_16    0xFB98
#define reg_ofdm2lnk_data_23_16_pos 0
#define reg_ofdm2lnk_data_23_16_len 8
#define reg_ofdm2lnk_data_23_16_lsb 16
#define xd_p_reg_ofdm2lnk_data_31_24    (*(volatile byte xdata *) 0xFB99)
#define    p_reg_ofdm2lnk_data_31_24    0xFB99
#define reg_ofdm2lnk_data_31_24_pos 0
#define reg_ofdm2lnk_data_31_24_len 8
#define reg_ofdm2lnk_data_31_24_lsb 24
#define xd_p_reg_ofdm2lnk_data_39_32    (*(volatile byte xdata *) 0xFB9A)
#define    p_reg_ofdm2lnk_data_39_32    0xFB9A
#define reg_ofdm2lnk_data_39_32_pos 0
#define reg_ofdm2lnk_data_39_32_len 8
#define reg_ofdm2lnk_data_39_32_lsb 32
#define xd_p_reg_ofdm2lnk_data_47_40    (*(volatile byte xdata *) 0xFB9B)
#define    p_reg_ofdm2lnk_data_47_40    0xFB9B
#define reg_ofdm2lnk_data_47_40_pos 0
#define reg_ofdm2lnk_data_47_40_len 8
#define reg_ofdm2lnk_data_47_40_lsb 40
#define xd_p_reg_ofdm2lnk_data_55_48    (*(volatile byte xdata *) 0xFB9C)
#define    p_reg_ofdm2lnk_data_55_48    0xFB9C
#define reg_ofdm2lnk_data_55_48_pos 0
#define reg_ofdm2lnk_data_55_48_len 8
#define reg_ofdm2lnk_data_55_48_lsb 48
#define xd_p_reg_ofdm2lnk_data_63_56    (*(volatile byte xdata *) 0xFB9D)
#define    p_reg_ofdm2lnk_data_63_56    0xFB9D
#define reg_ofdm2lnk_data_63_56_pos 0
#define reg_ofdm2lnk_data_63_56_len 8
#define reg_ofdm2lnk_data_63_56_lsb 56
#define xd_p_reg_lnktoofdm_data_7_0 (*(volatile byte xdata *) 0xFB9E)
#define    p_reg_lnktoofdm_data_7_0 0xFB9E
#define reg_lnktoofdm_data_7_0_pos 0
#define reg_lnktoofdm_data_7_0_len 8
#define reg_lnktoofdm_data_7_0_lsb 0
#define xd_p_reg_lnktoofdm_data_15_8    (*(volatile byte xdata *) 0xFB9F)
#define    p_reg_lnktoofdm_data_15_8    0xFB9F
#define reg_lnktoofdm_data_15_8_pos 0
#define reg_lnktoofdm_data_15_8_len 8
#define reg_lnktoofdm_data_15_8_lsb 8
#define xd_p_reg_lnktoofdm_data_23_16   (*(volatile byte xdata *) 0xFBA0)
#define    p_reg_lnktoofdm_data_23_16   0xFBA0
#define reg_lnktoofdm_data_23_16_pos 0
#define reg_lnktoofdm_data_23_16_len 8
#define reg_lnktoofdm_data_23_16_lsb 16
#define xd_p_reg_lnktoofdm_data_31_24   (*(volatile byte xdata *) 0xFBA1)
#define    p_reg_lnktoofdm_data_31_24   0xFBA1
#define reg_lnktoofdm_data_31_24_pos 0
#define reg_lnktoofdm_data_31_24_len 8
#define reg_lnktoofdm_data_31_24_lsb 24
#define xd_p_reg_lnktoofdm_data_39_32   (*(volatile byte xdata *) 0xFBA2)
#define    p_reg_lnktoofdm_data_39_32   0xFBA2
#define reg_lnktoofdm_data_39_32_pos 0
#define reg_lnktoofdm_data_39_32_len 8
#define reg_lnktoofdm_data_39_32_lsb 32
#define xd_p_reg_lnktoofdm_data_47_40   (*(volatile byte xdata *) 0xFBA3)
#define    p_reg_lnktoofdm_data_47_40   0xFBA3
#define reg_lnktoofdm_data_47_40_pos 0
#define reg_lnktoofdm_data_47_40_len 8
#define reg_lnktoofdm_data_47_40_lsb 40
#define xd_p_reg_lnktoofdm_data_55_48   (*(volatile byte xdata *) 0xFBA4)
#define    p_reg_lnktoofdm_data_55_48   0xFBA4
#define reg_lnktoofdm_data_55_48_pos 0
#define reg_lnktoofdm_data_55_48_len 8
#define reg_lnktoofdm_data_55_48_lsb 48
#define xd_p_reg_lnktoofdm_data_63_56   (*(volatile byte xdata *) 0xFBA5)
#define    p_reg_lnktoofdm_data_63_56   0xFBA5
#define reg_lnktoofdm_data_63_56_pos 0
#define reg_lnktoofdm_data_63_56_len 8
#define reg_lnktoofdm_data_63_56_lsb 56
#define xd_p_reg_dbgif32_sel    (*(volatile byte xdata *) 0xFBA6)
#define    p_reg_dbgif32_sel    0xFBA6
#define reg_dbgif32_sel_pos 0
#define reg_dbgif32_sel_len 2
#define reg_dbgif32_sel_lsb 0
#define xd_p_reg_dyn1_clk   (*(volatile byte xdata *) 0xFBA7)
#define    p_reg_dyn1_clk   0xFBA7
#define reg_dyn1_clk_pos 0
#define reg_dyn1_clk_len 1
#define reg_dyn1_clk_lsb 0
#define xd_p_reg_dyn0_clk   (*(volatile byte xdata *) 0xFBA8)
#define    p_reg_dyn0_clk   0xFBA8
#define reg_dyn0_clk_pos 0
#define reg_dyn0_clk_len 1
#define reg_dyn0_clk_lsb 0
#define xd_p_reg_free_clk   (*(volatile byte xdata *) 0xFBA9)
#define    p_reg_free_clk   0xFBA9
#define reg_free_clk_pos 0
#define reg_free_clk_len 1
#define reg_free_clk_lsb 0
#define xd_p_reg_ofdm_stick_mem_end_7_0 (*(volatile byte xdata *) 0xFBAD)
#define    p_reg_ofdm_stick_mem_end_7_0 0xFBAD
#define reg_ofdm_stick_mem_end_7_0_pos 0
#define reg_ofdm_stick_mem_end_7_0_len 8
#define reg_ofdm_stick_mem_end_7_0_lsb 0
#define xd_p_reg_ofdm_stick_mem_end_15_8    (*(volatile byte xdata *) 0xFBAE)
#define    p_reg_ofdm_stick_mem_end_15_8    0xFBAE
#define reg_ofdm_stick_mem_end_15_8_pos 0
#define reg_ofdm_stick_mem_end_15_8_len 8
#define reg_ofdm_stick_mem_end_15_8_lsb 8
#define xd_p_reg_ofdm_cpu_reset (*(volatile byte xdata *) 0xFBAF)
#define    p_reg_ofdm_cpu_reset 0xFBAF
#define reg_ofdm_cpu_reset_pos 0
#define reg_ofdm_cpu_reset_len 1
#define reg_ofdm_cpu_reset_lsb 0
#define xd_p_reg_ofdm_bank_float_en (*(volatile byte xdata *) 0xFBB0)
#define    p_reg_ofdm_bank_float_en 0xFBB0
#define reg_ofdm_bank_float_en_pos 0
#define reg_ofdm_bank_float_en_len 1
#define reg_ofdm_bank_float_en_lsb 0
#define xd_p_reg_ofdm_bank_float_start  (*(volatile byte xdata *) 0xFBB1)
#define    p_reg_ofdm_bank_float_start  0xFBB1
#define reg_ofdm_bank_float_start_pos 0
#define reg_ofdm_bank_float_start_len 8
#define reg_ofdm_bank_float_start_lsb 0
#define xd_p_reg_ofdm_bank_float_stop   (*(volatile byte xdata *) 0xFBB2)
#define    p_reg_ofdm_bank_float_stop   0xFBB2
#define reg_ofdm_bank_float_stop_pos 0
#define reg_ofdm_bank_float_stop_len 8
#define reg_ofdm_bank_float_stop_lsb 0
#define xd_r_ofsm_bond0_i   (*(volatile byte xdata *) 0xFBB3)
#define    r_ofsm_bond0_i   0xFBB3
#define ofsm_bond0_i_pos 0
#define ofsm_bond0_i_len 1
#define ofsm_bond0_i_lsb 0
#define xd_r_ofsm_bond1_i   (*(volatile byte xdata *) 0xFBB4)
#define    r_ofsm_bond1_i   0xFBB4
#define ofsm_bond1_i_pos 0
#define ofsm_bond1_i_len 1
#define ofsm_bond1_i_lsb 0
#define xd_r_io_mux_pwron_clk_strap (*(volatile byte xdata *) 0xD800)
#define    r_io_mux_pwron_clk_strap 0xD800
#define io_mux_pwron_clk_strap_pos 0
#define io_mux_pwron_clk_strap_len 4
#define io_mux_pwron_clk_strap_lsb 0
#define xd_r_io_mux_pwron_mode_strap    (*(volatile byte xdata *) 0xD801)
#define    r_io_mux_pwron_mode_strap    0xD801
#define io_mux_pwron_mode_strap_pos 0
#define io_mux_pwron_mode_strap_len 4
#define io_mux_pwron_mode_strap_lsb 0
#define xd_r_io_mux_pwron_hosta (*(volatile byte xdata *) 0xD802)
#define    r_io_mux_pwron_hosta 0xD802
#define io_mux_pwron_hosta_pos 0
#define io_mux_pwron_hosta_len 1
#define io_mux_pwron_hosta_lsb 0
#define xd_r_reg_top_revid  (*(volatile byte xdata *) 0xD803)
#define    r_reg_top_revid  0xD803
#define reg_top_revid_pos 0
#define reg_top_revid_len 4
#define reg_top_revid_lsb 0
#define xd_r_io_mux_bond0_i (*(volatile byte xdata *) 0xD804)
#define    r_io_mux_bond0_i 0xD804
#define io_mux_bond0_i_pos 0
#define io_mux_bond0_i_len 1
#define io_mux_bond0_i_lsb 0
#define xd_r_io_mux_bondu0_i    (*(volatile byte xdata *) 0xD805)
#define    r_io_mux_bondu0_i    0xD805
#define io_mux_bondu0_i_pos 0
#define io_mux_bondu0_i_len 1
#define io_mux_bondu0_i_lsb 0
#define xd_p_reg_ofsm_suspend   (*(volatile byte xdata *) 0xD806)
#define    p_reg_ofsm_suspend   0xD806
#define reg_ofsm_suspend_pos 0
#define reg_ofsm_suspend_len 1
#define reg_ofsm_suspend_lsb 0
#define xd_p_reg_tslice_off (*(volatile byte xdata *) 0xD807)
#define    p_reg_tslice_off 0xD807
#define reg_tslice_off_pos 0
#define reg_tslice_off_len 1
#define reg_tslice_off_lsb 0
#define xd_p_io_mux_wake_int    (*(volatile byte xdata *) 0xD808)
#define    p_io_mux_wake_int    0xD808
#define io_mux_wake_int_pos 0
#define io_mux_wake_int_len 1
#define io_mux_wake_int_lsb 0
#define xd_p_reg_top_pwrdw_hwen (*(volatile byte xdata *) 0xD809)
#define    p_reg_top_pwrdw_hwen 0xD809
#define reg_top_pwrdw_hwen_pos 0
#define reg_top_pwrdw_hwen_len 1
#define reg_top_pwrdw_hwen_lsb 0
#define xd_p_reg_top_pwrdw_inv  (*(volatile byte xdata *) 0xD80A)
#define    p_reg_top_pwrdw_inv  0xD80A
#define reg_top_pwrdw_inv_pos 0
#define reg_top_pwrdw_inv_len 1
#define reg_top_pwrdw_inv_lsb 0
#define xd_p_reg_top_pwrdw  (*(volatile byte xdata *) 0xD80B)
#define    p_reg_top_pwrdw  0xD80B
#define reg_top_pwrdw_pos 0
#define reg_top_pwrdw_len 1
#define reg_top_pwrdw_lsb 0
#define xd_p_io_mux_wake_int_en (*(volatile byte xdata *) 0xD80C)
#define    p_io_mux_wake_int_en 0xD80C
#define io_mux_wake_int_en_pos 0
#define io_mux_wake_int_en_len 1
#define io_mux_wake_int_en_lsb 0
#define xd_p_io_mux_pwrdw_int   (*(volatile byte xdata *) 0xD80D)
#define    p_io_mux_pwrdw_int   0xD80D
#define io_mux_pwrdw_int_pos 0
#define io_mux_pwrdw_int_len 1
#define io_mux_pwrdw_int_lsb 0
#define xd_p_reg_top_adcdly (*(volatile byte xdata *) 0xD80E)
#define    p_reg_top_adcdly 0xD80E
#define reg_top_adcdly_pos 0
#define reg_top_adcdly_len 2
#define reg_top_adcdly_lsb 0
#define xd_p_reg_top_debug  (*(volatile byte xdata *) 0xD80F)
#define    p_reg_top_debug  0xD80F
#define reg_top_debug_pos 0
#define reg_top_debug_len 1
#define reg_top_debug_lsb 0
#define xd_p_reg_top_pcout  (*(volatile byte xdata *) 0xD810)
#define    p_reg_top_pcout  0xD810
#define reg_top_pcout_pos 0
#define reg_top_pcout_len 1
#define reg_top_pcout_lsb 0
#define xd_p_reg_top_rs232  (*(volatile byte xdata *) 0xD811)
#define    p_reg_top_rs232  0xD811
#define reg_top_rs232_pos 0
#define reg_top_rs232_len 1
#define reg_top_rs232_lsb 0
#define xd_p_reg_iqmode (*(volatile byte xdata *) 0xD812)
#define    p_reg_iqmode 0xD812
#define reg_iqmode_pos 0
#define reg_iqmode_len 1
#define reg_iqmode_lsb 0
#define xd_p_reg_top_rstfd  (*(volatile byte xdata *) 0xD813)
#define    p_reg_top_rstfd  0xD813
#define reg_top_rstfd_pos 0
#define reg_top_rstfd_len 1
#define reg_top_rstfd_lsb 0
#define xd_p_reg_sdio_clksel    (*(volatile byte xdata *) 0xD814)
#define    p_reg_sdio_clksel    0xD814
#define reg_sdio_clksel_pos 0
#define reg_sdio_clksel_len 1
#define reg_sdio_clksel_lsb 0
#define xd_p_reg_utmi_clksel    (*(volatile byte xdata *) 0xD815)
#define    p_reg_utmi_clksel    0xD815
#define reg_utmi_clksel_pos 0
#define reg_utmi_clksel_len 8
#define reg_utmi_clksel_lsb 0
#define xd_p_reg_top_suscnt (*(volatile byte xdata *) 0xD816)
#define    p_reg_top_suscnt 0xD816
#define reg_top_suscnt_pos 0
#define reg_top_suscnt_len 2
#define reg_top_suscnt_lsb 0
#define xd_p_reg_top_dist2f (*(volatile byte xdata *) 0xD817)
#define    p_reg_top_dist2f 0xD817
#define reg_top_dist2f_pos 0
#define reg_top_dist2f_len 1
#define reg_top_dist2f_lsb 0
#define xd_p_reg_top_extusb (*(volatile byte xdata *) 0xD818)
#define    p_reg_top_extusb 0xD818
#define reg_top_extusb_pos 0
#define reg_top_extusb_len 1
#define reg_top_extusb_lsb 0
#define xd_p_reg_top_adcfifo    (*(volatile byte xdata *) 0xD819)
#define    p_reg_top_adcfifo    0xD819
#define reg_top_adcfifo_pos 0
#define reg_top_adcfifo_len 1
#define reg_top_adcfifo_lsb 0
#define xd_p_reg_top_clkoen (*(volatile byte xdata *) 0xD81A)
#define    p_reg_top_clkoen 0xD81A
#define reg_top_clkoen_pos 0
#define reg_top_clkoen_len 1
#define reg_top_clkoen_lsb 0
#define xd_p_reg_top_stpck  (*(volatile byte xdata *) 0xD81B)
#define    p_reg_top_stpck  0xD81B
#define reg_top_stpck_pos 0
#define reg_top_stpck_len 1
#define reg_top_stpck_lsb 0
#define xd_p_reg_top_freeck (*(volatile byte xdata *) 0xD81C)
#define    p_reg_top_freeck 0xD81C
#define reg_top_freeck_pos 0
#define reg_top_freeck_len 1
#define reg_top_freeck_lsb 0
#define xd_p_reg_top_dio_sel    (*(volatile byte xdata *) 0xD81D)
#define    p_reg_top_dio_sel    0xD81D
#define reg_top_dio_sel_pos 0
#define reg_top_dio_sel_len 1
#define reg_top_dio_sel_lsb 0
#define xd_p_reg_top_int_en (*(volatile byte xdata *) 0xD81E)
#define    p_reg_top_int_en 0xD81E
#define reg_top_int_en_pos 0
#define reg_top_int_en_len 1
#define reg_top_int_en_lsb 0
#define xd_p_reg_top_int_inv    (*(volatile byte xdata *) 0xD81F)
#define    p_reg_top_int_inv    0xD81F
#define reg_top_int_inv_pos 0
#define reg_top_int_inv_len 1
#define reg_top_int_inv_lsb 0
#define xd_p_reg_tsip_clk_inv   (*(volatile byte xdata *) 0xD820)
#define    p_reg_tsip_clk_inv   0xD820
#define reg_tsip_clk_inv_pos 0
#define reg_tsip_clk_inv_len 1
#define reg_tsip_clk_inv_lsb 0
#define xd_p_reg_ts_clk_inv (*(volatile byte xdata *) 0xD821)
#define    p_reg_ts_clk_inv 0xD821
#define reg_ts_clk_inv_pos 0
#define reg_ts_clk_inv_len 1
#define reg_ts_clk_inv_lsb 0
#define xd_p_reg_ts_hybrid  (*(volatile byte xdata *) 0xD822)
#define    p_reg_ts_hybrid  0xD822
#define reg_ts_hybrid_pos 0
#define reg_ts_hybrid_len 1
#define reg_ts_hybrid_lsb 0
#define xd_p_reg_ccir_sel   (*(volatile byte xdata *) 0xD823)
#define    p_reg_ccir_sel   0xD823
#define reg_ccir_sel_pos 0
#define reg_ccir_sel_len 4
#define reg_ccir_sel_lsb 0
#define xd_p_reg_top_sys_gate   (*(volatile byte xdata *) 0xD824)
#define    p_reg_top_sys_gate   0xD824
#define reg_top_sys_gate_pos 0
#define reg_top_sys_gate_len 1
#define reg_top_sys_gate_lsb 0
#define xd_p_reg_top_padpu  (*(volatile byte xdata *) 0xD825)
#define    p_reg_top_padpu  0xD825
#define reg_top_padpu_pos 0
#define reg_top_padpu_len 1
#define reg_top_padpu_lsb 0
#define xd_p_reg_top_padpd  (*(volatile byte xdata *) 0xD826)
#define    p_reg_top_padpd  0xD826
#define reg_top_padpd_pos 0
#define reg_top_padpd_len 1
#define reg_top_padpd_lsb 0
#define xd_p_reg_top_padodpu    (*(volatile byte xdata *) 0xD827)
#define    p_reg_top_padodpu    0xD827
#define reg_top_padodpu_pos 0
#define reg_top_padodpu_len 1
#define reg_top_padodpu_lsb 0
#define xd_p_reg_top_thirdodpu  (*(volatile byte xdata *) 0xD828)
#define    p_reg_top_thirdodpu  0xD828
#define reg_top_thirdodpu_pos 0
#define reg_top_thirdodpu_len 1
#define reg_top_thirdodpu_lsb 0
#define xd_p_reg_top_agc_od (*(volatile byte xdata *) 0xD829)
#define    p_reg_top_agc_od 0xD829
#define reg_top_agc_od_pos 0
#define reg_top_agc_od_len 1
#define reg_top_agc_od_lsb 0
#define xd_p_reg_top_padmpdr2   (*(volatile byte xdata *) 0xD82A)
#define    p_reg_top_padmpdr2   0xD82A
#define reg_top_padmpdr2_pos 0
#define reg_top_padmpdr2_len 1
#define reg_top_padmpdr2_lsb 0
#define xd_p_reg_top_padmpdr4   (*(volatile byte xdata *) 0xD82B)
#define    p_reg_top_padmpdr4   0xD82B
#define reg_top_padmpdr4_pos 0
#define reg_top_padmpdr4_len 1
#define reg_top_padmpdr4_lsb 0
#define xd_p_reg_top_padmpdr8   (*(volatile byte xdata *) 0xD82C)
#define    p_reg_top_padmpdr8   0xD82C
#define reg_top_padmpdr8_pos 0
#define reg_top_padmpdr8_len 1
#define reg_top_padmpdr8_lsb 0
#define xd_p_reg_top_padmpdrsr  (*(volatile byte xdata *) 0xD82D)
#define    p_reg_top_padmpdrsr  0xD82D
#define reg_top_padmpdrsr_pos 0
#define reg_top_padmpdrsr_len 1
#define reg_top_padmpdrsr_lsb 0
#define xd_p_reg_top_padmppu    (*(volatile byte xdata *) 0xD82E)
#define    p_reg_top_padmppu    0xD82E
#define reg_top_padmppu_pos 0
#define reg_top_padmppu_len 1
#define reg_top_padmppu_lsb 0
#define xd_p_reg_top_padmppd    (*(volatile byte xdata *) 0xD82F)
#define    p_reg_top_padmppd    0xD82F
#define reg_top_padmppd_pos 0
#define reg_top_padmppd_len 1
#define reg_top_padmppd_lsb 0
#define xd_p_reg_top_padmiscdr2 (*(volatile byte xdata *) 0xD830)
#define    p_reg_top_padmiscdr2 0xD830
#define reg_top_padmiscdr2_pos 0
#define reg_top_padmiscdr2_len 1
#define reg_top_padmiscdr2_lsb 0
#define xd_p_reg_top_padmiscdr4 (*(volatile byte xdata *) 0xD831)
#define    p_reg_top_padmiscdr4 0xD831
#define reg_top_padmiscdr4_pos 0
#define reg_top_padmiscdr4_len 1
#define reg_top_padmiscdr4_lsb 0
#define xd_p_reg_top_padmiscdr8 (*(volatile byte xdata *) 0xD832)
#define    p_reg_top_padmiscdr8 0xD832
#define reg_top_padmiscdr8_pos 0
#define reg_top_padmiscdr8_len 1
#define reg_top_padmiscdr8_lsb 0
#define xd_p_reg_top_padmiscdrsr    (*(volatile byte xdata *) 0xD833)
#define    p_reg_top_padmiscdrsr    0xD833
#define reg_top_padmiscdrsr_pos 0
#define reg_top_padmiscdrsr_len 1
#define reg_top_padmiscdrsr_lsb 0
#define xd_p_reg_top_padmiscpu  (*(volatile byte xdata *) 0xD834)
#define    p_reg_top_padmiscpu  0xD834
#define reg_top_padmiscpu_pos 0
#define reg_top_padmiscpu_len 1
#define reg_top_padmiscpu_lsb 0
#define xd_p_reg_top_padmiscpd  (*(volatile byte xdata *) 0xD835)
#define    p_reg_top_padmiscpd  0xD835
#define reg_top_padmiscpd_pos 0
#define reg_top_padmiscpd_len 1
#define reg_top_padmiscpd_lsb 0
#define xd_p_reg_host_b0_smt    (*(volatile byte xdata *) 0xD836)
#define    p_reg_host_b0_smt    0xD836
#define reg_host_b0_smt_pos 0
#define reg_host_b0_smt_len 1
#define reg_host_b0_smt_lsb 0
#define xd_p_reg_host_b1_smt    (*(volatile byte xdata *) 0xD837)
#define    p_reg_host_b1_smt    0xD837
#define reg_host_b1_smt_pos 0
#define reg_host_b1_smt_len 1
#define reg_host_b1_smt_lsb 0
#define xd_p_reg_host_b2_smt    (*(volatile byte xdata *) 0xD838)
#define    p_reg_host_b2_smt    0xD838
#define reg_host_b2_smt_pos 0
#define reg_host_b2_smt_len 1
#define reg_host_b2_smt_lsb 0
#define xd_p_reg_host_b3_smt    (*(volatile byte xdata *) 0xD839)
#define    p_reg_host_b3_smt    0xD839
#define reg_host_b3_smt_pos 0
#define reg_host_b3_smt_len 1
#define reg_host_b3_smt_lsb 0
#define xd_p_reg_host_b4_smt    (*(volatile byte xdata *) 0xD83A)
#define    p_reg_host_b4_smt    0xD83A
#define reg_host_b4_smt_pos 0
#define reg_host_b4_smt_len 1
#define reg_host_b4_smt_lsb 0
#define xd_p_reg_host_b5_smt    (*(volatile byte xdata *) 0xD83B)
#define    p_reg_host_b5_smt    0xD83B
#define reg_host_b5_smt_pos 0
#define reg_host_b5_smt_len 1
#define reg_host_b5_smt_lsb 0
#define xd_p_reg_host_b6_smt    (*(volatile byte xdata *) 0xD83C)
#define    p_reg_host_b6_smt    0xD83C
#define reg_host_b6_smt_pos 0
#define reg_host_b6_smt_len 1
#define reg_host_b6_smt_lsb 0
#define xd_p_reg_host_b7_smt    (*(volatile byte xdata *) 0xD83D)
#define    p_reg_host_b7_smt    0xD83D
#define reg_host_b7_smt_pos 0
#define reg_host_b7_smt_len 1
#define reg_host_b7_smt_lsb 0
#define xd_p_reg_host_b8_smt    (*(volatile byte xdata *) 0xD83E)
#define    p_reg_host_b8_smt    0xD83E
#define reg_host_b8_smt_pos 0
#define reg_host_b8_smt_len 1
#define reg_host_b8_smt_lsb 0
#define xd_p_reg_host_b9_smt    (*(volatile byte xdata *) 0xD83F)
#define    p_reg_host_b9_smt    0xD83F
#define reg_host_b9_smt_pos 0
#define reg_host_b9_smt_len 1
#define reg_host_b9_smt_lsb 0
#define xd_p_reg_host_b10_smt   (*(volatile byte xdata *) 0xD840)
#define    p_reg_host_b10_smt   0xD840
#define reg_host_b10_smt_pos 0
#define reg_host_b10_smt_len 1
#define reg_host_b10_smt_lsb 0
#define xd_p_reg_host_b11_smt   (*(volatile byte xdata *) 0xD841)
#define    p_reg_host_b11_smt   0xD841
#define reg_host_b11_smt_pos 0
#define reg_host_b11_smt_len 1
#define reg_host_b11_smt_lsb 0
#define xd_p_reg_host_a0_smt    (*(volatile byte xdata *) 0xD842)
#define    p_reg_host_a0_smt    0xD842
#define reg_host_a0_smt_pos 0
#define reg_host_a0_smt_len 1
#define reg_host_a0_smt_lsb 0
#define xd_p_reg_host_a1_smt    (*(volatile byte xdata *) 0xD843)
#define    p_reg_host_a1_smt    0xD843
#define reg_host_a1_smt_pos 0
#define reg_host_a1_smt_len 1
#define reg_host_a1_smt_lsb 0
#define xd_p_reg_host_a2_smt    (*(volatile byte xdata *) 0xD844)
#define    p_reg_host_a2_smt    0xD844
#define reg_host_a2_smt_pos 0
#define reg_host_a2_smt_len 1
#define reg_host_a2_smt_lsb 0
#define xd_p_reg_host_a3_smt    (*(volatile byte xdata *) 0xD845)
#define    p_reg_host_a3_smt    0xD845
#define reg_host_a3_smt_pos 0
#define reg_host_a3_smt_len 1
#define reg_host_a3_smt_lsb 0
#define xd_p_reg_host_a4_smt    (*(volatile byte xdata *) 0xD846)
#define    p_reg_host_a4_smt    0xD846
#define reg_host_a4_smt_pos 0
#define reg_host_a4_smt_len 1
#define reg_host_a4_smt_lsb 0
#define xd_p_reg_host_a5_smt    (*(volatile byte xdata *) 0xD847)
#define    p_reg_host_a5_smt    0xD847
#define reg_host_a5_smt_pos 0
#define reg_host_a5_smt_len 1
#define reg_host_a5_smt_lsb 0
#define xd_p_reg_host_a6_smt    (*(volatile byte xdata *) 0xD848)
#define    p_reg_host_a6_smt    0xD848
#define reg_host_a6_smt_pos 0
#define reg_host_a6_smt_len 1
#define reg_host_a6_smt_lsb 0
#define xd_p_reg_host_a7_smt    (*(volatile byte xdata *) 0xD849)
#define    p_reg_host_a7_smt    0xD849
#define reg_host_a7_smt_pos 0
#define reg_host_a7_smt_len 1
#define reg_host_a7_smt_lsb 0
#define xd_p_reg_host_a8_smt    (*(volatile byte xdata *) 0xD84A)
#define    p_reg_host_a8_smt    0xD84A
#define reg_host_a8_smt_pos 0
#define reg_host_a8_smt_len 1
#define reg_host_a8_smt_lsb 0
#define xd_p_reg_host_a9_smt    (*(volatile byte xdata *) 0xD84B)
#define    p_reg_host_a9_smt    0xD84B
#define reg_host_a9_smt_pos 0
#define reg_host_a9_smt_len 1
#define reg_host_a9_smt_lsb 0
#define xd_p_reg_host_a10_smt   (*(volatile byte xdata *) 0xD84C)
#define    p_reg_host_a10_smt   0xD84C
#define reg_host_a10_smt_pos 0
#define reg_host_a10_smt_len 1
#define reg_host_a10_smt_lsb 0
#define xd_p_reg_host_a11_smt   (*(volatile byte xdata *) 0xD84D)
#define    p_reg_host_a11_smt   0xD84D
#define reg_host_a11_smt_pos 0
#define reg_host_a11_smt_len 1
#define reg_host_a11_smt_lsb 0
#define xd_p_reg_testmode_pds   (*(volatile byte xdata *) 0xD84E)
#define    p_reg_testmode_pds   0xD84E
#define reg_testmode_pds_pos 0
#define reg_testmode_pds_len 3
#define reg_testmode_pds_lsb 0
#define xd_p_reg_debug31_pds    (*(volatile byte xdata *) 0xD84F)
#define    p_reg_debug31_pds    0xD84F
#define reg_debug31_pds_pos 0
#define reg_debug31_pds_len 3
#define reg_debug31_pds_lsb 0
#define xd_p_reg_debug30_pds    (*(volatile byte xdata *) 0xD850)
#define    p_reg_debug30_pds    0xD850
#define reg_debug30_pds_pos 0
#define reg_debug30_pds_len 3
#define reg_debug30_pds_lsb 0
#define xd_p_reg_debug29_pds    (*(volatile byte xdata *) 0xD851)
#define    p_reg_debug29_pds    0xD851
#define reg_debug29_pds_pos 0
#define reg_debug29_pds_len 3
#define reg_debug29_pds_lsb 0
#define xd_p_reg_debug28_pds    (*(volatile byte xdata *) 0xD852)
#define    p_reg_debug28_pds    0xD852
#define reg_debug28_pds_pos 0
#define reg_debug28_pds_len 3
#define reg_debug28_pds_lsb 0
#define xd_p_reg_debug27_pds    (*(volatile byte xdata *) 0xD853)
#define    p_reg_debug27_pds    0xD853
#define reg_debug27_pds_pos 0
#define reg_debug27_pds_len 3
#define reg_debug27_pds_lsb 0
#define xd_p_reg_debug26_pds    (*(volatile byte xdata *) 0xD854)
#define    p_reg_debug26_pds    0xD854
#define reg_debug26_pds_pos 0
#define reg_debug26_pds_len 3
#define reg_debug26_pds_lsb 0
#define xd_p_reg_debug25_pds    (*(volatile byte xdata *) 0xD855)
#define    p_reg_debug25_pds    0xD855
#define reg_debug25_pds_pos 0
#define reg_debug25_pds_len 3
#define reg_debug25_pds_lsb 0
#define xd_p_reg_debug24_pds    (*(volatile byte xdata *) 0xD856)
#define    p_reg_debug24_pds    0xD856
#define reg_debug24_pds_pos 0
#define reg_debug24_pds_len 3
#define reg_debug24_pds_lsb 0
#define xd_p_reg_debug23_pds    (*(volatile byte xdata *) 0xD857)
#define    p_reg_debug23_pds    0xD857
#define reg_debug23_pds_pos 0
#define reg_debug23_pds_len 3
#define reg_debug23_pds_lsb 0
#define xd_p_reg_debug22_pds    (*(volatile byte xdata *) 0xD858)
#define    p_reg_debug22_pds    0xD858
#define reg_debug22_pds_pos 0
#define reg_debug22_pds_len 3
#define reg_debug22_pds_lsb 0
#define xd_p_reg_gpioh1_pds (*(volatile byte xdata *) 0xD859)
#define    p_reg_gpioh1_pds 0xD859
#define reg_gpioh1_pds_pos 0
#define reg_gpioh1_pds_len 3
#define reg_gpioh1_pds_lsb 0
#define xd_p_reg_gpioh2_pds (*(volatile byte xdata *) 0xD85A)
#define    p_reg_gpioh2_pds 0xD85A
#define reg_gpioh2_pds_pos 0
#define reg_gpioh2_pds_len 3
#define reg_gpioh2_pds_lsb 0
#define xd_p_reg_gpioh3_pds (*(volatile byte xdata *) 0xD85B)
#define    p_reg_gpioh3_pds 0xD85B
#define reg_gpioh3_pds_pos 0
#define reg_gpioh3_pds_len 3
#define reg_gpioh3_pds_lsb 0
#define xd_p_reg_gpioh4_pds (*(volatile byte xdata *) 0xD85C)
#define    p_reg_gpioh4_pds 0xD85C
#define reg_gpioh4_pds_pos 0
#define reg_gpioh4_pds_len 3
#define reg_gpioh4_pds_lsb 0
#define xd_p_reg_iosda_pds  (*(volatile byte xdata *) 0xD85D)
#define    p_reg_iosda_pds  0xD85D
#define reg_iosda_pds_pos 0
#define reg_iosda_pds_len 3
#define reg_iosda_pds_lsb 0
#define xd_p_reg_ioscl_pds  (*(volatile byte xdata *) 0xD85E)
#define    p_reg_ioscl_pds  0xD85E
#define reg_ioscl_pds_pos 0
#define reg_ioscl_pds_len 3
#define reg_ioscl_pds_lsb 0
#define xd_p_reg_gpioh5_pds (*(volatile byte xdata *) 0xD85F)
#define    p_reg_gpioh5_pds 0xD85F
#define reg_gpioh5_pds_pos 0
#define reg_gpioh5_pds_len 3
#define reg_gpioh5_pds_lsb 0
#define xd_p_reg_bond0_pds  (*(volatile byte xdata *) 0xD860)
#define    p_reg_bond0_pds  0xD860
#define reg_bond0_pds_pos 0
#define reg_bond0_pds_len 3
#define reg_bond0_pds_lsb 0
#define xd_p_reg_i2caddr6_pds   (*(volatile byte xdata *) 0xD861)
#define    p_reg_i2caddr6_pds   0xD861
#define reg_i2caddr6_pds_pos 0
#define reg_i2caddr6_pds_len 3
#define reg_i2caddr6_pds_lsb 0
#define xd_p_reg_i2caddr5_pds   (*(volatile byte xdata *) 0xD862)
#define    p_reg_i2caddr5_pds   0xD862
#define reg_i2caddr5_pds_pos 0
#define reg_i2caddr5_pds_len 3
#define reg_i2caddr5_pds_lsb 0
#define xd_p_reg_i2caddr4_pds   (*(volatile byte xdata *) 0xD863)
#define    p_reg_i2caddr4_pds   0xD863
#define reg_i2caddr4_pds_pos 0
#define reg_i2caddr4_pds_len 3
#define reg_i2caddr4_pds_lsb 0
#define xd_p_reg_host_a0_pds    (*(volatile byte xdata *) 0xD864)
#define    p_reg_host_a0_pds    0xD864
#define reg_host_a0_pds_pos 0
#define reg_host_a0_pds_len 3
#define reg_host_a0_pds_lsb 0
#define xd_p_reg_host_a1_pds    (*(volatile byte xdata *) 0xD865)
#define    p_reg_host_a1_pds    0xD865
#define reg_host_a1_pds_pos 0
#define reg_host_a1_pds_len 3
#define reg_host_a1_pds_lsb 0
#define xd_p_reg_debug21_pds    (*(volatile byte xdata *) 0xD866)
#define    p_reg_debug21_pds    0xD866
#define reg_debug21_pds_pos 0
#define reg_debug21_pds_len 3
#define reg_debug21_pds_lsb 0
#define xd_p_reg_debug20_pds    (*(volatile byte xdata *) 0xD867)
#define    p_reg_debug20_pds    0xD867
#define reg_debug20_pds_pos 0
#define reg_debug20_pds_len 3
#define reg_debug20_pds_lsb 0
#define xd_p_reg_debug19_pds    (*(volatile byte xdata *) 0xD868)
#define    p_reg_debug19_pds    0xD868
#define reg_debug19_pds_pos 0
#define reg_debug19_pds_len 3
#define reg_debug19_pds_lsb 0
#define xd_p_reg_debug18_pds    (*(volatile byte xdata *) 0xD869)
#define    p_reg_debug18_pds    0xD869
#define reg_debug18_pds_pos 0
#define reg_debug18_pds_len 3
#define reg_debug18_pds_lsb 0
#define xd_p_reg_debug17_pds    (*(volatile byte xdata *) 0xD86A)
#define    p_reg_debug17_pds    0xD86A
#define reg_debug17_pds_pos 0
#define reg_debug17_pds_len 3
#define reg_debug17_pds_lsb 0
#define xd_p_reg_host_a2_pds    (*(volatile byte xdata *) 0xD86B)
#define    p_reg_host_a2_pds    0xD86B
#define reg_host_a2_pds_pos 0
#define reg_host_a2_pds_len 3
#define reg_host_a2_pds_lsb 0
#define xd_p_reg_host_a3_pds    (*(volatile byte xdata *) 0xD86C)
#define    p_reg_host_a3_pds    0xD86C
#define reg_host_a3_pds_pos 0
#define reg_host_a3_pds_len 3
#define reg_host_a3_pds_lsb 0
#define xd_p_reg_host_a4_pds    (*(volatile byte xdata *) 0xD86D)
#define    p_reg_host_a4_pds    0xD86D
#define reg_host_a4_pds_pos 0
#define reg_host_a4_pds_len 3
#define reg_host_a4_pds_lsb 0
#define xd_p_reg_host_a5_pds    (*(volatile byte xdata *) 0xD86E)
#define    p_reg_host_a5_pds    0xD86E
#define reg_host_a5_pds_pos 0
#define reg_host_a5_pds_len 3
#define reg_host_a5_pds_lsb 0
#define xd_p_reg_host_a6_pds    (*(volatile byte xdata *) 0xD86F)
#define    p_reg_host_a6_pds    0xD86F
#define reg_host_a6_pds_pos 0
#define reg_host_a6_pds_len 3
#define reg_host_a6_pds_lsb 0
#define xd_p_reg_p160sel_pds    (*(volatile byte xdata *) 0xD870)
#define    p_reg_p160sel_pds    0xD870
#define reg_p160sel_pds_pos 0
#define reg_p160sel_pds_len 3
#define reg_p160sel_pds_lsb 0
#define xd_p_reg_gpioh13_pds    (*(volatile byte xdata *) 0xD871)
#define    p_reg_gpioh13_pds    0xD871
#define reg_gpioh13_pds_pos 0
#define reg_gpioh13_pds_len 3
#define reg_gpioh13_pds_lsb 0
#define xd_p_reg_gpioh12_pds    (*(volatile byte xdata *) 0xD872)
#define    p_reg_gpioh12_pds    0xD872
#define reg_gpioh12_pds_pos 0
#define reg_gpioh12_pds_len 3
#define reg_gpioh12_pds_lsb 0
#define xd_p_reg_gpioh11_pds    (*(volatile byte xdata *) 0xD873)
#define    p_reg_gpioh11_pds    0xD873
#define reg_gpioh11_pds_pos 0
#define reg_gpioh11_pds_len 3
#define reg_gpioh11_pds_lsb 0
#define xd_p_reg_host_a7_pds    (*(volatile byte xdata *) 0xD874)
#define    p_reg_host_a7_pds    0xD874
#define reg_host_a7_pds_pos 0
#define reg_host_a7_pds_len 3
#define reg_host_a7_pds_lsb 0
#define xd_p_reg_host_a8_pds    (*(volatile byte xdata *) 0xD875)
#define    p_reg_host_a8_pds    0xD875
#define reg_host_a8_pds_pos 0
#define reg_host_a8_pds_len 3
#define reg_host_a8_pds_lsb 0
#define xd_p_reg_host_a9_pds    (*(volatile byte xdata *) 0xD876)
#define    p_reg_host_a9_pds    0xD876
#define reg_host_a9_pds_pos 0
#define reg_host_a9_pds_len 3
#define reg_host_a9_pds_lsb 0
#define xd_p_reg_host_a10_pds   (*(volatile byte xdata *) 0xD877)
#define    p_reg_host_a10_pds   0xD877
#define reg_host_a10_pds_pos 0
#define reg_host_a10_pds_len 3
#define reg_host_a10_pds_lsb 0
#define xd_p_reg_host_a11_pds   (*(volatile byte xdata *) 0xD878)
#define    p_reg_host_a11_pds   0xD878
#define reg_host_a11_pds_pos 0
#define reg_host_a11_pds_len 3
#define reg_host_a11_pds_lsb 0
#define xd_p_reg_bondu0_pds (*(volatile byte xdata *) 0xD879)
#define    p_reg_bondu0_pds 0xD879
#define reg_bondu0_pds_pos 0
#define reg_bondu0_pds_len 3
#define reg_bondu0_pds_lsb 0
#define xd_p_reg_host_b0_pds    (*(volatile byte xdata *) 0xD87A)
#define    p_reg_host_b0_pds    0xD87A
#define reg_host_b0_pds_pos 0
#define reg_host_b0_pds_len 3
#define reg_host_b0_pds_lsb 0
#define xd_p_reg_host_b1_pds    (*(volatile byte xdata *) 0xD87B)
#define    p_reg_host_b1_pds    0xD87B
#define reg_host_b1_pds_pos 0
#define reg_host_b1_pds_len 3
#define reg_host_b1_pds_lsb 0
#define xd_p_reg_host_b2_pds    (*(volatile byte xdata *) 0xD87C)
#define    p_reg_host_b2_pds    0xD87C
#define reg_host_b2_pds_pos 0
#define reg_host_b2_pds_len 3
#define reg_host_b2_pds_lsb 0
#define xd_p_reg_host_b3_pds    (*(volatile byte xdata *) 0xD87D)
#define    p_reg_host_b3_pds    0xD87D
#define reg_host_b3_pds_pos 0
#define reg_host_b3_pds_len 3
#define reg_host_b3_pds_lsb 0
#define xd_p_reg_host_b4_pds    (*(volatile byte xdata *) 0xD87E)
#define    p_reg_host_b4_pds    0xD87E
#define reg_host_b4_pds_pos 0
#define reg_host_b4_pds_len 3
#define reg_host_b4_pds_lsb 0
#define xd_p_reg_host_b5_pds    (*(volatile byte xdata *) 0xD87F)
#define    p_reg_host_b5_pds    0xD87F
#define reg_host_b5_pds_pos 0
#define reg_host_b5_pds_len 3
#define reg_host_b5_pds_lsb 0
#define xd_p_reg_host_b6_pds    (*(volatile byte xdata *) 0xD880)
#define    p_reg_host_b6_pds    0xD880
#define reg_host_b6_pds_pos 0
#define reg_host_b6_pds_len 3
#define reg_host_b6_pds_lsb 0
#define xd_p_reg_host_b7_pds    (*(volatile byte xdata *) 0xD881)
#define    p_reg_host_b7_pds    0xD881
#define reg_host_b7_pds_pos 0
#define reg_host_b7_pds_len 3
#define reg_host_b7_pds_lsb 0
#define xd_p_reg_afe_f12_pds    (*(volatile byte xdata *) 0xD882)
#define    p_reg_afe_f12_pds    0xD882
#define reg_afe_f12_pds_pos 0
#define reg_afe_f12_pds_len 3
#define reg_afe_f12_pds_lsb 0
#define xd_p_reg_host_b8_pds    (*(volatile byte xdata *) 0xD883)
#define    p_reg_host_b8_pds    0xD883
#define reg_host_b8_pds_pos 0
#define reg_host_b8_pds_len 3
#define reg_host_b8_pds_lsb 0
#define xd_p_reg_host_b9_pds    (*(volatile byte xdata *) 0xD884)
#define    p_reg_host_b9_pds    0xD884
#define reg_host_b9_pds_pos 0
#define reg_host_b9_pds_len 3
#define reg_host_b9_pds_lsb 0
#define xd_p_reg_host_b10_pds   (*(volatile byte xdata *) 0xD885)
#define    p_reg_host_b10_pds   0xD885
#define reg_host_b10_pds_pos 0
#define reg_host_b10_pds_len 3
#define reg_host_b10_pds_lsb 0
#define xd_p_reg_host_b11_pds   (*(volatile byte xdata *) 0xD886)
#define    p_reg_host_b11_pds   0xD886
#define reg_host_b11_pds_pos 0
#define reg_host_b11_pds_len 3
#define reg_host_b11_pds_lsb 0
#define xd_p_reg_debug16_pds    (*(volatile byte xdata *) 0xD887)
#define    p_reg_debug16_pds    0xD887
#define reg_debug16_pds_pos 0
#define reg_debug16_pds_len 3
#define reg_debug16_pds_lsb 0
#define xd_p_reg_debug15_pds    (*(volatile byte xdata *) 0xD888)
#define    p_reg_debug15_pds    0xD888
#define reg_debug15_pds_pos 0
#define reg_debug15_pds_len 3
#define reg_debug15_pds_lsb 0
#define xd_p_reg_debug14_pds    (*(volatile byte xdata *) 0xD889)
#define    p_reg_debug14_pds    0xD889
#define reg_debug14_pds_pos 0
#define reg_debug14_pds_len 3
#define reg_debug14_pds_lsb 0
#define xd_p_reg_debug13_pds    (*(volatile byte xdata *) 0xD88A)
#define    p_reg_debug13_pds    0xD88A
#define reg_debug13_pds_pos 0
#define reg_debug13_pds_len 3
#define reg_debug13_pds_lsb 0
#define xd_p_reg_debug12_pds    (*(volatile byte xdata *) 0xD88B)
#define    p_reg_debug12_pds    0xD88B
#define reg_debug12_pds_pos 0
#define reg_debug12_pds_len 3
#define reg_debug12_pds_lsb 0
#define xd_p_reg_debug11_pds    (*(volatile byte xdata *) 0xD88C)
#define    p_reg_debug11_pds    0xD88C
#define reg_debug11_pds_pos 0
#define reg_debug11_pds_len 3
#define reg_debug11_pds_lsb 0
#define xd_p_reg_debug10_pds    (*(volatile byte xdata *) 0xD88D)
#define    p_reg_debug10_pds    0xD88D
#define reg_debug10_pds_pos 0
#define reg_debug10_pds_len 3
#define reg_debug10_pds_lsb 0
#define xd_p_reg_debug9_pds (*(volatile byte xdata *) 0xD88E)
#define    p_reg_debug9_pds 0xD88E
#define reg_debug9_pds_pos 0
#define reg_debug9_pds_len 3
#define reg_debug9_pds_lsb 0
#define xd_p_reg_debug8_pds (*(volatile byte xdata *) 0xD88F)
#define    p_reg_debug8_pds 0xD88F
#define reg_debug8_pds_pos 0
#define reg_debug8_pds_len 3
#define reg_debug8_pds_lsb 0
#define xd_p_reg_debug7_pds (*(volatile byte xdata *) 0xD890)
#define    p_reg_debug7_pds 0xD890
#define reg_debug7_pds_pos 0
#define reg_debug7_pds_len 3
#define reg_debug7_pds_lsb 0
#define xd_p_reg_debug6_pds (*(volatile byte xdata *) 0xD891)
#define    p_reg_debug6_pds 0xD891
#define reg_debug6_pds_pos 0
#define reg_debug6_pds_len 3
#define reg_debug6_pds_lsb 0
#define xd_p_reg_debug5_pds (*(volatile byte xdata *) 0xD892)
#define    p_reg_debug5_pds 0xD892
#define reg_debug5_pds_pos 0
#define reg_debug5_pds_len 3
#define reg_debug5_pds_lsb 0
#define xd_p_reg_debug4_pds (*(volatile byte xdata *) 0xD893)
#define    p_reg_debug4_pds 0xD893
#define reg_debug4_pds_pos 0
#define reg_debug4_pds_len 3
#define reg_debug4_pds_lsb 0
#define xd_p_reg_clko_pds   (*(volatile byte xdata *) 0xD894)
#define    p_reg_clko_pds   0xD894
#define reg_clko_pds_pos 0
#define reg_clko_pds_len 3
#define reg_clko_pds_lsb 0
#define xd_p_reg_gpioh6_pds (*(volatile byte xdata *) 0xD895)
#define    p_reg_gpioh6_pds 0xD895
#define reg_gpioh6_pds_pos 0
#define reg_gpioh6_pds_len 3
#define reg_gpioh6_pds_lsb 0
#define xd_p_reg_gpioh7_pds (*(volatile byte xdata *) 0xD896)
#define    p_reg_gpioh7_pds 0xD896
#define reg_gpioh7_pds_pos 0
#define reg_gpioh7_pds_len 3
#define reg_gpioh7_pds_lsb 0
#define xd_p_reg_gpioh8_pds (*(volatile byte xdata *) 0xD897)
#define    p_reg_gpioh8_pds 0xD897
#define reg_gpioh8_pds_pos 0
#define reg_gpioh8_pds_len 3
#define reg_gpioh8_pds_lsb 0
#define xd_p_reg_gpioh9_pds (*(volatile byte xdata *) 0xD898)
#define    p_reg_gpioh9_pds 0xD898
#define reg_gpioh9_pds_pos 0
#define reg_gpioh9_pds_len 3
#define reg_gpioh9_pds_lsb 0
#define xd_p_reg_gpioh10_pds    (*(volatile byte xdata *) 0xD899)
#define    p_reg_gpioh10_pds    0xD899
#define reg_gpioh10_pds_pos 0
#define reg_gpioh10_pds_len 3
#define reg_gpioh10_pds_lsb 0
#define xd_p_reg_debug3_pds (*(volatile byte xdata *) 0xD89A)
#define    p_reg_debug3_pds 0xD89A
#define reg_debug3_pds_pos 0
#define reg_debug3_pds_len 3
#define reg_debug3_pds_lsb 0
#define xd_p_reg_debug2_pds (*(volatile byte xdata *) 0xD89B)
#define    p_reg_debug2_pds 0xD89B
#define reg_debug2_pds_pos 0
#define reg_debug2_pds_len 3
#define reg_debug2_pds_lsb 0
#define xd_p_reg_debug1_pds (*(volatile byte xdata *) 0xD89C)
#define    p_reg_debug1_pds 0xD89C
#define reg_debug1_pds_pos 0
#define reg_debug1_pds_len 3
#define reg_debug1_pds_lsb 0
#define xd_p_reg_debug0_pds (*(volatile byte xdata *) 0xD89D)
#define    p_reg_debug0_pds 0xD89D
#define reg_debug0_pds_pos 0
#define reg_debug0_pds_len 3
#define reg_debug0_pds_lsb 0
#define xd_p_reg_gpiot1_pds (*(volatile byte xdata *) 0xD89E)
#define    p_reg_gpiot1_pds 0xD89E
#define reg_gpiot1_pds_pos 0
#define reg_gpiot1_pds_len 3
#define reg_gpiot1_pds_lsb 0
#define xd_p_reg_gpiot2_pds (*(volatile byte xdata *) 0xD89F)
#define    p_reg_gpiot2_pds 0xD89F
#define reg_gpiot2_pds_pos 0
#define reg_gpiot2_pds_len 3
#define reg_gpiot2_pds_lsb 0
#define xd_p_reg_rfagc_pds  (*(volatile byte xdata *) 0xD8A0)
#define    p_reg_rfagc_pds  0xD8A0
#define reg_rfagc_pds_pos 0
#define reg_rfagc_pds_len 3
#define reg_rfagc_pds_lsb 0
#define xd_p_reg_ifagc_pds  (*(volatile byte xdata *) 0xD8A1)
#define    p_reg_ifagc_pds  0xD8A1
#define reg_ifagc_pds_pos 0
#define reg_ifagc_pds_len 3
#define reg_ifagc_pds_lsb 0
#define xd_p_reg_gpiot3_pds (*(volatile byte xdata *) 0xD8A2)
#define    p_reg_gpiot3_pds 0xD8A2
#define reg_gpiot3_pds_pos 0
#define reg_gpiot3_pds_len 3
#define reg_gpiot3_pds_lsb 0
#define xd_p_reg_i2caddr3_pds   (*(volatile byte xdata *) 0xD8A3)
#define    p_reg_i2caddr3_pds   0xD8A3
#define reg_i2caddr3_pds_pos 0
#define reg_i2caddr3_pds_len 3
#define reg_i2caddr3_pds_lsb 0
#define xd_p_reg_i2caddr2_pds   (*(volatile byte xdata *) 0xD8A4)
#define    p_reg_i2caddr2_pds   0xD8A4
#define reg_i2caddr2_pds_pos 0
#define reg_i2caddr2_pds_len 3
#define reg_i2caddr2_pds_lsb 0
#define xd_p_reg_i2caddr1_pds   (*(volatile byte xdata *) 0xD8A5)
#define    p_reg_i2caddr1_pds   0xD8A5
#define reg_i2caddr1_pds_pos 0
#define reg_i2caddr1_pds_len 3
#define reg_i2caddr1_pds_lsb 0
#define xd_p_reg_afe_sel33_pds  (*(volatile byte xdata *) 0xD8A6)
#define    p_reg_afe_sel33_pds  0xD8A6
#define reg_afe_sel33_pds_pos 0
#define reg_afe_sel33_pds_len 3
#define reg_afe_sel33_pds_lsb 0
#define xd_p_reg_iotunscl_pds   (*(volatile byte xdata *) 0xD8A7)
#define    p_reg_iotunscl_pds   0xD8A7
#define reg_iotunscl_pds_pos 0
#define reg_iotunscl_pds_len 3
#define reg_iotunscl_pds_lsb 0
#define xd_p_reg_iotunsda_pds   (*(volatile byte xdata *) 0xD8A8)
#define    p_reg_iotunsda_pds   0xD8A8
#define reg_iotunsda_pds_pos 0
#define reg_iotunsda_pds_len 3
#define reg_iotunsda_pds_lsb 0
#define xd_p_reg_rxdofsm_pds    (*(volatile byte xdata *) 0xD8A9)
#define    p_reg_rxdofsm_pds    0xD8A9
#define reg_rxdofsm_pds_pos 0
#define reg_rxdofsm_pds_len 3
#define reg_rxdofsm_pds_lsb 0
#define xd_p_reg_txdofsm_pds    (*(volatile byte xdata *) 0xD8AA)
#define    p_reg_txdofsm_pds    0xD8AA
#define reg_txdofsm_pds_pos 0
#define reg_txdofsm_pds_len 3
#define reg_txdofsm_pds_lsb 0
#define xd_p_reg_rxdlink_pds    (*(volatile byte xdata *) 0xD8AB)
#define    p_reg_rxdlink_pds    0xD8AB
#define reg_rxdlink_pds_pos 0
#define reg_rxdlink_pds_len 3
#define reg_rxdlink_pds_lsb 0
#define xd_p_reg_txdlink_pds    (*(volatile byte xdata *) 0xD8AC)
#define    p_reg_txdlink_pds    0xD8AC
#define reg_txdlink_pds_pos 0
#define reg_txdlink_pds_len 3
#define reg_txdlink_pds_lsb 0
#define xd_p_reg_ck_test_pds    (*(volatile byte xdata *) 0xD8AD)
#define    p_reg_ck_test_pds    0xD8AD
#define reg_ck_test_pds_pos 0
#define reg_ck_test_pds_len 3
#define reg_ck_test_pds_lsb 0
#define xd_r_reg_top_gpioh1_i   (*(volatile byte xdata *) 0xD8AE)
#define    r_reg_top_gpioh1_i   0xD8AE
#define reg_top_gpioh1_i_pos 0
#define reg_top_gpioh1_i_len 1
#define reg_top_gpioh1_i_lsb 0
#define xd_p_reg_top_gpioh1_o   (*(volatile byte xdata *) 0xD8AF)
#define    p_reg_top_gpioh1_o   0xD8AF
#define reg_top_gpioh1_o_pos 0
#define reg_top_gpioh1_o_len 1
#define reg_top_gpioh1_o_lsb 0
#define xd_p_reg_top_gpioh1_en  (*(volatile byte xdata *) 0xD8B0)
#define    p_reg_top_gpioh1_en  0xD8B0
#define reg_top_gpioh1_en_pos 0
#define reg_top_gpioh1_en_len 1
#define reg_top_gpioh1_en_lsb 0
#define xd_p_reg_top_gpioh1_on  (*(volatile byte xdata *) 0xD8B1)
#define    p_reg_top_gpioh1_on  0xD8B1
#define reg_top_gpioh1_on_pos 0
#define reg_top_gpioh1_on_len 1
#define reg_top_gpioh1_on_lsb 0
#define xd_r_reg_top_gpioh3_i   (*(volatile byte xdata *) 0xD8B2)
#define    r_reg_top_gpioh3_i   0xD8B2
#define reg_top_gpioh3_i_pos 0
#define reg_top_gpioh3_i_len 1
#define reg_top_gpioh3_i_lsb 0
#define xd_p_reg_top_gpioh3_o   (*(volatile byte xdata *) 0xD8B3)
#define    p_reg_top_gpioh3_o   0xD8B3
#define reg_top_gpioh3_o_pos 0
#define reg_top_gpioh3_o_len 1
#define reg_top_gpioh3_o_lsb 0
#define xd_p_reg_top_gpioh3_en  (*(volatile byte xdata *) 0xD8B4)
#define    p_reg_top_gpioh3_en  0xD8B4
#define reg_top_gpioh3_en_pos 0
#define reg_top_gpioh3_en_len 1
#define reg_top_gpioh3_en_lsb 0
#define xd_p_reg_top_gpioh3_on  (*(volatile byte xdata *) 0xD8B5)
#define    p_reg_top_gpioh3_on  0xD8B5
#define reg_top_gpioh3_on_pos 0
#define reg_top_gpioh3_on_len 1
#define reg_top_gpioh3_on_lsb 0
#define xd_r_reg_top_gpioh2_i   (*(volatile byte xdata *) 0xD8B6)
#define    r_reg_top_gpioh2_i   0xD8B6
#define reg_top_gpioh2_i_pos 0
#define reg_top_gpioh2_i_len 1
#define reg_top_gpioh2_i_lsb 0
#define xd_p_reg_top_gpioh2_o   (*(volatile byte xdata *) 0xD8B7)
#define    p_reg_top_gpioh2_o   0xD8B7
#define reg_top_gpioh2_o_pos 0
#define reg_top_gpioh2_o_len 1
#define reg_top_gpioh2_o_lsb 0
#define xd_p_reg_top_gpioh2_en  (*(volatile byte xdata *) 0xD8B8)
#define    p_reg_top_gpioh2_en  0xD8B8
#define reg_top_gpioh2_en_pos 0
#define reg_top_gpioh2_en_len 1
#define reg_top_gpioh2_en_lsb 0
#define xd_p_reg_top_gpioh2_on  (*(volatile byte xdata *) 0xD8B9)
#define    p_reg_top_gpioh2_on  0xD8B9
#define reg_top_gpioh2_on_pos 0
#define reg_top_gpioh2_on_len 1
#define reg_top_gpioh2_on_lsb 0
#define xd_r_reg_top_gpioh5_i   (*(volatile byte xdata *) 0xD8BA)
#define    r_reg_top_gpioh5_i   0xD8BA
#define reg_top_gpioh5_i_pos 0
#define reg_top_gpioh5_i_len 1
#define reg_top_gpioh5_i_lsb 0
#define xd_p_reg_top_gpioh5_o   (*(volatile byte xdata *) 0xD8BB)
#define    p_reg_top_gpioh5_o   0xD8BB
#define reg_top_gpioh5_o_pos 0
#define reg_top_gpioh5_o_len 1
#define reg_top_gpioh5_o_lsb 0
#define xd_p_reg_top_gpioh5_en  (*(volatile byte xdata *) 0xD8BC)
#define    p_reg_top_gpioh5_en  0xD8BC
#define reg_top_gpioh5_en_pos 0
#define reg_top_gpioh5_en_len 1
#define reg_top_gpioh5_en_lsb 0
#define xd_p_reg_top_gpioh5_on  (*(volatile byte xdata *) 0xD8BD)
#define    p_reg_top_gpioh5_on  0xD8BD
#define reg_top_gpioh5_on_pos 0
#define reg_top_gpioh5_on_len 1
#define reg_top_gpioh5_on_lsb 0
#define xd_r_reg_top_gpioh4_i   (*(volatile byte xdata *) 0xD8BE)
#define    r_reg_top_gpioh4_i   0xD8BE
#define reg_top_gpioh4_i_pos 0
#define reg_top_gpioh4_i_len 1
#define reg_top_gpioh4_i_lsb 0
#define xd_p_reg_top_gpioh4_o   (*(volatile byte xdata *) 0xD8BF)
#define    p_reg_top_gpioh4_o   0xD8BF
#define reg_top_gpioh4_o_pos 0
#define reg_top_gpioh4_o_len 1
#define reg_top_gpioh4_o_lsb 0
#define xd_p_reg_top_gpioh4_en  (*(volatile byte xdata *) 0xD8C0)
#define    p_reg_top_gpioh4_en  0xD8C0
#define reg_top_gpioh4_en_pos 0
#define reg_top_gpioh4_en_len 1
#define reg_top_gpioh4_en_lsb 0
#define xd_p_reg_top_gpioh4_on  (*(volatile byte xdata *) 0xD8C1)
#define    p_reg_top_gpioh4_on  0xD8C1
#define reg_top_gpioh4_on_pos 0
#define reg_top_gpioh4_on_len 1
#define reg_top_gpioh4_on_lsb 0
#define xd_r_reg_top_gpioh7_i   (*(volatile byte xdata *) 0xD8C2)
#define    r_reg_top_gpioh7_i   0xD8C2
#define reg_top_gpioh7_i_pos 0
#define reg_top_gpioh7_i_len 1
#define reg_top_gpioh7_i_lsb 0
#define xd_p_reg_top_gpioh7_o   (*(volatile byte xdata *) 0xD8C3)
#define    p_reg_top_gpioh7_o   0xD8C3
#define reg_top_gpioh7_o_pos 0
#define reg_top_gpioh7_o_len 1
#define reg_top_gpioh7_o_lsb 0
#define xd_p_reg_top_gpioh7_en  (*(volatile byte xdata *) 0xD8C4)
#define    p_reg_top_gpioh7_en  0xD8C4
#define reg_top_gpioh7_en_pos 0
#define reg_top_gpioh7_en_len 1
#define reg_top_gpioh7_en_lsb 0
#define xd_p_reg_top_gpioh7_on  (*(volatile byte xdata *) 0xD8C5)
#define    p_reg_top_gpioh7_on  0xD8C5
#define reg_top_gpioh7_on_pos 0
#define reg_top_gpioh7_on_len 1
#define reg_top_gpioh7_on_lsb 0
#define xd_r_reg_top_gpioh6_i   (*(volatile byte xdata *) 0xD8C6)
#define    r_reg_top_gpioh6_i   0xD8C6
#define reg_top_gpioh6_i_pos 0
#define reg_top_gpioh6_i_len 1
#define reg_top_gpioh6_i_lsb 0
#define xd_p_reg_top_gpioh6_o   (*(volatile byte xdata *) 0xD8C7)
#define    p_reg_top_gpioh6_o   0xD8C7
#define reg_top_gpioh6_o_pos 0
#define reg_top_gpioh6_o_len 1
#define reg_top_gpioh6_o_lsb 0
#define xd_p_reg_top_gpioh6_en  (*(volatile byte xdata *) 0xD8C8)
#define    p_reg_top_gpioh6_en  0xD8C8
#define reg_top_gpioh6_en_pos 0
#define reg_top_gpioh6_en_len 1
#define reg_top_gpioh6_en_lsb 0
#define xd_p_reg_top_gpioh6_on  (*(volatile byte xdata *) 0xD8C9)
#define    p_reg_top_gpioh6_on  0xD8C9
#define reg_top_gpioh6_on_pos 0
#define reg_top_gpioh6_on_len 1
#define reg_top_gpioh6_on_lsb 0
#define xd_r_reg_top_gpioh9_i   (*(volatile byte xdata *) 0xD8CA)
#define    r_reg_top_gpioh9_i   0xD8CA
#define reg_top_gpioh9_i_pos 0
#define reg_top_gpioh9_i_len 1
#define reg_top_gpioh9_i_lsb 0
#define xd_p_reg_top_gpioh9_o   (*(volatile byte xdata *) 0xD8CB)
#define    p_reg_top_gpioh9_o   0xD8CB
#define reg_top_gpioh9_o_pos 0
#define reg_top_gpioh9_o_len 1
#define reg_top_gpioh9_o_lsb 0
#define xd_p_reg_top_gpioh9_en  (*(volatile byte xdata *) 0xD8CC)
#define    p_reg_top_gpioh9_en  0xD8CC
#define reg_top_gpioh9_en_pos 0
#define reg_top_gpioh9_en_len 1
#define reg_top_gpioh9_en_lsb 0
#define xd_p_reg_top_gpioh9_on  (*(volatile byte xdata *) 0xD8CD)
#define    p_reg_top_gpioh9_on  0xD8CD
#define reg_top_gpioh9_on_pos 0
#define reg_top_gpioh9_on_len 1
#define reg_top_gpioh9_on_lsb 0
#define xd_r_reg_top_gpioh8_i   (*(volatile byte xdata *) 0xD8CE)
#define    r_reg_top_gpioh8_i   0xD8CE
#define reg_top_gpioh8_i_pos 0
#define reg_top_gpioh8_i_len 1
#define reg_top_gpioh8_i_lsb 0
#define xd_p_reg_top_gpioh8_o   (*(volatile byte xdata *) 0xD8CF)
#define    p_reg_top_gpioh8_o   0xD8CF
#define reg_top_gpioh8_o_pos 0
#define reg_top_gpioh8_o_len 1
#define reg_top_gpioh8_o_lsb 0
#define xd_p_reg_top_gpioh8_en  (*(volatile byte xdata *) 0xD8D0)
#define    p_reg_top_gpioh8_en  0xD8D0
#define reg_top_gpioh8_en_pos 0
#define reg_top_gpioh8_en_len 1
#define reg_top_gpioh8_en_lsb 0
#define xd_p_reg_top_gpioh8_on  (*(volatile byte xdata *) 0xD8D1)
#define    p_reg_top_gpioh8_on  0xD8D1
#define reg_top_gpioh8_on_pos 0
#define reg_top_gpioh8_on_len 1
#define reg_top_gpioh8_on_lsb 0
#define xd_r_reg_top_gpioh11_i  (*(volatile byte xdata *) 0xD8D2)
#define    r_reg_top_gpioh11_i  0xD8D2
#define reg_top_gpioh11_i_pos 0
#define reg_top_gpioh11_i_len 1
#define reg_top_gpioh11_i_lsb 0
#define xd_p_reg_top_gpioh11_o  (*(volatile byte xdata *) 0xD8D3)
#define    p_reg_top_gpioh11_o  0xD8D3
#define reg_top_gpioh11_o_pos 0
#define reg_top_gpioh11_o_len 1
#define reg_top_gpioh11_o_lsb 0
#define xd_p_reg_top_gpioh11_en (*(volatile byte xdata *) 0xD8D4)
#define    p_reg_top_gpioh11_en 0xD8D4
#define reg_top_gpioh11_en_pos 0
#define reg_top_gpioh11_en_len 1
#define reg_top_gpioh11_en_lsb 0
#define xd_p_reg_top_gpioh11_on (*(volatile byte xdata *) 0xD8D5)
#define    p_reg_top_gpioh11_on 0xD8D5
#define reg_top_gpioh11_on_pos 0
#define reg_top_gpioh11_on_len 1
#define reg_top_gpioh11_on_lsb 0
#define xd_r_reg_top_gpioh10_i  (*(volatile byte xdata *) 0xD8D6)
#define    r_reg_top_gpioh10_i  0xD8D6
#define reg_top_gpioh10_i_pos 0
#define reg_top_gpioh10_i_len 1
#define reg_top_gpioh10_i_lsb 0
#define xd_p_reg_top_gpioh10_o  (*(volatile byte xdata *) 0xD8D7)
#define    p_reg_top_gpioh10_o  0xD8D7
#define reg_top_gpioh10_o_pos 0
#define reg_top_gpioh10_o_len 1
#define reg_top_gpioh10_o_lsb 0
#define xd_p_reg_top_gpioh10_en (*(volatile byte xdata *) 0xD8D8)
#define    p_reg_top_gpioh10_en 0xD8D8
#define reg_top_gpioh10_en_pos 0
#define reg_top_gpioh10_en_len 1
#define reg_top_gpioh10_en_lsb 0
#define xd_p_reg_top_gpioh10_on (*(volatile byte xdata *) 0xD8D9)
#define    p_reg_top_gpioh10_on 0xD8D9
#define reg_top_gpioh10_on_pos 0
#define reg_top_gpioh10_on_len 1
#define reg_top_gpioh10_on_lsb 0
#define xd_r_reg_top_gpioh13_i  (*(volatile byte xdata *) 0xD8DA)
#define    r_reg_top_gpioh13_i  0xD8DA
#define reg_top_gpioh13_i_pos 0
#define reg_top_gpioh13_i_len 1
#define reg_top_gpioh13_i_lsb 0
#define xd_p_reg_top_gpioh13_o  (*(volatile byte xdata *) 0xD8DB)
#define    p_reg_top_gpioh13_o  0xD8DB
#define reg_top_gpioh13_o_pos 0
#define reg_top_gpioh13_o_len 1
#define reg_top_gpioh13_o_lsb 0
#define xd_p_reg_top_gpioh13_en (*(volatile byte xdata *) 0xD8DC)
#define    p_reg_top_gpioh13_en 0xD8DC
#define reg_top_gpioh13_en_pos 0
#define reg_top_gpioh13_en_len 1
#define reg_top_gpioh13_en_lsb 0
#define xd_p_reg_top_gpioh13_on (*(volatile byte xdata *) 0xD8DD)
#define    p_reg_top_gpioh13_on 0xD8DD
#define reg_top_gpioh13_on_pos 0
#define reg_top_gpioh13_on_len 1
#define reg_top_gpioh13_on_lsb 0
#define xd_r_reg_top_gpioh12_i  (*(volatile byte xdata *) 0xD8DE)
#define    r_reg_top_gpioh12_i  0xD8DE
#define reg_top_gpioh12_i_pos 0
#define reg_top_gpioh12_i_len 1
#define reg_top_gpioh12_i_lsb 0
#define xd_p_reg_top_gpioh12_o  (*(volatile byte xdata *) 0xD8DF)
#define    p_reg_top_gpioh12_o  0xD8DF
#define reg_top_gpioh12_o_pos 0
#define reg_top_gpioh12_o_len 1
#define reg_top_gpioh12_o_lsb 0
#define xd_p_reg_top_gpioh12_en (*(volatile byte xdata *) 0xD8E0)
#define    p_reg_top_gpioh12_en 0xD8E0
#define reg_top_gpioh12_en_pos 0
#define reg_top_gpioh12_en_len 1
#define reg_top_gpioh12_en_lsb 0
#define xd_p_reg_top_gpioh12_on (*(volatile byte xdata *) 0xD8E1)
#define    p_reg_top_gpioh12_on 0xD8E1
#define reg_top_gpioh12_on_pos 0
#define reg_top_gpioh12_on_len 1
#define reg_top_gpioh12_on_lsb 0
#define xd_r_reg_top_gpiot1_i   (*(volatile byte xdata *) 0xD8E2)
#define    r_reg_top_gpiot1_i   0xD8E2
#define reg_top_gpiot1_i_pos 0
#define reg_top_gpiot1_i_len 1
#define reg_top_gpiot1_i_lsb 0
#define xd_p_reg_top_gpiot1_o   (*(volatile byte xdata *) 0xD8E3)
#define    p_reg_top_gpiot1_o   0xD8E3
#define reg_top_gpiot1_o_pos 0
#define reg_top_gpiot1_o_len 1
#define reg_top_gpiot1_o_lsb 0
#define xd_p_reg_top_gpiot1_en  (*(volatile byte xdata *) 0xD8E4)
#define    p_reg_top_gpiot1_en  0xD8E4
#define reg_top_gpiot1_en_pos 0
#define reg_top_gpiot1_en_len 1
#define reg_top_gpiot1_en_lsb 0
#define xd_p_reg_top_gpiot1_on  (*(volatile byte xdata *) 0xD8E5)
#define    p_reg_top_gpiot1_on  0xD8E5
#define reg_top_gpiot1_on_pos 0
#define reg_top_gpiot1_on_len 1
#define reg_top_gpiot1_on_lsb 0
#define xd_r_reg_top_gpiot3_i   (*(volatile byte xdata *) 0xD8E6)
#define    r_reg_top_gpiot3_i   0xD8E6
#define reg_top_gpiot3_i_pos 0
#define reg_top_gpiot3_i_len 1
#define reg_top_gpiot3_i_lsb 0
#define xd_p_reg_top_gpiot3_o   (*(volatile byte xdata *) 0xD8E7)
#define    p_reg_top_gpiot3_o   0xD8E7
#define reg_top_gpiot3_o_pos 0
#define reg_top_gpiot3_o_len 1
#define reg_top_gpiot3_o_lsb 0
#define xd_p_reg_top_gpiot3_en  (*(volatile byte xdata *) 0xD8E8)
#define    p_reg_top_gpiot3_en  0xD8E8
#define reg_top_gpiot3_en_pos 0
#define reg_top_gpiot3_en_len 1
#define reg_top_gpiot3_en_lsb 0
#define xd_p_reg_top_gpiot3_on  (*(volatile byte xdata *) 0xD8E9)
#define    p_reg_top_gpiot3_on  0xD8E9
#define reg_top_gpiot3_on_pos 0
#define reg_top_gpiot3_on_len 1
#define reg_top_gpiot3_on_lsb 0
#define xd_r_reg_top_gpiot2_i   (*(volatile byte xdata *) 0xD8EA)
#define    r_reg_top_gpiot2_i   0xD8EA
#define reg_top_gpiot2_i_pos 0
#define reg_top_gpiot2_i_len 1
#define reg_top_gpiot2_i_lsb 0
#define xd_p_reg_top_gpiot2_o   (*(volatile byte xdata *) 0xD8EB)
#define    p_reg_top_gpiot2_o   0xD8EB
#define reg_top_gpiot2_o_pos 0
#define reg_top_gpiot2_o_len 1
#define reg_top_gpiot2_o_lsb 0
#define xd_p_reg_top_gpiot2_en  (*(volatile byte xdata *) 0xD8EC)
#define    p_reg_top_gpiot2_en  0xD8EC
#define reg_top_gpiot2_en_pos 0
#define reg_top_gpiot2_en_len 1
#define reg_top_gpiot2_en_lsb 0
#define xd_p_reg_top_gpiot2_on  (*(volatile byte xdata *) 0xD8ED)
#define    p_reg_top_gpiot2_on  0xD8ED
#define reg_top_gpiot2_on_pos 0
#define reg_top_gpiot2_on_len 1
#define reg_top_gpiot2_on_lsb 0
#define xd_p_reg_top_lock2_out  (*(volatile byte xdata *) 0xD8EE)
#define    p_reg_top_lock2_out  0xD8EE
#define reg_top_lock2_out_pos 0
#define reg_top_lock2_out_len 1
#define reg_top_lock2_out_lsb 0
#define xd_p_reg_top_lock2_tpsd (*(volatile byte xdata *) 0xD8EF)
#define    p_reg_top_lock2_tpsd 0xD8EF
#define reg_top_lock2_tpsd_pos 0
#define reg_top_lock2_tpsd_len 1
#define reg_top_lock2_tpsd_lsb 0
#define xd_p_reg_top_lock2_o    (*(volatile byte xdata *) 0xD8F0)
#define    p_reg_top_lock2_o    0xD8F0
#define reg_top_lock2_o_pos 0
#define reg_top_lock2_o_len 1
#define reg_top_lock2_o_lsb 0
#define xd_p_reg_top_lock2_en   (*(volatile byte xdata *) 0xD8F1)
#define    p_reg_top_lock2_en   0xD8F1
#define reg_top_lock2_en_pos 0
#define reg_top_lock2_en_len 1
#define reg_top_lock2_en_lsb 0
#define xd_p_reg_top_lock2_on   (*(volatile byte xdata *) 0xD8F2)
#define    p_reg_top_lock2_on   0xD8F2
#define reg_top_lock2_on_pos 0
#define reg_top_lock2_on_len 1
#define reg_top_lock2_on_lsb 0
#define xd_p_reg_top_lock1_out  (*(volatile byte xdata *) 0xD8F3)
#define    p_reg_top_lock1_out  0xD8F3
#define reg_top_lock1_out_pos 0
#define reg_top_lock1_out_len 1
#define reg_top_lock1_out_lsb 0
#define xd_p_reg_top_lock1_tpsd (*(volatile byte xdata *) 0xD8F4)
#define    p_reg_top_lock1_tpsd 0xD8F4
#define reg_top_lock1_tpsd_pos 0
#define reg_top_lock1_tpsd_len 1
#define reg_top_lock1_tpsd_lsb 0
#define xd_p_reg_top_lock1_o    (*(volatile byte xdata *) 0xD8F5)
#define    p_reg_top_lock1_o    0xD8F5
#define reg_top_lock1_o_pos 0
#define reg_top_lock1_o_len 1
#define reg_top_lock1_o_lsb 0
#define xd_p_reg_top_lock1_en   (*(volatile byte xdata *) 0xD8F6)
#define    p_reg_top_lock1_en   0xD8F6
#define reg_top_lock1_en_pos 0
#define reg_top_lock1_en_len 1
#define reg_top_lock1_en_lsb 0
#define xd_p_reg_top_lock1_on   (*(volatile byte xdata *) 0xD8F7)
#define    p_reg_top_lock1_on   0xD8F7
#define reg_top_lock1_on_pos 0
#define reg_top_lock1_on_len 1
#define reg_top_lock1_on_lsb 0
#define xd_p_reg_top_lock4_out  (*(volatile byte xdata *) 0xD8F8)
#define    p_reg_top_lock4_out  0xD8F8
#define reg_top_lock4_out_pos 0
#define reg_top_lock4_out_len 1
#define reg_top_lock4_out_lsb 0
#define xd_p_reg_top_lock4_tpsd (*(volatile byte xdata *) 0xD8F9)
#define    p_reg_top_lock4_tpsd 0xD8F9
#define reg_top_lock4_tpsd_pos 0
#define reg_top_lock4_tpsd_len 1
#define reg_top_lock4_tpsd_lsb 0
#define xd_p_reg_top_lock4_o    (*(volatile byte xdata *) 0xD8FA)
#define    p_reg_top_lock4_o    0xD8FA
#define reg_top_lock4_o_pos 0
#define reg_top_lock4_o_len 1
#define reg_top_lock4_o_lsb 0
#define xd_p_reg_top_lock4_en   (*(volatile byte xdata *) 0xD8FB)
#define    p_reg_top_lock4_en   0xD8FB
#define reg_top_lock4_en_pos 0
#define reg_top_lock4_en_len 1
#define reg_top_lock4_en_lsb 0
#define xd_p_reg_top_lock4_on   (*(volatile byte xdata *) 0xD8FC)
#define    p_reg_top_lock4_on   0xD8FC
#define reg_top_lock4_on_pos 0
#define reg_top_lock4_on_len 1
#define reg_top_lock4_on_lsb 0
#define xd_p_reg_top_lock3_out  (*(volatile byte xdata *) 0xD8FD)
#define    p_reg_top_lock3_out  0xD8FD
#define reg_top_lock3_out_pos 0
#define reg_top_lock3_out_len 1
#define reg_top_lock3_out_lsb 0
#define xd_p_reg_top_lock3_tpsd (*(volatile byte xdata *) 0xD8FE)
#define    p_reg_top_lock3_tpsd 0xD8FE
#define reg_top_lock3_tpsd_pos 0
#define reg_top_lock3_tpsd_len 1
#define reg_top_lock3_tpsd_lsb 0
#define xd_p_reg_top_lock3_o    (*(volatile byte xdata *) 0xD8FF)
#define    p_reg_top_lock3_o    0xD8FF
#define reg_top_lock3_o_pos 0
#define reg_top_lock3_o_len 1
#define reg_top_lock3_o_lsb 0
#define xd_p_reg_top_lock3_en   (*(volatile byte xdata *) 0xD900)
#define    p_reg_top_lock3_en   0xD900
#define reg_top_lock3_en_pos 0
#define reg_top_lock3_en_len 1
#define reg_top_lock3_en_lsb 0
#define xd_p_reg_top_lock3_on   (*(volatile byte xdata *) 0xD901)
#define    p_reg_top_lock3_on   0xD901
#define reg_top_lock3_on_pos 0
#define reg_top_lock3_on_len 1
#define reg_top_lock3_on_lsb 0
#define xd_p_reg_top_pwm0_en    (*(volatile byte xdata *) 0xD902)
#define    p_reg_top_pwm0_en    0xD902
#define reg_top_pwm0_en_pos 0
#define reg_top_pwm0_en_len 1
#define reg_top_pwm0_en_lsb 0
#define xd_p_reg_top_pwm1_en    (*(volatile byte xdata *) 0xD903)
#define    p_reg_top_pwm1_en    0xD903
#define reg_top_pwm1_en_pos 0
#define reg_top_pwm1_en_len 1
#define reg_top_pwm1_en_lsb 0
#define xd_p_reg_top_pwm2_en    (*(volatile byte xdata *) 0xD904)
#define    p_reg_top_pwm2_en    0xD904
#define reg_top_pwm2_en_pos 0
#define reg_top_pwm2_en_len 1
#define reg_top_pwm2_en_lsb 0
#define xd_p_reg_top_pwm3_en    (*(volatile byte xdata *) 0xD905)
#define    p_reg_top_pwm3_en    0xD905
#define reg_top_pwm3_en_pos 0
#define reg_top_pwm3_en_len 1
#define reg_top_pwm3_en_lsb 0
#define xd_p_reg_top_pwm0_gpio  (*(volatile byte xdata *) 0xD906)
#define    p_reg_top_pwm0_gpio  0xD906
#define reg_top_pwm0_gpio_pos 0
#define reg_top_pwm0_gpio_len 1
#define reg_top_pwm0_gpio_lsb 0
#define xd_p_reg_top_pwm0_pos   (*(volatile byte xdata *) 0xD907)
#define    p_reg_top_pwm0_pos   0xD907
#define reg_top_pwm0_pos_pos 0
#define reg_top_pwm0_pos_len 3
#define reg_top_pwm0_pos_lsb 0
#define xd_p_reg_top_pwm0_width (*(volatile byte xdata *) 0xD908)
#define    p_reg_top_pwm0_width 0xD908
#define reg_top_pwm0_width_pos 0
#define reg_top_pwm0_width_len 2
#define reg_top_pwm0_width_lsb 0
#define xd_p_reg_top_pwm0_duration  (*(volatile byte xdata *) 0xD909)
#define    p_reg_top_pwm0_duration  0xD909
#define reg_top_pwm0_duration_pos 0
#define reg_top_pwm0_duration_len 8
#define reg_top_pwm0_duration_lsb 0
#define xd_p_reg_top_pwm1_gpio  (*(volatile byte xdata *) 0xD90A)
#define    p_reg_top_pwm1_gpio  0xD90A
#define reg_top_pwm1_gpio_pos 0
#define reg_top_pwm1_gpio_len 1
#define reg_top_pwm1_gpio_lsb 0
#define xd_p_reg_top_pwm1_pos   (*(volatile byte xdata *) 0xD90B)
#define    p_reg_top_pwm1_pos   0xD90B
#define reg_top_pwm1_pos_pos 0
#define reg_top_pwm1_pos_len 3
#define reg_top_pwm1_pos_lsb 0
#define xd_p_reg_top_pwm1_width (*(volatile byte xdata *) 0xD90C)
#define    p_reg_top_pwm1_width 0xD90C
#define reg_top_pwm1_width_pos 0
#define reg_top_pwm1_width_len 2
#define reg_top_pwm1_width_lsb 0
#define xd_p_reg_top_pwm1_duration  (*(volatile byte xdata *) 0xD90D)
#define    p_reg_top_pwm1_duration  0xD90D
#define reg_top_pwm1_duration_pos 0
#define reg_top_pwm1_duration_len 8
#define reg_top_pwm1_duration_lsb 0
#define xd_p_reg_top_pwm2_gpio  (*(volatile byte xdata *) 0xD90E)
#define    p_reg_top_pwm2_gpio  0xD90E
#define reg_top_pwm2_gpio_pos 0
#define reg_top_pwm2_gpio_len 1
#define reg_top_pwm2_gpio_lsb 0
#define xd_p_reg_top_pwm2_pos   (*(volatile byte xdata *) 0xD90F)
#define    p_reg_top_pwm2_pos   0xD90F
#define reg_top_pwm2_pos_pos 0
#define reg_top_pwm2_pos_len 3
#define reg_top_pwm2_pos_lsb 0
#define xd_p_reg_top_pwm2_width (*(volatile byte xdata *) 0xD910)
#define    p_reg_top_pwm2_width 0xD910
#define reg_top_pwm2_width_pos 0
#define reg_top_pwm2_width_len 2
#define reg_top_pwm2_width_lsb 0
#define xd_p_reg_top_pwm2_duration  (*(volatile byte xdata *) 0xD911)
#define    p_reg_top_pwm2_duration  0xD911
#define reg_top_pwm2_duration_pos 0
#define reg_top_pwm2_duration_len 8
#define reg_top_pwm2_duration_lsb 0
#define xd_p_reg_top_pwm3_gpio  (*(volatile byte xdata *) 0xD912)
#define    p_reg_top_pwm3_gpio  0xD912
#define reg_top_pwm3_gpio_pos 0
#define reg_top_pwm3_gpio_len 1
#define reg_top_pwm3_gpio_lsb 0
#define xd_p_reg_top_pwm3_pos   (*(volatile byte xdata *) 0xD913)
#define    p_reg_top_pwm3_pos   0xD913
#define reg_top_pwm3_pos_pos 0
#define reg_top_pwm3_pos_len 3
#define reg_top_pwm3_pos_lsb 0
#define xd_p_reg_top_pwm3_width (*(volatile byte xdata *) 0xD914)
#define    p_reg_top_pwm3_width 0xD914
#define reg_top_pwm3_width_pos 0
#define reg_top_pwm3_width_len 2
#define reg_top_pwm3_width_lsb 0
#define xd_p_reg_top_pwm3_duration  (*(volatile byte xdata *) 0xD915)
#define    p_reg_top_pwm3_duration  0xD915
#define reg_top_pwm3_duration_pos 0
#define reg_top_pwm3_duration_len 8
#define reg_top_pwm3_duration_lsb 0
#define xd_p_reg_top_hosta_mpeg_par_mode    (*(volatile byte xdata *) 0xD916)
#define    p_reg_top_hosta_mpeg_par_mode    0xD916
#define reg_top_hosta_mpeg_par_mode_pos 0
#define reg_top_hosta_mpeg_par_mode_len 1
#define reg_top_hosta_mpeg_par_mode_lsb 0
#define xd_p_reg_top_hosta_mpeg_ser_mode    (*(volatile byte xdata *) 0xD917)
#define    p_reg_top_hosta_mpeg_ser_mode    0xD917
#define reg_top_hosta_mpeg_ser_mode_pos 0
#define reg_top_hosta_mpeg_ser_mode_len 1
#define reg_top_hosta_mpeg_ser_mode_lsb 0
#define xd_p_reg_top_hosta_mpeg_ser_do7 (*(volatile byte xdata *) 0xD918)
#define    p_reg_top_hosta_mpeg_ser_do7 0xD918
#define reg_top_hosta_mpeg_ser_do7_pos 0
#define reg_top_hosta_mpeg_ser_do7_len 1
#define reg_top_hosta_mpeg_ser_do7_lsb 0
#define xd_p_reg_top_hosta_dca_upper    (*(volatile byte xdata *) 0xD919)
#define    p_reg_top_hosta_dca_upper    0xD919
#define reg_top_hosta_dca_upper_pos 0
#define reg_top_hosta_dca_upper_len 1
#define reg_top_hosta_dca_upper_lsb 0
#define xd_p_reg_top_hosta_dca_lower    (*(volatile byte xdata *) 0xD91A)
#define    p_reg_top_hosta_dca_lower    0xD91A
#define reg_top_hosta_dca_lower_pos 0
#define reg_top_hosta_dca_lower_len 1
#define reg_top_hosta_dca_lower_lsb 0
#define xd_p_reg_top_hostb_mpeg_par_mode    (*(volatile byte xdata *) 0xD91B)
#define    p_reg_top_hostb_mpeg_par_mode    0xD91B
#define reg_top_hostb_mpeg_par_mode_pos 0
#define reg_top_hostb_mpeg_par_mode_len 1
#define reg_top_hostb_mpeg_par_mode_lsb 0
#define xd_p_reg_top_hostb_mpeg_ser_mode    (*(volatile byte xdata *) 0xD91C)
#define    p_reg_top_hostb_mpeg_ser_mode    0xD91C
#define reg_top_hostb_mpeg_ser_mode_pos 0
#define reg_top_hostb_mpeg_ser_mode_len 1
#define reg_top_hostb_mpeg_ser_mode_lsb 0
#define xd_p_reg_top_hostb_mpeg_ser_do7 (*(volatile byte xdata *) 0xD91D)
#define    p_reg_top_hostb_mpeg_ser_do7 0xD91D
#define reg_top_hostb_mpeg_ser_do7_pos 0
#define reg_top_hostb_mpeg_ser_do7_len 1
#define reg_top_hostb_mpeg_ser_do7_lsb 0
#define xd_p_reg_top_hostb_dca_upper    (*(volatile byte xdata *) 0xD91E)
#define    p_reg_top_hostb_dca_upper    0xD91E
#define reg_top_hostb_dca_upper_pos 0
#define reg_top_hostb_dca_upper_len 1
#define reg_top_hostb_dca_upper_lsb 0
#define xd_p_reg_top_hostb_dca_lower    (*(volatile byte xdata *) 0xD91F)
#define    p_reg_top_hostb_dca_lower    0xD91F
#define reg_top_hostb_dca_lower_pos 0
#define reg_top_hostb_dca_lower_len 1
#define reg_top_hostb_dca_lower_lsb 0
#define xd_p_reg_top_host_reverse   (*(volatile byte xdata *) 0xD920)
#define    p_reg_top_host_reverse   0xD920
#define reg_top_host_reverse_pos 0
#define reg_top_host_reverse_len 1
#define reg_top_host_reverse_lsb 0
#define xd_p_reg_top_hosta_ccir (*(volatile byte xdata *) 0xD921)
#define    p_reg_top_hosta_ccir 0xD921
#define reg_top_hosta_ccir_pos 0
#define reg_top_hosta_ccir_len 1
#define reg_top_hosta_ccir_lsb 0
#define xd_p_reg_top_hostb_ccir (*(volatile byte xdata *) 0xD922)
#define    p_reg_top_hostb_ccir 0xD922
#define reg_top_hostb_ccir_pos 0
#define reg_top_hostb_ccir_len 1
#define reg_top_hostb_ccir_lsb 0
#define xd_p_reg_top_i2s_master_mode    (*(volatile byte xdata *) 0xD923)
#define    p_reg_top_i2s_master_mode    0xD923
#define reg_top_i2s_master_mode_pos 0
#define reg_top_i2s_master_mode_len 1
#define reg_top_i2s_master_mode_lsb 0
#define xd_p_reg_usb_cfg_speed  (*(volatile byte xdata *) 0xDD00)
#define    p_reg_usb_cfg_speed  0xDD00
#define reg_usb_cfg_speed_pos 0
#define reg_usb_cfg_speed_len 1
#define reg_usb_cfg_speed_lsb 0
#define xd_p_reg_usb_cfg_utmi16 (*(volatile byte xdata *) 0xDD00)
#define    p_reg_usb_cfg_utmi16 0xDD00
#define reg_usb_cfg_utmi16_pos 1
#define reg_usb_cfg_utmi16_len 1
#define reg_usb_cfg_utmi16_lsb 0
#define xd_p_reg_usb_cfg_test   (*(volatile byte xdata *) 0xDD00)
#define    p_reg_usb_cfg_test   0xDD00
#define reg_usb_cfg_test_pos 3
#define reg_usb_cfg_test_len 3
#define reg_usb_cfg_test_lsb 0
#define xd_p_reg_usb_port_sim_reset (*(volatile byte xdata *) 0xDD00)
#define    p_reg_usb_port_sim_reset 0xDD00
#define reg_usb_port_sim_reset_pos 6
#define reg_usb_port_sim_reset_len 1
#define reg_usb_port_sim_reset_lsb 0
#define xd_p_reg_usb_port_run   (*(volatile byte xdata *) 0xDD00)
#define    p_reg_usb_port_run   0xDD00
#define reg_usb_port_run_pos 7
#define reg_usb_port_run_len 1
#define reg_usb_port_run_lsb 0
#define xd_r_usb_line_state_0   (*(volatile byte xdata *) 0xDD01)
#define    r_usb_line_state_0   0xDD01
#define usb_line_state_0_pos 0
#define usb_line_state_0_len 1
#define usb_line_state_0_lsb 0
#define xd_r_usb_line_state_1   (*(volatile byte xdata *) 0xDD01)
#define    r_usb_line_state_1   0xDD01
#define usb_line_state_1_pos 1
#define usb_line_state_1_len 1
#define usb_line_state_1_lsb 0
#define xd_r_reg_usb_status_speed   (*(volatile byte xdata *) 0xDD01)
#define    r_reg_usb_status_speed   0xDD01
#define reg_usb_status_speed_pos 2
#define reg_usb_status_speed_len 1
#define reg_usb_status_speed_lsb 0
#define xd_r_reg_usb_status_connect (*(volatile byte xdata *) 0xDD01)
#define    r_reg_usb_status_connect 0xDD01
#define reg_usb_status_connect_pos 3
#define reg_usb_status_connect_len 1
#define reg_usb_status_connect_lsb 0
#define xd_r_reg_usb_rx_buf (*(volatile byte xdata *) 0xDD01)
#define    r_reg_usb_rx_buf 0xDD01
#define reg_usb_rx_buf_pos 4
#define reg_usb_rx_buf_len 1
#define reg_usb_rx_buf_lsb 0
#define xd_r_reg_usb_port_reset (*(volatile byte xdata *) 0xDD01)
#define    r_reg_usb_port_reset 0xDD01
#define reg_usb_port_reset_pos 5
#define reg_usb_port_reset_len 1
#define reg_usb_port_reset_lsb 0
#define xd_r_reg_usb_port_suspend   (*(volatile byte xdata *) 0xDD01)
#define    r_reg_usb_port_suspend   0xDD01
#define reg_usb_port_suspend_pos 6
#define reg_usb_port_suspend_len 1
#define reg_usb_port_suspend_lsb 0
#define xd_p_reg_ep1_tx_type    (*(volatile byte xdata *) 0xDD07)
#define    p_reg_ep1_tx_type    0xDD07
#define reg_ep1_tx_type_pos 2
#define reg_ep1_tx_type_len 1
#define reg_ep1_tx_type_lsb 0
#define xd_p_reg_ep2_rx_type    (*(volatile byte xdata *) 0xDD07)
#define    p_reg_ep2_rx_type    0xDD07
#define reg_ep2_rx_type_pos 3
#define reg_ep2_rx_type_len 1
#define reg_ep2_rx_type_lsb 0
#define xd_p_reg_ep3_tx_type    (*(volatile byte xdata *) 0xDD07)
#define    p_reg_ep3_tx_type    0xDD07
#define reg_ep3_tx_type_pos 4
#define reg_ep3_tx_type_len 1
#define reg_ep3_tx_type_lsb 0
#define xd_p_reg_ep4_tx_type    (*(volatile byte xdata *) 0xDD07)
#define    p_reg_ep4_tx_type    0xDD07
#define reg_ep4_tx_type_pos 5
#define reg_ep4_tx_type_len 1
#define reg_ep4_tx_type_lsb 0
#define xd_p_reg_ep5_tx_type    (*(volatile byte xdata *) 0xDD07)
#define    p_reg_ep5_tx_type    0xDD07
#define reg_ep5_tx_type_pos 6
#define reg_ep5_tx_type_len 1
#define reg_ep5_tx_type_lsb 0
#define xd_p_reg_ep6_tx_type    (*(volatile byte xdata *) 0xDD07)
#define    p_reg_ep6_tx_type    0xDD07
#define reg_ep6_tx_type_pos 7
#define reg_ep6_tx_type_len 1
#define reg_ep6_tx_type_lsb 0
#define xd_p_reg_ep0_max_pkt    (*(volatile byte xdata *) 0xDD08)
#define    p_reg_ep0_max_pkt    0xDD08
#define reg_ep0_max_pkt_pos 0
#define reg_ep0_max_pkt_len 8
#define reg_ep0_max_pkt_lsb 0
#define xd_p_reg_ep2_max_pkt    (*(volatile byte xdata *) 0xDD0A)
#define    p_reg_ep2_max_pkt    0xDD0A
#define reg_ep2_max_pkt_pos 0
#define reg_ep2_max_pkt_len 8
#define reg_ep2_max_pkt_lsb 0
#define xd_p_reg_ep4_max_pkt    (*(volatile byte xdata *) 0xDD0C)
#define    p_reg_ep4_max_pkt    0xDD0C
#define reg_ep4_max_pkt_pos 0
#define reg_ep4_max_pkt_len 8
#define reg_ep4_max_pkt_lsb 0
#define xd_p_reg_ep5_max_pkt    (*(volatile byte xdata *) 0xDD0D)
#define    p_reg_ep5_max_pkt    0xDD0D
#define reg_ep5_max_pkt_pos 0
#define reg_ep5_max_pkt_len 8
#define reg_ep5_max_pkt_lsb 0
#define xd_p_reg_ep6_max_pkt_7_0    (*(volatile byte xdata *) 0xDD0E)
#define    p_reg_ep6_max_pkt_7_0    0xDD0E
#define reg_ep6_max_pkt_7_0_pos 0
#define reg_ep6_max_pkt_7_0_len 8
#define reg_ep6_max_pkt_7_0_lsb 0
#define xd_p_reg_ep6_max_pkt_15_8   (*(volatile byte xdata *) 0xDD0F)
#define    p_reg_ep6_max_pkt_15_8   0xDD0F
#define reg_ep6_max_pkt_15_8_pos 0
#define reg_ep6_max_pkt_15_8_len 8
#define reg_ep6_max_pkt_15_8_lsb 8
#define xd_p_reg_usb_addr   (*(volatile byte xdata *) 0xDD10)
#define    p_reg_usb_addr   0xDD10
#define reg_usb_addr_pos 0
#define reg_usb_addr_len 7
#define reg_usb_addr_lsb 0
#define xd_p_reg_usb_addr_now   (*(volatile byte xdata *) 0xDD10)
#define    p_reg_usb_addr_now   0xDD10
#define reg_usb_addr_now_pos 7
#define reg_usb_addr_now_len 1
#define reg_usb_addr_now_lsb 0
#define xd_p_reg_ep0_tx_en  (*(volatile byte xdata *) 0xDD11)
#define    p_reg_ep0_tx_en  0xDD11
#define reg_ep0_tx_en_pos 0
#define reg_ep0_tx_en_len 1
#define reg_ep0_tx_en_lsb 0
#define xd_p_reg_ep0_rx_en  (*(volatile byte xdata *) 0xDD11)
#define    p_reg_ep0_rx_en  0xDD11
#define reg_ep0_rx_en_pos 1
#define reg_ep0_rx_en_len 1
#define reg_ep0_rx_en_lsb 0
#define xd_p_reg_ep1_tx_en  (*(volatile byte xdata *) 0xDD11)
#define    p_reg_ep1_tx_en  0xDD11
#define reg_ep1_tx_en_pos 2
#define reg_ep1_tx_en_len 1
#define reg_ep1_tx_en_lsb 0
#define xd_p_reg_ep2_rx_en  (*(volatile byte xdata *) 0xDD11)
#define    p_reg_ep2_rx_en  0xDD11
#define reg_ep2_rx_en_pos 3
#define reg_ep2_rx_en_len 1
#define reg_ep2_rx_en_lsb 0
#define xd_p_reg_ep3_tx_en  (*(volatile byte xdata *) 0xDD11)
#define    p_reg_ep3_tx_en  0xDD11
#define reg_ep3_tx_en_pos 4
#define reg_ep3_tx_en_len 1
#define reg_ep3_tx_en_lsb 0
#define xd_p_reg_ep4_tx_en  (*(volatile byte xdata *) 0xDD11)
#define    p_reg_ep4_tx_en  0xDD11
#define reg_ep4_tx_en_pos 5
#define reg_ep4_tx_en_len 1
#define reg_ep4_tx_en_lsb 0
#define xd_p_reg_ep5_tx_en  (*(volatile byte xdata *) 0xDD11)
#define    p_reg_ep5_tx_en  0xDD11
#define reg_ep5_tx_en_pos 6
#define reg_ep5_tx_en_len 1
#define reg_ep5_tx_en_lsb 0
#define xd_p_reg_ep6_tx_en  (*(volatile byte xdata *) 0xDD11)
#define    p_reg_ep6_tx_en  0xDD11
#define reg_ep6_tx_en_pos 7
#define reg_ep6_tx_en_len 1
#define reg_ep6_tx_en_lsb 0
#define xd_p_reg_ep0_tx_stall   (*(volatile byte xdata *) 0xDD12)
#define    p_reg_ep0_tx_stall   0xDD12
#define reg_ep0_tx_stall_pos 0
#define reg_ep0_tx_stall_len 1
#define reg_ep0_tx_stall_lsb 0
#define xd_p_reg_ep0_rx_stall   (*(volatile byte xdata *) 0xDD12)
#define    p_reg_ep0_rx_stall   0xDD12
#define reg_ep0_rx_stall_pos 1
#define reg_ep0_rx_stall_len 1
#define reg_ep0_rx_stall_lsb 0
#define xd_p_reg_ep1_tx_stall   (*(volatile byte xdata *) 0xDD12)
#define    p_reg_ep1_tx_stall   0xDD12
#define reg_ep1_tx_stall_pos 2
#define reg_ep1_tx_stall_len 1
#define reg_ep1_tx_stall_lsb 0
#define xd_p_reg_ep2_rx_stall   (*(volatile byte xdata *) 0xDD12)
#define    p_reg_ep2_rx_stall   0xDD12
#define reg_ep2_rx_stall_pos 3
#define reg_ep2_rx_stall_len 1
#define reg_ep2_rx_stall_lsb 0
#define xd_p_reg_ep3_tx_stall   (*(volatile byte xdata *) 0xDD12)
#define    p_reg_ep3_tx_stall   0xDD12
#define reg_ep3_tx_stall_pos 4
#define reg_ep3_tx_stall_len 1
#define reg_ep3_tx_stall_lsb 0
#define xd_p_reg_ep4_tx_stall   (*(volatile byte xdata *) 0xDD12)
#define    p_reg_ep4_tx_stall   0xDD12
#define reg_ep4_tx_stall_pos 5
#define reg_ep4_tx_stall_len 1
#define reg_ep4_tx_stall_lsb 0
#define xd_p_reg_ep5_tx_stall   (*(volatile byte xdata *) 0xDD12)
#define    p_reg_ep5_tx_stall   0xDD12
#define reg_ep5_tx_stall_pos 6
#define reg_ep5_tx_stall_len 1
#define reg_ep5_tx_stall_lsb 0
#define xd_p_reg_ep6_tx_stall   (*(volatile byte xdata *) 0xDD12)
#define    p_reg_ep6_tx_stall   0xDD12
#define reg_ep6_tx_stall_pos 7
#define reg_ep6_tx_stall_len 1
#define reg_ep6_tx_stall_lsb 0
#define xd_p_reg_ep0_tx_nak (*(volatile byte xdata *) 0xDD13)
#define    p_reg_ep0_tx_nak 0xDD13
#define reg_ep0_tx_nak_pos 0
#define reg_ep0_tx_nak_len 1
#define reg_ep0_tx_nak_lsb 0
#define xd_p_reg_ep0_rx_nak (*(volatile byte xdata *) 0xDD13)
#define    p_reg_ep0_rx_nak 0xDD13
#define reg_ep0_rx_nak_pos 1
#define reg_ep0_rx_nak_len 1
#define reg_ep0_rx_nak_lsb 0
#define xd_p_reg_ep1_tx_nak (*(volatile byte xdata *) 0xDD13)
#define    p_reg_ep1_tx_nak 0xDD13
#define reg_ep1_tx_nak_pos 2
#define reg_ep1_tx_nak_len 1
#define reg_ep1_tx_nak_lsb 0
#define xd_p_reg_ep2_rx_nak (*(volatile byte xdata *) 0xDD13)
#define    p_reg_ep2_rx_nak 0xDD13
#define reg_ep2_rx_nak_pos 3
#define reg_ep2_rx_nak_len 1
#define reg_ep2_rx_nak_lsb 0
#define xd_p_reg_ep3_tx_nak (*(volatile byte xdata *) 0xDD13)
#define    p_reg_ep3_tx_nak 0xDD13
#define reg_ep3_tx_nak_pos 4
#define reg_ep3_tx_nak_len 1
#define reg_ep3_tx_nak_lsb 0
#define xd_p_reg_ep4_tx_nak (*(volatile byte xdata *) 0xDD13)
#define    p_reg_ep4_tx_nak 0xDD13
#define reg_ep4_tx_nak_pos 5
#define reg_ep4_tx_nak_len 1
#define reg_ep4_tx_nak_lsb 0
#define xd_p_reg_ep5_tx_nak (*(volatile byte xdata *) 0xDD13)
#define    p_reg_ep5_tx_nak 0xDD13
#define reg_ep5_tx_nak_pos 6
#define reg_ep5_tx_nak_len 1
#define reg_ep5_tx_nak_lsb 0
#define xd_p_reg_ep6_tx_nak (*(volatile byte xdata *) 0xDD13)
#define    p_reg_ep6_tx_nak 0xDD13
#define reg_ep6_tx_nak_pos 7
#define reg_ep6_tx_nak_len 1
#define reg_ep6_tx_nak_lsb 0
#define xd_p_reg_ep0_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
#define    p_reg_ep0_tx_nak_int_en  0xDD14
#define reg_ep0_tx_nak_int_en_pos 0
#define reg_ep0_tx_nak_int_en_len 1
#define reg_ep0_tx_nak_int_en_lsb 0
#define xd_p_reg_ep0_rx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
#define    p_reg_ep0_rx_nak_int_en  0xDD14
#define reg_ep0_rx_nak_int_en_pos 1
#define reg_ep0_rx_nak_int_en_len 1
#define reg_ep0_rx_nak_int_en_lsb 0
#define xd_p_reg_ep1_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
#define    p_reg_ep1_tx_nak_int_en  0xDD14
#define reg_ep1_tx_nak_int_en_pos 2
#define reg_ep1_tx_nak_int_en_len 1
#define reg_ep1_tx_nak_int_en_lsb 0
#define xd_p_reg_ep2_rx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
#define    p_reg_ep2_rx_nak_int_en  0xDD14
#define reg_ep2_rx_nak_int_en_pos 3
#define reg_ep2_rx_nak_int_en_len 1
#define reg_ep2_rx_nak_int_en_lsb 0
#define xd_p_reg_ep3_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
#define    p_reg_ep3_tx_nak_int_en  0xDD14
#define reg_ep3_tx_nak_int_en_pos 4
#define reg_ep3_tx_nak_int_en_len 1
#define reg_ep3_tx_nak_int_en_lsb 0
#define xd_p_reg_ep4_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
#define    p_reg_ep4_tx_nak_int_en  0xDD14
#define reg_ep4_tx_nak_int_en_pos 5
#define reg_ep4_tx_nak_int_en_len 1
#define reg_ep4_tx_nak_int_en_lsb 0
#define xd_p_reg_ep5_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
#define    p_reg_ep5_tx_nak_int_en  0xDD14
#define reg_ep5_tx_nak_int_en_pos 6
#define reg_ep5_tx_nak_int_en_len 1
#define reg_ep5_tx_nak_int_en_lsb 0
#define xd_p_reg_ep6_tx_nak_int_en  (*(volatile byte xdata *) 0xDD14)
#define    p_reg_ep6_tx_nak_int_en  0xDD14
#define reg_ep6_tx_nak_int_en_pos 7
#define reg_ep6_tx_nak_int_en_len 1
#define reg_ep6_tx_nak_int_en_lsb 0
#define xd_p_reg_ep0_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
#define    p_reg_ep0_tx_done_int_en 0xDD15
#define reg_ep0_tx_done_int_en_pos 0
#define reg_ep0_tx_done_int_en_len 1
#define reg_ep0_tx_done_int_en_lsb 0
#define xd_p_reg_ep0_rx_done_int_en (*(volatile byte xdata *) 0xDD15)
#define    p_reg_ep0_rx_done_int_en 0xDD15
#define reg_ep0_rx_done_int_en_pos 1
#define reg_ep0_rx_done_int_en_len 1
#define reg_ep0_rx_done_int_en_lsb 0
#define xd_p_reg_ep1_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
#define    p_reg_ep1_tx_done_int_en 0xDD15
#define reg_ep1_tx_done_int_en_pos 2
#define reg_ep1_tx_done_int_en_len 1
#define reg_ep1_tx_done_int_en_lsb 0
#define xd_p_reg_ep2_rx_done_int_en (*(volatile byte xdata *) 0xDD15)
#define    p_reg_ep2_rx_done_int_en 0xDD15
#define reg_ep2_rx_done_int_en_pos 3
#define reg_ep2_rx_done_int_en_len 1
#define reg_ep2_rx_done_int_en_lsb 0
#define xd_p_reg_ep3_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
#define    p_reg_ep3_tx_done_int_en 0xDD15
#define reg_ep3_tx_done_int_en_pos 4
#define reg_ep3_tx_done_int_en_len 1
#define reg_ep3_tx_done_int_en_lsb 0
#define xd_p_reg_ep4_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
#define    p_reg_ep4_tx_done_int_en 0xDD15
#define reg_ep4_tx_done_int_en_pos 5
#define reg_ep4_tx_done_int_en_len 1
#define reg_ep4_tx_done_int_en_lsb 0
#define xd_p_reg_ep5_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
#define    p_reg_ep5_tx_done_int_en 0xDD15
#define reg_ep5_tx_done_int_en_pos 6
#define reg_ep5_tx_done_int_en_len 1
#define reg_ep5_tx_done_int_en_lsb 0
#define xd_p_reg_ep6_tx_done_int_en (*(volatile byte xdata *) 0xDD15)
#define    p_reg_ep6_tx_done_int_en 0xDD15
#define reg_ep6_tx_done_int_en_pos 7
#define reg_ep6_tx_done_int_en_len 1
#define reg_ep6_tx_done_int_en_lsb 0
#define xd_p_reg_ep0_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
#define    p_reg_ep0_tx_fail_int_en 0xDD16
#define reg_ep0_tx_fail_int_en_pos 0
#define reg_ep0_tx_fail_int_en_len 1
#define reg_ep0_tx_fail_int_en_lsb 0
#define xd_p_reg_ep0_rx_fail_int_en (*(volatile byte xdata *) 0xDD16)
#define    p_reg_ep0_rx_fail_int_en 0xDD16
#define reg_ep0_rx_fail_int_en_pos 1
#define reg_ep0_rx_fail_int_en_len 1
#define reg_ep0_rx_fail_int_en_lsb 0
#define xd_p_reg_ep1_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
#define    p_reg_ep1_tx_fail_int_en 0xDD16
#define reg_ep1_tx_fail_int_en_pos 2
#define reg_ep1_tx_fail_int_en_len 1
#define reg_ep1_tx_fail_int_en_lsb 0
#define xd_p_reg_ep2_rx_fail_int_en (*(volatile byte xdata *) 0xDD16)
#define    p_reg_ep2_rx_fail_int_en 0xDD16
#define reg_ep2_rx_fail_int_en_pos 3
#define reg_ep2_rx_fail_int_en_len 1
#define reg_ep2_rx_fail_int_en_lsb 0
#define xd_p_reg_ep3_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
#define    p_reg_ep3_tx_fail_int_en 0xDD16
#define reg_ep3_tx_fail_int_en_pos 4
#define reg_ep3_tx_fail_int_en_len 1
#define reg_ep3_tx_fail_int_en_lsb 0
#define xd_p_reg_ep4_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
#define    p_reg_ep4_tx_fail_int_en 0xDD16
#define reg_ep4_tx_fail_int_en_pos 5
#define reg_ep4_tx_fail_int_en_len 1
#define reg_ep4_tx_fail_int_en_lsb 0
#define xd_p_reg_ep5_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
#define    p_reg_ep5_tx_fail_int_en 0xDD16
#define reg_ep5_tx_fail_int_en_pos 6
#define reg_ep5_tx_fail_int_en_len 1
#define reg_ep5_tx_fail_int_en_lsb 0
#define xd_p_reg_ep6_tx_fail_int_en (*(volatile byte xdata *) 0xDD16)
#define    p_reg_ep6_tx_fail_int_en 0xDD16
#define reg_ep6_tx_fail_int_en_pos 7
#define reg_ep6_tx_fail_int_en_len 1
#define reg_ep6_tx_fail_int_en_lsb 0
#define xd_p_reg_suspend_int_en (*(volatile byte xdata *) 0xDD17)
#define    p_reg_suspend_int_en 0xDD17
#define reg_suspend_int_en_pos 0
#define reg_suspend_int_en_len 1
#define reg_suspend_int_en_lsb 0
#define xd_p_reg_bus_reset_int_en   (*(volatile byte xdata *) 0xDD17)
#define    p_reg_bus_reset_int_en   0xDD17
#define reg_bus_reset_int_en_pos 1
#define reg_bus_reset_int_en_len 1
#define reg_bus_reset_int_en_lsb 0
#define xd_p_reg_ep0_setup_int_en   (*(volatile byte xdata *) 0xDD17)
#define    p_reg_ep0_setup_int_en   0xDD17
#define reg_ep0_setup_int_en_pos 2
#define reg_ep0_setup_int_en_len 1
#define reg_ep0_setup_int_en_lsb 0
#define xd_p_reg_ep0_tx_nak_int (*(volatile byte xdata *) 0xDD18)
#define    p_reg_ep0_tx_nak_int 0xDD18
#define reg_ep0_tx_nak_int_pos 0
#define reg_ep0_tx_nak_int_len 1
#define reg_ep0_tx_nak_int_lsb 0
#define xd_p_reg_ep0_rx_nak_int (*(volatile byte xdata *) 0xDD18)
#define    p_reg_ep0_rx_nak_int 0xDD18
#define reg_ep0_rx_nak_int_pos 1
#define reg_ep0_rx_nak_int_len 1
#define reg_ep0_rx_nak_int_lsb 0
#define xd_p_reg_ep1_tx_nak_int (*(volatile byte xdata *) 0xDD18)
#define    p_reg_ep1_tx_nak_int 0xDD18
#define reg_ep1_tx_nak_int_pos 2
#define reg_ep1_tx_nak_int_len 1
#define reg_ep1_tx_nak_int_lsb 0
#define xd_p_reg_ep2_rx_nak_int (*(volatile byte xdata *) 0xDD18)
#define    p_reg_ep2_rx_nak_int 0xDD18
#define reg_ep2_rx_nak_int_pos 3
#define reg_ep2_rx_nak_int_len 1
#define reg_ep2_rx_nak_int_lsb 0
#define xd_p_reg_ep3_tx_nak_int (*(volatile byte xdata *) 0xDD18)
#define    p_reg_ep3_tx_nak_int 0xDD18
#define reg_ep3_tx_nak_int_pos 4
#define reg_ep3_tx_nak_int_len 1
#define reg_ep3_tx_nak_int_lsb 0
#define xd_p_reg_ep4_tx_nak_int (*(volatile byte xdata *) 0xDD18)
#define    p_reg_ep4_tx_nak_int 0xDD18
#define reg_ep4_tx_nak_int_pos 5
#define reg_ep4_tx_nak_int_len 1
#define reg_ep4_tx_nak_int_lsb 0
#define xd_p_reg_ep5_tx_nak_int (*(volatile byte xdata *) 0xDD18)
#define    p_reg_ep5_tx_nak_int 0xDD18
#define reg_ep5_tx_nak_int_pos 6
#define reg_ep5_tx_nak_int_len 1
#define reg_ep5_tx_nak_int_lsb 0
#define xd_p_reg_ep6_tx_nak_int (*(volatile byte xdata *) 0xDD18)
#define    p_reg_ep6_tx_nak_int 0xDD18
#define reg_ep6_tx_nak_int_pos 7
#define reg_ep6_tx_nak_int_len 1
#define reg_ep6_tx_nak_int_lsb 0
#define xd_p_reg_ep0_tx_done_int    (*(volatile byte xdata *) 0xDD19)
#define    p_reg_ep0_tx_done_int    0xDD19
#define reg_ep0_tx_done_int_pos 0
#define reg_ep0_tx_done_int_len 1
#define reg_ep0_tx_done_int_lsb 0
#define xd_p_reg_ep0_rx_done_int    (*(volatile byte xdata *) 0xDD19)
#define    p_reg_ep0_rx_done_int    0xDD19
#define reg_ep0_rx_done_int_pos 1
#define reg_ep0_rx_done_int_len 1
#define reg_ep0_rx_done_int_lsb 0
#define xd_p_reg_ep1_tx_done_int    (*(volatile byte xdata *) 0xDD19)
#define    p_reg_ep1_tx_done_int    0xDD19
#define reg_ep1_tx_done_int_pos 2
#define reg_ep1_tx_done_int_len 1
#define reg_ep1_tx_done_int_lsb 0
#define xd_p_reg_ep2_rx_done_int    (*(volatile byte xdata *) 0xDD19)
#define    p_reg_ep2_rx_done_int    0xDD19
#define reg_ep2_rx_done_int_pos 3
#define reg_ep2_rx_done_int_len 1
#define reg_ep2_rx_done_int_lsb 0
#define xd_p_reg_ep3_tx_done_int    (*(volatile byte xdata *) 0xDD19)
#define    p_reg_ep3_tx_done_int    0xDD19
#define reg_ep3_tx_done_int_pos 4
#define reg_ep3_tx_done_int_len 1
#define reg_ep3_tx_done_int_lsb 0
#define xd_p_reg_ep4_tx_done_int    (*(volatile byte xdata *) 0xDD19)
#define    p_reg_ep4_tx_done_int    0xDD19
#define reg_ep4_tx_done_int_pos 5
#define reg_ep4_tx_done_int_len 1
#define reg_ep4_tx_done_int_lsb 0
#define xd_p_reg_ep5_tx_done_int    (*(volatile byte xdata *) 0xDD19)
#define    p_reg_ep5_tx_done_int    0xDD19
#define reg_ep5_tx_done_int_pos 6
#define reg_ep5_tx_done_int_len 1
#define reg_ep5_tx_done_int_lsb 0
#define xd_p_reg_ep6_tx_done_int    (*(volatile byte xdata *) 0xDD19)
#define    p_reg_ep6_tx_done_int    0xDD19
#define reg_ep6_tx_done_int_pos 7
#define reg_ep6_tx_done_int_len 1
#define reg_ep6_tx_done_int_lsb 0
#define xd_p_reg_ep0_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
#define    p_reg_ep0_tx_fail_int    0xDD1A
#define reg_ep0_tx_fail_int_pos 0
#define reg_ep0_tx_fail_int_len 1
#define reg_ep0_tx_fail_int_lsb 0
#define xd_p_reg_ep0_rx_fail_int    (*(volatile byte xdata *) 0xDD1A)
#define    p_reg_ep0_rx_fail_int    0xDD1A
#define reg_ep0_rx_fail_int_pos 1
#define reg_ep0_rx_fail_int_len 1
#define reg_ep0_rx_fail_int_lsb 0
#define xd_p_reg_ep1_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
#define    p_reg_ep1_tx_fail_int    0xDD1A
#define reg_ep1_tx_fail_int_pos 2
#define reg_ep1_tx_fail_int_len 1
#define reg_ep1_tx_fail_int_lsb 0
#define xd_p_reg_ep2_rx_fail_int    (*(volatile byte xdata *) 0xDD1A)
#define    p_reg_ep2_rx_fail_int    0xDD1A
#define reg_ep2_rx_fail_int_pos 3
#define reg_ep2_rx_fail_int_len 1
#define reg_ep2_rx_fail_int_lsb 0
#define xd_p_reg_ep3_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
#define    p_reg_ep3_tx_fail_int    0xDD1A
#define reg_ep3_tx_fail_int_pos 4
#define reg_ep3_tx_fail_int_len 1
#define reg_ep3_tx_fail_int_lsb 0
#define xd_p_reg_ep4_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
#define    p_reg_ep4_tx_fail_int    0xDD1A
#define reg_ep4_tx_fail_int_pos 5
#define reg_ep4_tx_fail_int_len 1
#define reg_ep4_tx_fail_int_lsb 0
#define xd_p_reg_ep5_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
#define    p_reg_ep5_tx_fail_int    0xDD1A
#define reg_ep5_tx_fail_int_pos 6
#define reg_ep5_tx_fail_int_len 1
#define reg_ep5_tx_fail_int_lsb 0
#define xd_p_reg_ep6_tx_fail_int    (*(volatile byte xdata *) 0xDD1A)
#define    p_reg_ep6_tx_fail_int    0xDD1A
#define reg_ep6_tx_fail_int_pos 7
#define reg_ep6_tx_fail_int_len 1
#define reg_ep6_tx_fail_int_lsb 0
#define xd_p_reg_suspend_int    (*(volatile byte xdata *) 0xDD1B)
#define    p_reg_suspend_int    0xDD1B
#define reg_suspend_int_pos 0
#define reg_suspend_int_len 1
#define reg_suspend_int_lsb 0
#define xd_p_reg_bus_reset_int  (*(volatile byte xdata *) 0xDD1B)
#define    p_reg_bus_reset_int  0xDD1B
#define reg_bus_reset_int_pos 1
#define reg_bus_reset_int_len 1
#define reg_bus_reset_int_lsb 0
#define xd_p_reg_ep0_setup_int  (*(volatile byte xdata *) 0xDD1B)
#define    p_reg_ep0_setup_int  0xDD1B
#define reg_ep0_setup_int_pos 2
#define reg_ep0_setup_int_len 1
#define reg_ep0_setup_int_lsb 0
#define xd_r_usbc_int   (*(volatile byte xdata *) 0xDD1B)
#define    r_usbc_int   0xDD1B
#define usbc_int_pos 3
#define usbc_int_len 1
#define usbc_int_lsb 0
#define xd_r_usb_ir_int (*(volatile byte xdata *) 0xDD1B)
#define    r_usb_ir_int 0xDD1B
#define usb_ir_int_pos 4
#define usb_ir_int_len 1
#define usb_ir_int_lsb 0
#define xd_p_reg_ep0_tx_rst (*(volatile byte xdata *) 0xDD1D)
#define    p_reg_ep0_tx_rst 0xDD1D
#define reg_ep0_tx_rst_pos 0
#define reg_ep0_tx_rst_len 1
#define reg_ep0_tx_rst_lsb 0
#define xd_p_reg_ep0_rx_rst (*(volatile byte xdata *) 0xDD1D)
#define    p_reg_ep0_rx_rst 0xDD1D
#define reg_ep0_rx_rst_pos 1
#define reg_ep0_rx_rst_len 1
#define reg_ep0_rx_rst_lsb 0
#define xd_p_reg_ep1_tx_rst (*(volatile byte xdata *) 0xDD1D)
#define    p_reg_ep1_tx_rst 0xDD1D
#define reg_ep1_tx_rst_pos 2
#define reg_ep1_tx_rst_len 1
#define reg_ep1_tx_rst_lsb 0
#define xd_p_reg_ep2_rx_rst (*(volatile byte xdata *) 0xDD1D)
#define    p_reg_ep2_rx_rst 0xDD1D
#define reg_ep2_rx_rst_pos 3
#define reg_ep2_rx_rst_len 1
#define reg_ep2_rx_rst_lsb 0
#define xd_p_reg_ep3_tx_rst (*(volatile byte xdata *) 0xDD1D)
#define    p_reg_ep3_tx_rst 0xDD1D
#define reg_ep3_tx_rst_pos 4
#define reg_ep3_tx_rst_len 1
#define reg_ep3_tx_rst_lsb 0
#define xd_p_reg_ep4_tx_rst (*(volatile byte xdata *) 0xDD1D)
#define    p_reg_ep4_tx_rst 0xDD1D
#define reg_ep4_tx_rst_pos 5
#define reg_ep4_tx_rst_len 1
#define reg_ep4_tx_rst_lsb 0
#define xd_p_reg_ep5_tx_rst (*(volatile byte xdata *) 0xDD1D)
#define    p_reg_ep5_tx_rst 0xDD1D
#define reg_ep5_tx_rst_pos 6
#define reg_ep5_tx_rst_len 1
#define reg_ep5_tx_rst_lsb 0
#define xd_p_reg_ep6_tx_rst (*(volatile byte xdata *) 0xDD1D)
#define    p_reg_ep6_tx_rst 0xDD1D
#define reg_ep6_tx_rst_pos 7
#define reg_ep6_tx_rst_len 1
#define reg_ep6_tx_rst_lsb 0
#define xd_r_reg_ep0_tx_active  (*(volatile byte xdata *) 0xDD1E)
#define    r_reg_ep0_tx_active  0xDD1E
#define reg_ep0_tx_active_pos 0
#define reg_ep0_tx_active_len 1
#define reg_ep0_tx_active_lsb 0
#define xd_r_reg_ep0_rx_active  (*(volatile byte xdata *) 0xDD1E)
#define    r_reg_ep0_rx_active  0xDD1E
#define reg_ep0_rx_active_pos 1
#define reg_ep0_rx_active_len 1
#define reg_ep0_rx_active_lsb 0
#define xd_r_reg_ep1_tx_active  (*(volatile byte xdata *) 0xDD1E)
#define    r_reg_ep1_tx_active  0xDD1E
#define reg_ep1_tx_active_pos 2
#define reg_ep1_tx_active_len 1
#define reg_ep1_tx_active_lsb 0
#define xd_r_reg_ep2_rx_active  (*(volatile byte xdata *) 0xDD1E)
#define    r_reg_ep2_rx_active  0xDD1E
#define reg_ep2_rx_active_pos 3
#define reg_ep2_rx_active_len 1
#define reg_ep2_rx_active_lsb 0
#define xd_r_reg_ep3_tx_active  (*(volatile byte xdata *) 0xDD1E)
#define    r_reg_ep3_tx_active  0xDD1E
#define reg_ep3_tx_active_pos 4
#define reg_ep3_tx_active_len 1
#define reg_ep3_tx_active_lsb 0
#define xd_r_reg_ep4_tx_active  (*(volatile byte xdata *) 0xDD1E)
#define    r_reg_ep4_tx_active  0xDD1E
#define reg_ep4_tx_active_pos 5
#define reg_ep4_tx_active_len 1
#define reg_ep4_tx_active_lsb 0
#define xd_r_reg_ep5_tx_active  (*(volatile byte xdata *) 0xDD1E)
#define    r_reg_ep5_tx_active  0xDD1E
#define reg_ep5_tx_active_pos 6
#define reg_ep5_tx_active_len 1
#define reg_ep5_tx_active_lsb 0
#define xd_r_reg_ep6_tx_active  (*(volatile byte xdata *) 0xDD1E)
#define    r_reg_ep6_tx_active  0xDD1E
#define reg_ep6_tx_active_pos 7
#define reg_ep6_tx_active_len 1
#define reg_ep6_tx_active_lsb 0
#define xd_p_reg_usb_setup_reset    (*(volatile byte xdata *) 0xDD1F)
#define    p_reg_usb_setup_reset    0xDD1F
#define reg_usb_setup_reset_pos 0
#define reg_usb_setup_reset_len 1
#define reg_usb_setup_reset_lsb 0
#define xd_p_reg_usb_ep4_retry_new  (*(volatile byte xdata *) 0xDD1F)
#define    p_reg_usb_ep4_retry_new  0xDD1F
#define reg_usb_ep4_retry_new_pos 1
#define reg_usb_ep4_retry_new_len 1
#define reg_usb_ep4_retry_new_lsb 0
#define xd_p_reg_usb_ep5_retry_new  (*(volatile byte xdata *) 0xDD1F)
#define    p_reg_usb_ep5_retry_new  0xDD1F
#define reg_usb_ep5_retry_new_pos 2
#define reg_usb_ep5_retry_new_len 1
#define reg_usb_ep5_retry_new_lsb 0
#define xd_p_reg_usb_ep6_retry_new  (*(volatile byte xdata *) 0xDD1F)
#define    p_reg_usb_ep6_retry_new  0xDD1F
#define reg_usb_ep6_retry_new_pos 3
#define reg_usb_ep6_retry_new_len 1
#define reg_usb_ep6_retry_new_lsb 0
#define xd_p_reg_usb_iso_mult_cnt   (*(volatile byte xdata *) 0xDD20)
#define    p_reg_usb_iso_mult_cnt   0xDD20
#define reg_usb_iso_mult_cnt_pos 0
#define reg_usb_iso_mult_cnt_len 2
#define reg_usb_iso_mult_cnt_lsb 0
#define xd_p_reg_p_iso_fix_en   (*(volatile byte xdata *) 0xDD21)
#define    p_reg_p_iso_fix_en   0xDD21
#define reg_p_iso_fix_en_pos 0
#define reg_p_iso_fix_en_len 1
#define reg_p_iso_fix_en_lsb 0
#define xd_p_reg_p_iso_fix_rst  (*(volatile byte xdata *) 0xDD22)
#define    p_reg_p_iso_fix_rst  0xDD22
#define reg_p_iso_fix_rst_pos 0
#define reg_p_iso_fix_rst_len 1
#define reg_p_iso_fix_rst_lsb 0
#define xd_p_reg_p_read_point_7_0   (*(volatile byte xdata *) 0xDD23)
#define    p_reg_p_read_point_7_0   0xDD23
#define reg_p_read_point_7_0_pos 0
#define reg_p_read_point_7_0_len 8
#define reg_p_read_point_7_0_lsb 0
#define xd_p_reg_p_read_point_11_8  (*(volatile byte xdata *) 0xDD24)
#define    p_reg_p_read_point_11_8  0xDD24
#define reg_p_read_point_11_8_pos 0
#define reg_p_read_point_11_8_len 4
#define reg_p_read_point_11_8_lsb 8
#define xd_p_reg_p_dbg_ctrl (*(volatile byte xdata *) 0xDD25)
#define    p_reg_p_dbg_ctrl 0xDD25
#define reg_p_dbg_ctrl_pos 0
#define reg_p_dbg_ctrl_len 3
#define reg_p_dbg_ctrl_lsb 0
#define xd_p_reg_p_data_swap    (*(volatile byte xdata *) 0xDD26)
#define    p_reg_p_data_swap    0xDD26
#define reg_p_data_swap_pos 0
#define reg_p_data_swap_len 2
#define reg_p_data_swap_lsb 0
#define xd_p_reg_ep_rx_addr (*(volatile byte xdata *) 0xDD80)
#define    p_reg_ep_rx_addr 0xDD80
#define reg_ep_rx_addr_pos 2
#define reg_ep_rx_addr_len 6
#define reg_ep_rx_addr_lsb 0
#define xd_p_reg_ep0_tx_addr    (*(volatile byte xdata *) 0xDD81)
#define    p_reg_ep0_tx_addr    0xDD81
#define reg_ep0_tx_addr_pos 2
#define reg_ep0_tx_addr_len 6
#define reg_ep0_tx_addr_lsb 0
#define xd_p_reg_ep1_tx_addr    (*(volatile byte xdata *) 0xDD82)
#define    p_reg_ep1_tx_addr    0xDD82
#define reg_ep1_tx_addr_pos 2
#define reg_ep1_tx_addr_len 6
#define reg_ep1_tx_addr_lsb 0
#define xd_p_reg_ep3_tx_addr    (*(volatile byte xdata *) 0xDD83)
#define    p_reg_ep3_tx_addr    0xDD83
#define reg_ep3_tx_addr_pos 2
#define reg_ep3_tx_addr_len 6
#define reg_ep3_tx_addr_lsb 0
#define xd_p_reg_ep_rx_len  (*(volatile byte xdata *) 0xDD84)
#define    p_reg_ep_rx_len  0xDD84
#define reg_ep_rx_len_pos 0
#define reg_ep_rx_len_len 8
#define reg_ep_rx_len_lsb 0
#define xd_p_reg_ep0_tx_len (*(volatile byte xdata *) 0xDD85)
#define    p_reg_ep0_tx_len 0xDD85
#define reg_ep0_tx_len_pos 0
#define reg_ep0_tx_len_len 8
#define reg_ep0_tx_len_lsb 0
#define xd_p_reg_ep1_tx_len (*(volatile byte xdata *) 0xDD86)
#define    p_reg_ep1_tx_len 0xDD86
#define reg_ep1_tx_len_pos 0
#define reg_ep1_tx_len_len 8
#define reg_ep1_tx_len_lsb 0
#define xd_p_reg_ep3_tx_len (*(volatile byte xdata *) 0xDD87)
#define    p_reg_ep3_tx_len 0xDD87
#define reg_ep3_tx_len_pos 0
#define reg_ep3_tx_len_len 8
#define reg_ep3_tx_len_lsb 0
#define xd_p_reg_ep4_tx_len_7_0 (*(volatile byte xdata *) 0xDD88)
#define    p_reg_ep4_tx_len_7_0 0xDD88
#define reg_ep4_tx_len_7_0_pos 0
#define reg_ep4_tx_len_7_0_len 8
#define reg_ep4_tx_len_7_0_lsb 0
#define xd_p_reg_ep4_tx_len_15_8    (*(volatile byte xdata *) 0xDD89)
#define    p_reg_ep4_tx_len_15_8    0xDD89
#define reg_ep4_tx_len_15_8_pos 0
#define reg_ep4_tx_len_15_8_len 8
#define reg_ep4_tx_len_15_8_lsb 8
#define xd_p_reg_ep5_tx_len_7_0 (*(volatile byte xdata *) 0xDD8A)
#define    p_reg_ep5_tx_len_7_0 0xDD8A
#define reg_ep5_tx_len_7_0_pos 0
#define reg_ep5_tx_len_7_0_len 8
#define reg_ep5_tx_len_7_0_lsb 0
#define xd_p_reg_ep5_tx_len_15_8    (*(volatile byte xdata *) 0xDD8B)
#define    p_reg_ep5_tx_len_15_8    0xDD8B
#define reg_ep5_tx_len_15_8_pos 0
#define reg_ep5_tx_len_15_8_len 8
#define reg_ep5_tx_len_15_8_lsb 8
#define xd_p_reg_usb_reset_addr (*(volatile byte xdata *) 0xDD8C)
#define    p_reg_usb_reset_addr 0xDD8C
#define reg_usb_reset_addr_pos 0
#define reg_usb_reset_addr_len 7
#define reg_usb_reset_addr_lsb 0
#define xd_p_reg_usb_reset  (*(volatile byte xdata *) 0xDD8C)
#define    p_reg_usb_reset  0xDD8C
#define reg_usb_reset_pos 7
#define reg_usb_reset_len 1
#define reg_usb_reset_lsb 0
#define xd_p_reg_usb_sync_in    (*(volatile byte xdata *) 0xDD8D)
#define    p_reg_usb_sync_in    0xDD8D
#define reg_usb_sync_in_pos 0
#define reg_usb_sync_in_len 1
#define reg_usb_sync_in_lsb 0
#define xd_p_reg_usb_sync_txready   (*(volatile byte xdata *) 0xDD8D)
#define    p_reg_usb_sync_txready   0xDD8D
#define reg_usb_sync_txready_pos 1
#define reg_usb_sync_txready_len 1
#define reg_usb_sync_txready_lsb 0
#define xd_p_reg_utmi_phy_suspend   (*(volatile byte xdata *) 0xDD8D)
#define    p_reg_utmi_phy_suspend   0xDD8D
#define reg_utmi_phy_suspend_pos 2
#define reg_utmi_phy_suspend_len 1
#define reg_utmi_phy_suspend_lsb 0
#define xd_p_reg_usb_min_len    (*(volatile byte xdata *) 0xDD8D)
#define    p_reg_usb_min_len    0xDD8D
#define reg_usb_min_len_pos 3
#define reg_usb_min_len_len 1
#define reg_usb_min_len_lsb 0
#define xd_p_reg_usb_phy_clksel (*(volatile byte xdata *) 0xDD8D)
#define    p_reg_usb_phy_clksel 0xDD8D
#define reg_usb_phy_clksel_pos 4
#define reg_usb_phy_clksel_len 1
#define reg_usb_phy_clksel_lsb 0
#define xd_p_reg_ep6_tx_len_7_0 (*(volatile byte xdata *) 0xDD8E)
#define    p_reg_ep6_tx_len_7_0 0xDD8E
#define reg_ep6_tx_len_7_0_pos 0
#define reg_ep6_tx_len_7_0_len 8
#define reg_ep6_tx_len_7_0_lsb 0
#define xd_p_reg_ep6_tx_len_15_8    (*(volatile byte xdata *) 0xDD8F)
#define    p_reg_ep6_tx_len_15_8    0xDD8F
#define reg_ep6_tx_len_15_8_pos 0
#define reg_ep6_tx_len_15_8_len 8
#define reg_ep6_tx_len_15_8_lsb 8
#define xd_p_reg_usb_clk_phase  (*(volatile byte xdata *) 0xDD93)
#define    p_reg_usb_clk_phase  0xDD93
#define reg_usb_clk_phase_pos 0
#define reg_usb_clk_phase_len 2
#define reg_usb_clk_phase_lsb 0
#define xd_p_reg_usb_clk_sel    (*(volatile byte xdata *) 0xDD93)
#define    p_reg_usb_clk_sel    0xDD93
#define reg_usb_clk_sel_pos 4
#define reg_usb_clk_sel_len 4
#define reg_usb_clk_sel_lsb 0
#define xd_p_reg_usb_fifo_ptr   (*(volatile byte xdata *) 0xDD94)
#define    p_reg_usb_fifo_ptr   0xDD94
#define reg_usb_fifo_ptr_pos 0
#define reg_usb_fifo_ptr_len 3
#define reg_usb_fifo_ptr_lsb 0
#define xd_p_reg_usb_fifo_byte  (*(volatile byte xdata *) 0xDD94)
#define    p_reg_usb_fifo_byte  0xDD94
#define reg_usb_fifo_byte_pos 3
#define reg_usb_fifo_byte_len 2
#define reg_usb_fifo_byte_lsb 0
#define xd_p_reg_usb_fifo_sys   (*(volatile byte xdata *) 0xDD94)
#define    p_reg_usb_fifo_sys   0xDD94
#define reg_usb_fifo_sys_pos 5
#define reg_usb_fifo_sys_len 1
#define reg_usb_fifo_sys_lsb 0
#define xd_p_usbdma_utmi_d_ctl_7_0  (*(volatile byte xdata *) 0xDD9E)
#define    p_usbdma_utmi_d_ctl_7_0  0xDD9E
#define usbdma_utmi_d_ctl_7_0_pos 0
#define usbdma_utmi_d_ctl_7_0_len 8
#define usbdma_utmi_d_ctl_7_0_lsb 0
#define xd_p_usbdma_utmi_d_ctl_13_8 (*(volatile byte xdata *) 0xDD9F)
#define    p_usbdma_utmi_d_ctl_13_8 0xDD9F
#define usbdma_utmi_d_ctl_13_8_pos 0
#define usbdma_utmi_d_ctl_13_8_len 6
#define usbdma_utmi_d_ctl_13_8_lsb 8
#define xd_p_usbdma_utmi_a_ctl_7_0  (*(volatile byte xdata *) 0xDDA0)
#define    p_usbdma_utmi_a_ctl_7_0  0xDDA0
#define usbdma_utmi_a_ctl_7_0_pos 0
#define usbdma_utmi_a_ctl_7_0_len 8
#define usbdma_utmi_a_ctl_7_0_lsb 0
#define xd_p_usbdma_utmi_a_ctl_15_8 (*(volatile byte xdata *) 0xDDA1)
#define    p_usbdma_utmi_a_ctl_15_8 0xDDA1
#define usbdma_utmi_a_ctl_15_8_pos 0
#define usbdma_utmi_a_ctl_15_8_len 8
#define usbdma_utmi_a_ctl_15_8_lsb 8
#define xd_p_usbdma_utmi_a_ctl_23_16    (*(volatile byte xdata *) 0xDDA2)
#define    p_usbdma_utmi_a_ctl_23_16    0xDDA2
#define usbdma_utmi_a_ctl_23_16_pos 0
#define usbdma_utmi_a_ctl_23_16_len 8
#define usbdma_utmi_a_ctl_23_16_lsb 16
#define xd_p_usbdma_utmi_a_ctl_31_24    (*(volatile byte xdata *) 0xDDA3)
#define    p_usbdma_utmi_a_ctl_31_24    0xDDA3
#define usbdma_utmi_a_ctl_31_24_pos 0
#define usbdma_utmi_a_ctl_31_24_len 8
#define usbdma_utmi_a_ctl_31_24_lsb 24
#define xd_p_usbdma_utmi_a_ctl_39_32    (*(volatile byte xdata *) 0xDDA4)
#define    p_usbdma_utmi_a_ctl_39_32    0xDDA4
#define usbdma_utmi_a_ctl_39_32_pos 0
#define usbdma_utmi_a_ctl_39_32_len 8
#define usbdma_utmi_a_ctl_39_32_lsb 32
#define xd_p_usbdma_utmi_a_ctl_47_40    (*(volatile byte xdata *) 0xDDA5)
#define    p_usbdma_utmi_a_ctl_47_40    0xDDA5
#define usbdma_utmi_a_ctl_47_40_pos 0
#define usbdma_utmi_a_ctl_47_40_len 8
#define usbdma_utmi_a_ctl_47_40_lsb 40
#define xd_p_usbdma_utmi_pwrmode    (*(volatile byte xdata *) 0xDDA6)
#define    p_usbdma_utmi_pwrmode    0xDDA6
#define usbdma_utmi_pwrmode_pos 3
#define usbdma_utmi_pwrmode_len 1
#define usbdma_utmi_pwrmode_lsb 0
#define xd_p_usbdma_utmi_test_out   (*(volatile byte xdata *) 0xDDA6)
#define    p_usbdma_utmi_test_out   0xDDA6
#define usbdma_utmi_test_out_pos 4
#define usbdma_utmi_test_out_len 1
#define usbdma_utmi_test_out_lsb 0
#define xd_p_usbdma_utmi_vbus_int_en    (*(volatile byte xdata *) 0xDDA7)
#define    p_usbdma_utmi_vbus_int_en    0xDDA7
#define usbdma_utmi_vbus_int_en_pos 0
#define usbdma_utmi_vbus_int_en_len 1
#define usbdma_utmi_vbus_int_en_lsb 0
#define xd_p_usbdma_utmi_vbus_int_pol   (*(volatile byte xdata *) 0xDDA7)
#define    p_usbdma_utmi_vbus_int_pol   0xDDA7
#define usbdma_utmi_vbus_int_pol_pos 1
#define usbdma_utmi_vbus_int_pol_len 1
#define usbdma_utmi_vbus_int_pol_lsb 0
#define xd_r_usbdma_utmi_vbus_int   (*(volatile byte xdata *) 0xDDA8)
#define    r_usbdma_utmi_vbus_int   0xDDA8
#define usbdma_utmi_vbus_int_pos 0
#define usbdma_utmi_vbus_int_len 1
#define usbdma_utmi_vbus_int_lsb 0
#define xd_r_usbdma_utmi_vbus_status    (*(volatile byte xdata *) 0xDDA8)
#define    r_usbdma_utmi_vbus_status    0xDDA8
#define usbdma_utmi_vbus_status_pos 1
#define usbdma_utmi_vbus_status_len 1
#define usbdma_utmi_vbus_status_lsb 0
#define xd_r_usbdma_utmi_clkrdy (*(volatile byte xdata *) 0xDDA8)
#define    r_usbdma_utmi_clkrdy 0xDDA8
#define usbdma_utmi_clkrdy_pos 2
#define usbdma_utmi_clkrdy_len 1
#define usbdma_utmi_clkrdy_lsb 0
#define xd_p_reg_p_usb_iso_ccir_rst (*(volatile byte xdata *) 0xDDA9)
#define    p_reg_p_usb_iso_ccir_rst 0xDDA9
#define reg_p_usb_iso_ccir_rst_pos 0
#define reg_p_usb_iso_ccir_rst_len 1
#define reg_p_usb_iso_ccir_rst_lsb 0
#define xd_p_reg_p_usb_iso_ccir (*(volatile byte xdata *) 0xDDA9)
#define    p_reg_p_usb_iso_ccir 0xDDA9
#define reg_p_usb_iso_ccir_pos 1
#define reg_p_usb_iso_ccir_len 1
#define reg_p_usb_iso_ccir_lsb 0
#define xd_p_reg_p_ccir_fix_en  (*(volatile byte xdata *) 0xDDAA)
#define    p_reg_p_ccir_fix_en  0xDDAA
#define reg_p_ccir_fix_en_pos 0
#define reg_p_ccir_fix_en_len 1
#define reg_p_ccir_fix_en_lsb 0
#define xd_p_ir_sys_clk (*(volatile byte xdata *) 0xDF80)
#define    p_ir_sys_clk 0xDF80
#define ir_sys_clk_pos 0
#define ir_sys_clk_len 8
#define ir_sys_clk_lsb 0
#define xd_p_ir_sample_clk  (*(volatile byte xdata *) 0xDF81)
#define    p_ir_sample_clk  0xDF81
#define ir_sample_clk_pos 0
#define ir_sample_clk_len 2
#define ir_sample_clk_lsb 0
#define xd_p_ir_idle_polarity   (*(volatile byte xdata *) 0xDF81)
#define    p_ir_idle_polarity   0xDF81
#define ir_idle_polarity_pos 2
#define ir_idle_polarity_len 1
#define ir_idle_polarity_lsb 0
#define xd_p_ir_fifo_ovfl   (*(volatile byte xdata *) 0xDF82)
#define    p_ir_fifo_ovfl   0xDF82
#define ir_fifo_ovfl_pos 0
#define ir_fifo_ovfl_len 1
#define ir_fifo_ovfl_lsb 0
#define xd_r_ir_fifo_empty  (*(volatile byte xdata *) 0xDF82)
#define    r_ir_fifo_empty  0xDF82
#define ir_fifo_empty_pos 1
#define ir_fifo_empty_len 1
#define ir_fifo_empty_lsb 0
#define xd_r_ir_fifo_cnt    (*(volatile byte xdata *) 0xDF82)
#define    r_ir_fifo_cnt    0xDF82
#define ir_fifo_cnt_pos 2
#define ir_fifo_cnt_len 3
#define ir_fifo_cnt_lsb 0
#define xd_p_ir_fifo_rst    (*(volatile byte xdata *) 0xDF82)
#define    p_ir_fifo_rst    0xDF82
#define ir_fifo_rst_pos 5
#define ir_fifo_rst_len 1
#define ir_fifo_rst_lsb 0
#define xd_p_reg_ir_out_th0_7_0 (*(volatile byte xdata *) 0xDF84)
#define    p_reg_ir_out_th0_7_0 0xDF84
#define reg_ir_out_th0_7_0_pos 0
#define reg_ir_out_th0_7_0_len 8
#define reg_ir_out_th0_7_0_lsb 0
#define xd_p_reg_ir_out_th0_14_8    (*(volatile byte xdata *) 0xDF85)
#define    p_reg_ir_out_th0_14_8    0xDF85
#define reg_ir_out_th0_14_8_pos 0
#define reg_ir_out_th0_14_8_len 7
#define reg_ir_out_th0_14_8_lsb 8
#define xd_p_reg_ir_out_th1_7_0 (*(volatile byte xdata *) 0xDF86)
#define    p_reg_ir_out_th1_7_0 0xDF86
#define reg_ir_out_th1_7_0_pos 0
#define reg_ir_out_th1_7_0_len 8
#define reg_ir_out_th1_7_0_lsb 0
#define xd_p_reg_ir_out_th1_14_8    (*(volatile byte xdata *) 0xDF87)
#define    p_reg_ir_out_th1_14_8    0xDF87
#define reg_ir_out_th1_14_8_pos 0
#define reg_ir_out_th1_14_8_len 7
#define reg_ir_out_th1_14_8_lsb 8
#define xd_p_reg_ir_out_th2_7_0 (*(volatile byte xdata *) 0xDF88)
#define    p_reg_ir_out_th2_7_0 0xDF88
#define reg_ir_out_th2_7_0_pos 0
#define reg_ir_out_th2_7_0_len 8
#define reg_ir_out_th2_7_0_lsb 0
#define xd_p_reg_ir_out_th2_14_8    (*(volatile byte xdata *) 0xDF89)
#define    p_reg_ir_out_th2_14_8    0xDF89
#define reg_ir_out_th2_14_8_pos 0
#define reg_ir_out_th2_14_8_len 7
#define reg_ir_out_th2_14_8_lsb 8
#define xd_p_reg_ir_out_th3_7_0 (*(volatile byte xdata *) 0xDF8A)
#define    p_reg_ir_out_th3_7_0 0xDF8A
#define reg_ir_out_th3_7_0_pos 0
#define reg_ir_out_th3_7_0_len 8
#define reg_ir_out_th3_7_0_lsb 0
#define xd_p_reg_ir_out_th3_14_8    (*(volatile byte xdata *) 0xDF8B)
#define    p_reg_ir_out_th3_14_8    0xDF8B
#define reg_ir_out_th3_14_8_pos 0
#define reg_ir_out_th3_14_8_len 7
#define reg_ir_out_th3_14_8_lsb 8
#define xd_p_reg_ir_out_th4_7_0 (*(volatile byte xdata *) 0xDF8C)
#define    p_reg_ir_out_th4_7_0 0xDF8C
#define reg_ir_out_th4_7_0_pos 0
#define reg_ir_out_th4_7_0_len 8
#define reg_ir_out_th4_7_0_lsb 0
#define xd_p_reg_ir_out_th4_14_8    (*(volatile byte xdata *) 0xDF8D)
#define    p_reg_ir_out_th4_14_8    0xDF8D
#define reg_ir_out_th4_14_8_pos 0
#define reg_ir_out_th4_14_8_len 7
#define reg_ir_out_th4_14_8_lsb 8
#define xd_p_reg_ir_out_th5_7_0 (*(volatile byte xdata *) 0xDF8E)
#define    p_reg_ir_out_th5_7_0 0xDF8E
#define reg_ir_out_th5_7_0_pos 0
#define reg_ir_out_th5_7_0_len 8
#define reg_ir_out_th5_7_0_lsb 0
#define xd_p_reg_ir_out_th5_14_8    (*(volatile byte xdata *) 0xDF8F)
#define    p_reg_ir_out_th5_14_8    0xDF8F
#define reg_ir_out_th5_14_8_pos 0
#define reg_ir_out_th5_14_8_len 7
#define reg_ir_out_th5_14_8_lsb 8
#define xd_p_reg_ir_out_th6_7_0 (*(volatile byte xdata *) 0xDF90)
#define    p_reg_ir_out_th6_7_0 0xDF90
#define reg_ir_out_th6_7_0_pos 0
#define reg_ir_out_th6_7_0_len 8
#define reg_ir_out_th6_7_0_lsb 0
#define xd_p_reg_ir_out_th6_14_8    (*(volatile byte xdata *) 0xDF91)
#define    p_reg_ir_out_th6_14_8    0xDF91
#define reg_ir_out_th6_14_8_pos 0
#define reg_ir_out_th6_14_8_len 7
#define reg_ir_out_th6_14_8_lsb 8
#define xd_p_reg_ir_out_th7_7_0 (*(volatile byte xdata *) 0xDF92)
#define    p_reg_ir_out_th7_7_0 0xDF92
#define reg_ir_out_th7_7_0_pos 0
#define reg_ir_out_th7_7_0_len 8
#define reg_ir_out_th7_7_0_lsb 0
#define xd_p_reg_ir_out_th7_14_8    (*(volatile byte xdata *) 0xDF93)
#define    p_reg_ir_out_th7_14_8    0xDF93
#define reg_ir_out_th7_14_8_pos 0
#define reg_ir_out_th7_14_8_len 7
#define reg_ir_out_th7_14_8_lsb 8
#define xd_p_reg_ir_out_th8_7_0 (*(volatile byte xdata *) 0xDF94)
#define    p_reg_ir_out_th8_7_0 0xDF94
#define reg_ir_out_th8_7_0_pos 0
#define reg_ir_out_th8_7_0_len 8
#define reg_ir_out_th8_7_0_lsb 0
#define xd_p_reg_ir_out_th8_14_8    (*(volatile byte xdata *) 0xDF95)
#define    p_reg_ir_out_th8_14_8    0xDF95
#define reg_ir_out_th8_14_8_pos 0
#define reg_ir_out_th8_14_8_len 7
#define reg_ir_out_th8_14_8_lsb 8
#define xd_p_reg_ir_out_th9_7_0 (*(volatile byte xdata *) 0xDF96)
#define    p_reg_ir_out_th9_7_0 0xDF96
#define reg_ir_out_th9_7_0_pos 0
#define reg_ir_out_th9_7_0_len 8
#define reg_ir_out_th9_7_0_lsb 0
#define xd_p_reg_ir_out_th9_14_8    (*(volatile byte xdata *) 0xDF97)
#define    p_reg_ir_out_th9_14_8    0xDF97
#define reg_ir_out_th9_14_8_pos 0
#define reg_ir_out_th9_14_8_len 7
#define reg_ir_out_th9_14_8_lsb 8
#define xd_p_reg_ir_out_th10_7_0    (*(volatile byte xdata *) 0xDF98)
#define    p_reg_ir_out_th10_7_0    0xDF98
#define reg_ir_out_th10_7_0_pos 0
#define reg_ir_out_th10_7_0_len 8
#define reg_ir_out_th10_7_0_lsb 0
#define xd_p_reg_ir_out_th10_14_8   (*(volatile byte xdata *) 0xDF99)
#define    p_reg_ir_out_th10_14_8   0xDF99
#define reg_ir_out_th10_14_8_pos 0
#define reg_ir_out_th10_14_8_len 7
#define reg_ir_out_th10_14_8_lsb 8
#define xd_p_reg_ir_out_th11_7_0    (*(volatile byte xdata *) 0xDF9A)
#define    p_reg_ir_out_th11_7_0    0xDF9A
#define reg_ir_out_th11_7_0_pos 0
#define reg_ir_out_th11_7_0_len 8
#define reg_ir_out_th11_7_0_lsb 0
#define xd_p_reg_ir_out_th11_14_8   (*(volatile byte xdata *) 0xDF9B)
#define    p_reg_ir_out_th11_14_8   0xDF9B
#define reg_ir_out_th11_14_8_pos 0
#define reg_ir_out_th11_14_8_len 7
#define reg_ir_out_th11_14_8_lsb 8
#define xd_p_reg_ir_out_th12_7_0    (*(volatile byte xdata *) 0xDF9C)
#define    p_reg_ir_out_th12_7_0    0xDF9C
#define reg_ir_out_th12_7_0_pos 0
#define reg_ir_out_th12_7_0_len 8
#define reg_ir_out_th12_7_0_lsb 0
#define xd_p_reg_ir_out_th12_14_8   (*(volatile byte xdata *) 0xDF9D)
#define    p_reg_ir_out_th12_14_8   0xDF9D
#define reg_ir_out_th12_14_8_pos 0
#define reg_ir_out_th12_14_8_len 7
#define reg_ir_out_th12_14_8_lsb 8
#define xd_p_reg_ir_out_th13_7_0    (*(volatile byte xdata *) 0xDF9E)
#define    p_reg_ir_out_th13_7_0    0xDF9E
#define reg_ir_out_th13_7_0_pos 0
#define reg_ir_out_th13_7_0_len 8
#define reg_ir_out_th13_7_0_lsb 0
#define xd_p_reg_ir_out_th13_14_8   (*(volatile byte xdata *) 0xDF9F)
#define    p_reg_ir_out_th13_14_8   0xDF9F
#define reg_ir_out_th13_14_8_pos 0
#define reg_ir_out_th13_14_8_len 7
#define reg_ir_out_th13_14_8_lsb 8
#define xd_p_reg_ir_out_th14_7_0    (*(volatile byte xdata *) 0xDFA0)
#define    p_reg_ir_out_th14_7_0    0xDFA0
#define reg_ir_out_th14_7_0_pos 0
#define reg_ir_out_th14_7_0_len 8
#define reg_ir_out_th14_7_0_lsb 0
#define xd_p_reg_ir_out_th14_14_8   (*(volatile byte xdata *) 0xDFA1)
#define    p_reg_ir_out_th14_14_8   0xDFA1
#define reg_ir_out_th14_14_8_pos 0
#define reg_ir_out_th14_14_8_len 7
#define reg_ir_out_th14_14_8_lsb 8
#define xd_p_reg_tuner_data_7_0 (*(volatile byte xdata *) 0xF000)
#define    p_reg_tuner_data_7_0 0xF000
#define reg_tuner_data_7_0_pos 0
#define reg_tuner_data_7_0_len 8
#define reg_tuner_data_7_0_lsb 0
#define xd_p_reg_tuner_data_15_8    (*(volatile byte xdata *) 0xF001)
#define    p_reg_tuner_data_15_8    0xF001
#define reg_tuner_data_15_8_pos 0
#define reg_tuner_data_15_8_len 8
#define reg_tuner_data_15_8_lsb 8
#define xd_p_reg_tuner_data_23_16   (*(volatile byte xdata *) 0xF002)
#define    p_reg_tuner_data_23_16   0xF002
#define reg_tuner_data_23_16_pos 0
#define reg_tuner_data_23_16_len 8
#define reg_tuner_data_23_16_lsb 16
#define xd_p_reg_tuner_data_31_24   (*(volatile byte xdata *) 0xF003)
#define    p_reg_tuner_data_31_24   0xF003
#define reg_tuner_data_31_24_pos 0
#define reg_tuner_data_31_24_len 8
#define reg_tuner_data_31_24_lsb 24
#define xd_p_reg_tuner_data_39_32   (*(volatile byte xdata *) 0xF004)
#define    p_reg_tuner_data_39_32   0xF004
#define reg_tuner_data_39_32_pos 0
#define reg_tuner_data_39_32_len 8
#define reg_tuner_data_39_32_lsb 32
#define xd_p_reg_tuner_data_47_40   (*(volatile byte xdata *) 0xF005)
#define    p_reg_tuner_data_47_40   0xF005
#define reg_tuner_data_47_40_pos 0
#define reg_tuner_data_47_40_len 8
#define reg_tuner_data_47_40_lsb 40
#define xd_p_reg_tuner_data_55_48   (*(volatile byte xdata *) 0xF006)
#define    p_reg_tuner_data_55_48   0xF006
#define reg_tuner_data_55_48_pos 0
#define reg_tuner_data_55_48_len 8
#define reg_tuner_data_55_48_lsb 48
#define xd_p_reg_tuner_data_63_56   (*(volatile byte xdata *) 0xF007)
#define    p_reg_tuner_data_63_56   0xF007
#define reg_tuner_data_63_56_pos 0
#define reg_tuner_data_63_56_len 8
#define reg_tuner_data_63_56_lsb 56
#define xd_p_reg_tuner_data_71_64   (*(volatile byte xdata *) 0xF008)
#define    p_reg_tuner_data_71_64   0xF008
#define reg_tuner_data_71_64_pos 0
#define reg_tuner_data_71_64_len 8
#define reg_tuner_data_71_64_lsb 64
#define xd_p_reg_tuner_data_79_72   (*(volatile byte xdata *) 0xF009)
#define    p_reg_tuner_data_79_72   0xF009
#define reg_tuner_data_79_72_pos 0
#define reg_tuner_data_79_72_len 8
#define reg_tuner_data_79_72_lsb 72
#define xd_p_reg_tuner_data_87_80   (*(volatile byte xdata *) 0xF00A)
#define    p_reg_tuner_data_87_80   0xF00A
#define reg_tuner_data_87_80_pos 0
#define reg_tuner_data_87_80_len 8
#define reg_tuner_data_87_80_lsb 80
#define xd_p_reg_tuner_data_95_88   (*(volatile byte xdata *) 0xF00B)
#define    p_reg_tuner_data_95_88   0xF00B
#define reg_tuner_data_95_88_pos 0
#define reg_tuner_data_95_88_len 8
#define reg_tuner_data_95_88_lsb 88
#define xd_p_reg_tuner_data_103_96  (*(volatile byte xdata *) 0xF00C)
#define    p_reg_tuner_data_103_96  0xF00C
#define reg_tuner_data_103_96_pos 0
#define reg_tuner_data_103_96_len 8
#define reg_tuner_data_103_96_lsb 96
#define xd_p_reg_tuner_data_111_104 (*(volatile byte xdata *) 0xF00D)
#define    p_reg_tuner_data_111_104 0xF00D
#define reg_tuner_data_111_104_pos 0
#define reg_tuner_data_111_104_len 8
#define reg_tuner_data_111_104_lsb 104
#define xd_p_reg_tuner_data_119_112 (*(volatile byte xdata *) 0xF00E)
#define    p_reg_tuner_data_119_112 0xF00E
#define reg_tuner_data_119_112_pos 0
#define reg_tuner_data_119_112_len 8
#define reg_tuner_data_119_112_lsb 112
#define xd_p_reg_tuner_data_127_120 (*(volatile byte xdata *) 0xF00F)
#define    p_reg_tuner_data_127_120 0xF00F
#define reg_tuner_data_127_120_pos 0
#define reg_tuner_data_127_120_len 8
#define reg_tuner_data_127_120_lsb 120
#define xd_p_reg_tuner_data_135_128 (*(volatile byte xdata *) 0xF010)
#define    p_reg_tuner_data_135_128 0xF010
#define reg_tuner_data_135_128_pos 0
#define reg_tuner_data_135_128_len 8
#define reg_tuner_data_135_128_lsb 128
#define xd_p_reg_tuner_data_143_136 (*(volatile byte xdata *) 0xF011)
#define    p_reg_tuner_data_143_136 0xF011
#define reg_tuner_data_143_136_pos 0
#define reg_tuner_data_143_136_len 8
#define reg_tuner_data_143_136_lsb 136
#define xd_p_reg_tuner_data_151_144 (*(volatile byte xdata *) 0xF012)
#define    p_reg_tuner_data_151_144 0xF012
#define reg_tuner_data_151_144_pos 0
#define reg_tuner_data_151_144_len 8
#define reg_tuner_data_151_144_lsb 144
#define xd_p_reg_tuner_data_159_152 (*(volatile byte xdata *) 0xF013)
#define    p_reg_tuner_data_159_152 0xF013
#define reg_tuner_data_159_152_pos 0
#define reg_tuner_data_159_152_len 8
#define reg_tuner_data_159_152_lsb 152
#define xd_p_reg_tuner_data_167_160 (*(volatile byte xdata *) 0xF014)
#define    p_reg_tuner_data_167_160 0xF014
#define reg_tuner_data_167_160_pos 0
#define reg_tuner_data_167_160_len 8
#define reg_tuner_data_167_160_lsb 160
#define xd_p_reg_tuner_data_175_168 (*(volatile byte xdata *) 0xF015)
#define    p_reg_tuner_data_175_168 0xF015
#define reg_tuner_data_175_168_pos 0
#define reg_tuner_data_175_168_len 8
#define reg_tuner_data_175_168_lsb 168
#define xd_p_reg_tuner_data_183_176 (*(volatile byte xdata *) 0xF016)
#define    p_reg_tuner_data_183_176 0xF016
#define reg_tuner_data_183_176_pos 0
#define reg_tuner_data_183_176_len 8
#define reg_tuner_data_183_176_lsb 176
#define xd_p_reg_tuner_data_191_184 (*(volatile byte xdata *) 0xF017)
#define    p_reg_tuner_data_191_184 0xF017
#define reg_tuner_data_191_184_pos 0
#define reg_tuner_data_191_184_len 8
#define reg_tuner_data_191_184_lsb 184
#define xd_p_reg_tuner_data_199_192 (*(volatile byte xdata *) 0xF018)
#define    p_reg_tuner_data_199_192 0xF018
#define reg_tuner_data_199_192_pos 0
#define reg_tuner_data_199_192_len 8
#define reg_tuner_data_199_192_lsb 192
#define xd_p_reg_tuner_data_207_200 (*(volatile byte xdata *) 0xF019)
#define    p_reg_tuner_data_207_200 0xF019
#define reg_tuner_data_207_200_pos 0
#define reg_tuner_data_207_200_len 8
#define reg_tuner_data_207_200_lsb 200
#define xd_p_reg_tuner_data_215_208 (*(volatile byte xdata *) 0xF01A)
#define    p_reg_tuner_data_215_208 0xF01A
#define reg_tuner_data_215_208_pos 0
#define reg_tuner_data_215_208_len 8
#define reg_tuner_data_215_208_lsb 208
#define xd_p_reg_tuner_data_223_216 (*(volatile byte xdata *) 0xF01B)
#define    p_reg_tuner_data_223_216 0xF01B
#define reg_tuner_data_223_216_pos 0
#define reg_tuner_data_223_216_len 8
#define reg_tuner_data_223_216_lsb 216
#define xd_p_reg_tuner_data_231_224 (*(volatile byte xdata *) 0xF01C)
#define    p_reg_tuner_data_231_224 0xF01C
#define reg_tuner_data_231_224_pos 0
#define reg_tuner_data_231_224_len 8
#define reg_tuner_data_231_224_lsb 224
#define xd_p_reg_tuner_data_239_232 (*(volatile byte xdata *) 0xF01D)
#define    p_reg_tuner_data_239_232 0xF01D
#define reg_tuner_data_239_232_pos 0
#define reg_tuner_data_239_232_len 8
#define reg_tuner_data_239_232_lsb 232
#define xd_p_reg_tuner_data_247_240 (*(volatile byte xdata *) 0xF01E)
#define    p_reg_tuner_data_247_240 0xF01E
#define reg_tuner_data_247_240_pos 0
#define reg_tuner_data_247_240_len 8
#define reg_tuner_data_247_240_lsb 240
#define xd_p_reg_tuner_data_255_248 (*(volatile byte xdata *) 0xF01F)
#define    p_reg_tuner_data_255_248 0xF01F
#define reg_tuner_data_255_248_pos 0
#define reg_tuner_data_255_248_len 8
#define reg_tuner_data_255_248_lsb 248
#define xd_p_reg_tuner_data_263_256 (*(volatile byte xdata *) 0xF020)
#define    p_reg_tuner_data_263_256 0xF020
#define reg_tuner_data_263_256_pos 0
#define reg_tuner_data_263_256_len 8
#define reg_tuner_data_263_256_lsb 256
#define xd_p_reg_tuner_data_271_264 (*(volatile byte xdata *) 0xF021)
#define    p_reg_tuner_data_271_264 0xF021
#define reg_tuner_data_271_264_pos 0
#define reg_tuner_data_271_264_len 8
#define reg_tuner_data_271_264_lsb 264
#define xd_p_reg_tuner_data_279_272 (*(volatile byte xdata *) 0xF022)
#define    p_reg_tuner_data_279_272 0xF022
#define reg_tuner_data_279_272_pos 0
#define reg_tuner_data_279_272_len 8
#define reg_tuner_data_279_272_lsb 272
#define xd_p_reg_tuner_data_287_280 (*(volatile byte xdata *) 0xF023)
#define    p_reg_tuner_data_287_280 0xF023
#define reg_tuner_data_287_280_pos 0
#define reg_tuner_data_287_280_len 8
#define reg_tuner_data_287_280_lsb 280
#define xd_p_reg_tuner_data_295_288 (*(volatile byte xdata *) 0xF024)
#define    p_reg_tuner_data_295_288 0xF024
#define reg_tuner_data_295_288_pos 0
#define reg_tuner_data_295_288_len 8
#define reg_tuner_data_295_288_lsb 288
#define xd_p_reg_tuner_data_303_296 (*(volatile byte xdata *) 0xF025)
#define    p_reg_tuner_data_303_296 0xF025
#define reg_tuner_data_303_296_pos 0
#define reg_tuner_data_303_296_len 8
#define reg_tuner_data_303_296_lsb 296
#define xd_p_reg_tuner_data_311_304 (*(volatile byte xdata *) 0xF026)
#define    p_reg_tuner_data_311_304 0xF026
#define reg_tuner_data_311_304_pos 0
#define reg_tuner_data_311_304_len 8
#define reg_tuner_data_311_304_lsb 304
#define xd_p_reg_tuner_data_319_312 (*(volatile byte xdata *) 0xF027)
#define    p_reg_tuner_data_319_312 0xF027
#define reg_tuner_data_319_312_pos 0
#define reg_tuner_data_319_312_len 8
#define reg_tuner_data_319_312_lsb 312
#define xd_p_reg_tuner_data_327_320 (*(volatile byte xdata *) 0xF028)
#define    p_reg_tuner_data_327_320 0xF028
#define reg_tuner_data_327_320_pos 0
#define reg_tuner_data_327_320_len 8
#define reg_tuner_data_327_320_lsb 320
#define xd_p_reg_tuner_data_335_328 (*(volatile byte xdata *) 0xF029)
#define    p_reg_tuner_data_335_328 0xF029
#define reg_tuner_data_335_328_pos 0
#define reg_tuner_data_335_328_len 8
#define reg_tuner_data_335_328_lsb 328
#define xd_p_reg_tuner_data_343_336 (*(volatile byte xdata *) 0xF02A)
#define    p_reg_tuner_data_343_336 0xF02A
#define reg_tuner_data_343_336_pos 0
#define reg_tuner_data_343_336_len 8
#define reg_tuner_data_343_336_lsb 336
#define xd_p_reg_tuner_data_351_344 (*(volatile byte xdata *) 0xF02B)
#define    p_reg_tuner_data_351_344 0xF02B
#define reg_tuner_data_351_344_pos 0
#define reg_tuner_data_351_344_len 8
#define reg_tuner_data_351_344_lsb 344
#define xd_p_reg_tuner_data_359_352 (*(volatile byte xdata *) 0xF02C)
#define    p_reg_tuner_data_359_352 0xF02C
#define reg_tuner_data_359_352_pos 0
#define reg_tuner_data_359_352_len 8
#define reg_tuner_data_359_352_lsb 352
#define xd_p_reg_tuner_data_367_360 (*(volatile byte xdata *) 0xF02D)
#define    p_reg_tuner_data_367_360 0xF02D
#define reg_tuner_data_367_360_pos 0
#define reg_tuner_data_367_360_len 8
#define reg_tuner_data_367_360_lsb 360
#define xd_p_reg_tuner_data_375_368 (*(volatile byte xdata *) 0xF02E)
#define    p_reg_tuner_data_375_368 0xF02E
#define reg_tuner_data_375_368_pos 0
#define reg_tuner_data_375_368_len 8
#define reg_tuner_data_375_368_lsb 368
#define xd_p_reg_tuner_data_383_376 (*(volatile byte xdata *) 0xF02F)
#define    p_reg_tuner_data_383_376 0xF02F
#define reg_tuner_data_383_376_pos 0
#define reg_tuner_data_383_376_len 8
#define reg_tuner_data_383_376_lsb 376
#define xd_p_reg_tuner_data_391_384 (*(volatile byte xdata *) 0xF030)
#define    p_reg_tuner_data_391_384 0xF030
#define reg_tuner_data_391_384_pos 0
#define reg_tuner_data_391_384_len 8
#define reg_tuner_data_391_384_lsb 384
#define xd_p_reg_tuner_data_399_392 (*(volatile byte xdata *) 0xF031)
#define    p_reg_tuner_data_399_392 0xF031
#define reg_tuner_data_399_392_pos 0
#define reg_tuner_data_399_392_len 8
#define reg_tuner_data_399_392_lsb 392
#define xd_p_reg_tuner_data_407_400 (*(volatile byte xdata *) 0xF032)
#define    p_reg_tuner_data_407_400 0xF032
#define reg_tuner_data_407_400_pos 0
#define reg_tuner_data_407_400_len 8
#define reg_tuner_data_407_400_lsb 400
#define xd_p_reg_tuner_data_415_408 (*(volatile byte xdata *) 0xF033)
#define    p_reg_tuner_data_415_408 0xF033
#define reg_tuner_data_415_408_pos 0
#define reg_tuner_data_415_408_len 8
#define reg_tuner_data_415_408_lsb 408
#define xd_p_reg_tuner_data_423_416 (*(volatile byte xdata *) 0xF034)
#define    p_reg_tuner_data_423_416 0xF034
#define reg_tuner_data_423_416_pos 0
#define reg_tuner_data_423_416_len 8
#define reg_tuner_data_423_416_lsb 416
#define xd_p_reg_tuner_data_431_424 (*(volatile byte xdata *) 0xF035)
#define    p_reg_tuner_data_431_424 0xF035
#define reg_tuner_data_431_424_pos 0
#define reg_tuner_data_431_424_len 8
#define reg_tuner_data_431_424_lsb 424
#define xd_p_reg_tuner_data_439_432 (*(volatile byte xdata *) 0xF036)
#define    p_reg_tuner_data_439_432 0xF036
#define reg_tuner_data_439_432_pos 0
#define reg_tuner_data_439_432_len 8
#define reg_tuner_data_439_432_lsb 432
#define xd_p_reg_tuner_data_447_440 (*(volatile byte xdata *) 0xF037)
#define    p_reg_tuner_data_447_440 0xF037
#define reg_tuner_data_447_440_pos 0
#define reg_tuner_data_447_440_len 8
#define reg_tuner_data_447_440_lsb 440
#define xd_p_reg_tuner_data_455_448 (*(volatile byte xdata *) 0xF038)
#define    p_reg_tuner_data_455_448 0xF038
#define reg_tuner_data_455_448_pos 0
#define reg_tuner_data_455_448_len 8
#define reg_tuner_data_455_448_lsb 448
#define xd_p_reg_tuner_data_463_456 (*(volatile byte xdata *) 0xF039)
#define    p_reg_tuner_data_463_456 0xF039
#define reg_tuner_data_463_456_pos 0
#define reg_tuner_data_463_456_len 8
#define reg_tuner_data_463_456_lsb 456
#define xd_p_reg_tuner_data_471_464 (*(volatile byte xdata *) 0xF03A)
#define    p_reg_tuner_data_471_464 0xF03A
#define reg_tuner_data_471_464_pos 0
#define reg_tuner_data_471_464_len 8
#define reg_tuner_data_471_464_lsb 464
#define xd_p_reg_tuner_data_479_472 (*(volatile byte xdata *) 0xF03B)
#define    p_reg_tuner_data_479_472 0xF03B
#define reg_tuner_data_479_472_pos 0
#define reg_tuner_data_479_472_len 8
#define reg_tuner_data_479_472_lsb 472
#define xd_p_reg_tuner_data_487_480 (*(volatile byte xdata *) 0xF03C)
#define    p_reg_tuner_data_487_480 0xF03C
#define reg_tuner_data_487_480_pos 0
#define reg_tuner_data_487_480_len 8
#define reg_tuner_data_487_480_lsb 480
#define xd_p_reg_tuner_data_495_488 (*(volatile byte xdata *) 0xF03D)
#define    p_reg_tuner_data_495_488 0xF03D
#define reg_tuner_data_495_488_pos 0
#define reg_tuner_data_495_488_len 8
#define reg_tuner_data_495_488_lsb 488
#define xd_p_reg_tuner_data_503_496 (*(volatile byte xdata *) 0xF03E)
#define    p_reg_tuner_data_503_496 0xF03E
#define reg_tuner_data_503_496_pos 0
#define reg_tuner_data_503_496_len 8
#define reg_tuner_data_503_496_lsb 496
#define xd_p_reg_tuner_data_511_504 (*(volatile byte xdata *) 0xF03F)
#define    p_reg_tuner_data_511_504 0xF03F
#define reg_tuner_data_511_504_pos 0
#define reg_tuner_data_511_504_len 8
#define reg_tuner_data_511_504_lsb 504
#define xd_p_reg_tuner_data_519_512 (*(volatile byte xdata *) 0xF040)
#define    p_reg_tuner_data_519_512 0xF040
#define reg_tuner_data_519_512_pos 0
#define reg_tuner_data_519_512_len 8
#define reg_tuner_data_519_512_lsb 512
#define xd_p_reg_tuner_data_527_520 (*(volatile byte xdata *) 0xF041)
#define    p_reg_tuner_data_527_520 0xF041
#define reg_tuner_data_527_520_pos 0
#define reg_tuner_data_527_520_len 8
#define reg_tuner_data_527_520_lsb 520
#define xd_p_reg_tuner_data_535_528 (*(volatile byte xdata *) 0xF042)
#define    p_reg_tuner_data_535_528 0xF042
#define reg_tuner_data_535_528_pos 0
#define reg_tuner_data_535_528_len 8
#define reg_tuner_data_535_528_lsb 528
#define xd_p_reg_tuner_data_543_536 (*(volatile byte xdata *) 0xF043)
#define    p_reg_tuner_data_543_536 0xF043
#define reg_tuner_data_543_536_pos 0
#define reg_tuner_data_543_536_len 8
#define reg_tuner_data_543_536_lsb 536
#define xd_p_reg_tuner_data_551_544 (*(volatile byte xdata *) 0xF044)
#define    p_reg_tuner_data_551_544 0xF044
#define reg_tuner_data_551_544_pos 0
#define reg_tuner_data_551_544_len 8
#define reg_tuner_data_551_544_lsb 544
#define xd_p_reg_tuner_data_559_552 (*(volatile byte xdata *) 0xF045)
#define    p_reg_tuner_data_559_552 0xF045
#define reg_tuner_data_559_552_pos 0
#define reg_tuner_data_559_552_len 8
#define reg_tuner_data_559_552_lsb 552
#define xd_p_reg_tuner_data_567_560 (*(volatile byte xdata *) 0xF046)
#define    p_reg_tuner_data_567_560 0xF046
#define reg_tuner_data_567_560_pos 0
#define reg_tuner_data_567_560_len 8
#define reg_tuner_data_567_560_lsb 560
#define xd_p_reg_tuner_data_575_568 (*(volatile byte xdata *) 0xF047)
#define    p_reg_tuner_data_575_568 0xF047
#define reg_tuner_data_575_568_pos 0
#define reg_tuner_data_575_568_len 8
#define reg_tuner_data_575_568_lsb 568
#define xd_p_reg_tuner_data_583_576 (*(volatile byte xdata *) 0xF048)
#define    p_reg_tuner_data_583_576 0xF048
#define reg_tuner_data_583_576_pos 0
#define reg_tuner_data_583_576_len 8
#define reg_tuner_data_583_576_lsb 576
#define xd_p_reg_tuner_data_591_584 (*(volatile byte xdata *) 0xF049)
#define    p_reg_tuner_data_591_584 0xF049
#define reg_tuner_data_591_584_pos 0
#define reg_tuner_data_591_584_len 8
#define reg_tuner_data_591_584_lsb 584
#define xd_p_reg_tuner_data_599_592 (*(volatile byte xdata *) 0xF04A)
#define    p_reg_tuner_data_599_592 0xF04A
#define reg_tuner_data_599_592_pos 0
#define reg_tuner_data_599_592_len 8
#define reg_tuner_data_599_592_lsb 592
#define xd_p_reg_tuner_data_607_600 (*(volatile byte xdata *) 0xF04B)
#define    p_reg_tuner_data_607_600 0xF04B
#define reg_tuner_data_607_600_pos 0
#define reg_tuner_data_607_600_len 8
#define reg_tuner_data_607_600_lsb 600
#define xd_p_reg_tuner_data_615_608 (*(volatile byte xdata *) 0xF04C)
#define    p_reg_tuner_data_615_608 0xF04C
#define reg_tuner_data_615_608_pos 0
#define reg_tuner_data_615_608_len 8
#define reg_tuner_data_615_608_lsb 608
#define xd_p_reg_tuner_data_623_616 (*(volatile byte xdata *) 0xF04D)
#define    p_reg_tuner_data_623_616 0xF04D
#define reg_tuner_data_623_616_pos 0
#define reg_tuner_data_623_616_len 8
#define reg_tuner_data_623_616_lsb 616
#define xd_p_reg_tuner_data_631_624 (*(volatile byte xdata *) 0xF04E)
#define    p_reg_tuner_data_631_624 0xF04E
#define reg_tuner_data_631_624_pos 0
#define reg_tuner_data_631_624_len 8
#define reg_tuner_data_631_624_lsb 624
#define xd_p_reg_tuner_data_639_632 (*(volatile byte xdata *) 0xF04F)
#define    p_reg_tuner_data_639_632 0xF04F
#define reg_tuner_data_639_632_pos 0
#define reg_tuner_data_639_632_len 8
#define reg_tuner_data_639_632_lsb 632
#define xd_p_reg_tuner_data_647_640 (*(volatile byte xdata *) 0xF050)
#define    p_reg_tuner_data_647_640 0xF050
#define reg_tuner_data_647_640_pos 0
#define reg_tuner_data_647_640_len 8
#define reg_tuner_data_647_640_lsb 640
#define xd_p_reg_tuner_data_655_648 (*(volatile byte xdata *) 0xF051)
#define    p_reg_tuner_data_655_648 0xF051
#define reg_tuner_data_655_648_pos 0
#define reg_tuner_data_655_648_len 8
#define reg_tuner_data_655_648_lsb 648
#define xd_p_reg_tuner_data_663_656 (*(volatile byte xdata *) 0xF052)
#define    p_reg_tuner_data_663_656 0xF052
#define reg_tuner_data_663_656_pos 0
#define reg_tuner_data_663_656_len 8
#define reg_tuner_data_663_656_lsb 656
#define xd_p_reg_tuner_data_671_664 (*(volatile byte xdata *) 0xF053)
#define    p_reg_tuner_data_671_664 0xF053
#define reg_tuner_data_671_664_pos 0
#define reg_tuner_data_671_664_len 8
#define reg_tuner_data_671_664_lsb 664
#define xd_p_reg_tuner_data_679_672 (*(volatile byte xdata *) 0xF054)
#define    p_reg_tuner_data_679_672 0xF054
#define reg_tuner_data_679_672_pos 0
#define reg_tuner_data_679_672_len 8
#define reg_tuner_data_679_672_lsb 672
#define xd_p_reg_tuner_data_687_680 (*(volatile byte xdata *) 0xF055)
#define    p_reg_tuner_data_687_680 0xF055
#define reg_tuner_data_687_680_pos 0
#define reg_tuner_data_687_680_len 8
#define reg_tuner_data_687_680_lsb 680
#define xd_p_reg_tuner_data_695_688 (*(volatile byte xdata *) 0xF056)
#define    p_reg_tuner_data_695_688 0xF056
#define reg_tuner_data_695_688_pos 0
#define reg_tuner_data_695_688_len 8
#define reg_tuner_data_695_688_lsb 688
#define xd_p_reg_tuner_data_703_696 (*(volatile byte xdata *) 0xF057)
#define    p_reg_tuner_data_703_696 0xF057
#define reg_tuner_data_703_696_pos 0
#define reg_tuner_data_703_696_len 8
#define reg_tuner_data_703_696_lsb 696
#define xd_p_reg_tuner_data_711_704 (*(volatile byte xdata *) 0xF058)
#define    p_reg_tuner_data_711_704 0xF058
#define reg_tuner_data_711_704_pos 0
#define reg_tuner_data_711_704_len 8
#define reg_tuner_data_711_704_lsb 704
#define xd_p_reg_tuner_data_719_712 (*(volatile byte xdata *) 0xF059)
#define    p_reg_tuner_data_719_712 0xF059
#define reg_tuner_data_719_712_pos 0
#define reg_tuner_data_719_712_len 8
#define reg_tuner_data_719_712_lsb 712
#define xd_p_reg_tuner_data_727_720 (*(volatile byte xdata *) 0xF05A)
#define    p_reg_tuner_data_727_720 0xF05A
#define reg_tuner_data_727_720_pos 0
#define reg_tuner_data_727_720_len 8
#define reg_tuner_data_727_720_lsb 720
#define xd_p_reg_tuner_data_735_728 (*(volatile byte xdata *) 0xF05B)
#define    p_reg_tuner_data_735_728 0xF05B
#define reg_tuner_data_735_728_pos 0
#define reg_tuner_data_735_728_len 8
#define reg_tuner_data_735_728_lsb 728
#define xd_p_reg_tuner_data_743_736 (*(volatile byte xdata *) 0xF05C)
#define    p_reg_tuner_data_743_736 0xF05C
#define reg_tuner_data_743_736_pos 0
#define reg_tuner_data_743_736_len 8
#define reg_tuner_data_743_736_lsb 736
#define xd_p_reg_tuner_data_751_744 (*(volatile byte xdata *) 0xF05D)
#define    p_reg_tuner_data_751_744 0xF05D
#define reg_tuner_data_751_744_pos 0
#define reg_tuner_data_751_744_len 8
#define reg_tuner_data_751_744_lsb 744
#define xd_p_reg_tuner_data_759_752 (*(volatile byte xdata *) 0xF05E)
#define    p_reg_tuner_data_759_752 0xF05E
#define reg_tuner_data_759_752_pos 0
#define reg_tuner_data_759_752_len 8
#define reg_tuner_data_759_752_lsb 752
#define xd_p_reg_tuner_data_767_760 (*(volatile byte xdata *) 0xF05F)
#define    p_reg_tuner_data_767_760 0xF05F
#define reg_tuner_data_767_760_pos 0
#define reg_tuner_data_767_760_len 8
#define reg_tuner_data_767_760_lsb 760
#define xd_p_reg_tuner_data_775_768 (*(volatile byte xdata *) 0xF060)
#define    p_reg_tuner_data_775_768 0xF060
#define reg_tuner_data_775_768_pos 0
#define reg_tuner_data_775_768_len 8
#define reg_tuner_data_775_768_lsb 768
#define xd_p_reg_tuner_data_783_776 (*(volatile byte xdata *) 0xF061)
#define    p_reg_tuner_data_783_776 0xF061
#define reg_tuner_data_783_776_pos 0
#define reg_tuner_data_783_776_len 8
#define reg_tuner_data_783_776_lsb 776
#define xd_p_reg_tuner_data_791_784 (*(volatile byte xdata *) 0xF062)
#define    p_reg_tuner_data_791_784 0xF062
#define reg_tuner_data_791_784_pos 0
#define reg_tuner_data_791_784_len 8
#define reg_tuner_data_791_784_lsb 784
#define xd_p_reg_tuner_data_799_792 (*(volatile byte xdata *) 0xF063)
#define    p_reg_tuner_data_799_792 0xF063
#define reg_tuner_data_799_792_pos 0
#define reg_tuner_data_799_792_len 8
#define reg_tuner_data_799_792_lsb 792
#define xd_p_reg_tuner_data_807_800 (*(volatile byte xdata *) 0xF064)
#define    p_reg_tuner_data_807_800 0xF064
#define reg_tuner_data_807_800_pos 0
#define reg_tuner_data_807_800_len 8
#define reg_tuner_data_807_800_lsb 800
#define xd_p_reg_tuner_data_815_808 (*(volatile byte xdata *) 0xF065)
#define    p_reg_tuner_data_815_808 0xF065
#define reg_tuner_data_815_808_pos 0
#define reg_tuner_data_815_808_len 8
#define reg_tuner_data_815_808_lsb 808
#define xd_p_reg_tuner_data_823_816 (*(volatile byte xdata *) 0xF066)
#define    p_reg_tuner_data_823_816 0xF066
#define reg_tuner_data_823_816_pos 0
#define reg_tuner_data_823_816_len 8
#define reg_tuner_data_823_816_lsb 816
#define xd_p_reg_tuner_data_831_824 (*(volatile byte xdata *) 0xF067)
#define    p_reg_tuner_data_831_824 0xF067
#define reg_tuner_data_831_824_pos 0
#define reg_tuner_data_831_824_len 8
#define reg_tuner_data_831_824_lsb 824
#define xd_p_reg_tuner_data_839_832 (*(volatile byte xdata *) 0xF068)
#define    p_reg_tuner_data_839_832 0xF068
#define reg_tuner_data_839_832_pos 0
#define reg_tuner_data_839_832_len 8
#define reg_tuner_data_839_832_lsb 832
#define xd_p_reg_tuner_data_847_840 (*(volatile byte xdata *) 0xF069)
#define    p_reg_tuner_data_847_840 0xF069
#define reg_tuner_data_847_840_pos 0
#define reg_tuner_data_847_840_len 8
#define reg_tuner_data_847_840_lsb 840
#define xd_p_reg_tuner_data_855_848 (*(volatile byte xdata *) 0xF06A)
#define    p_reg_tuner_data_855_848 0xF06A
#define reg_tuner_data_855_848_pos 0
#define reg_tuner_data_855_848_len 8
#define reg_tuner_data_855_848_lsb 848
#define xd_p_reg_tuner_data_863_856 (*(volatile byte xdata *) 0xF06B)
#define    p_reg_tuner_data_863_856 0xF06B
#define reg_tuner_data_863_856_pos 0
#define reg_tuner_data_863_856_len 8
#define reg_tuner_data_863_856_lsb 856
#define xd_p_reg_tuner_data_871_864 (*(volatile byte xdata *) 0xF06C)
#define    p_reg_tuner_data_871_864 0xF06C
#define reg_tuner_data_871_864_pos 0
#define reg_tuner_data_871_864_len 8
#define reg_tuner_data_871_864_lsb 864
#define xd_p_reg_tuner_data_879_872 (*(volatile byte xdata *) 0xF06D)
#define    p_reg_tuner_data_879_872 0xF06D
#define reg_tuner_data_879_872_pos 0
#define reg_tuner_data_879_872_len 8
#define reg_tuner_data_879_872_lsb 872
#define xd_p_reg_tuner_data_887_880 (*(volatile byte xdata *) 0xF06E)
#define    p_reg_tuner_data_887_880 0xF06E
#define reg_tuner_data_887_880_pos 0
#define reg_tuner_data_887_880_len 8
#define reg_tuner_data_887_880_lsb 880
#define xd_p_reg_tuner_data_895_888 (*(volatile byte xdata *) 0xF06F)
#define    p_reg_tuner_data_895_888 0xF06F
#define reg_tuner_data_895_888_pos 0
#define reg_tuner_data_895_888_len 8
#define reg_tuner_data_895_888_lsb 888
#define xd_p_reg_tuner_data_903_896 (*(volatile byte xdata *) 0xF070)
#define    p_reg_tuner_data_903_896 0xF070
#define reg_tuner_data_903_896_pos 0
#define reg_tuner_data_903_896_len 8
#define reg_tuner_data_903_896_lsb 896
#define xd_p_reg_tuner_data_911_904 (*(volatile byte xdata *) 0xF071)
#define    p_reg_tuner_data_911_904 0xF071
#define reg_tuner_data_911_904_pos 0
#define reg_tuner_data_911_904_len 8
#define reg_tuner_data_911_904_lsb 904
#define xd_p_reg_tuner_data_919_912 (*(volatile byte xdata *) 0xF072)
#define    p_reg_tuner_data_919_912 0xF072
#define reg_tuner_data_919_912_pos 0
#define reg_tuner_data_919_912_len 8
#define reg_tuner_data_919_912_lsb 912
#define xd_p_reg_tuner_data_927_920 (*(volatile byte xdata *) 0xF073)
#define    p_reg_tuner_data_927_920 0xF073
#define reg_tuner_data_927_920_pos 0
#define reg_tuner_data_927_920_len 8
#define reg_tuner_data_927_920_lsb 920
#define xd_p_reg_tuner_data_935_928 (*(volatile byte xdata *) 0xF074)
#define    p_reg_tuner_data_935_928 0xF074
#define reg_tuner_data_935_928_pos 0
#define reg_tuner_data_935_928_len 8
#define reg_tuner_data_935_928_lsb 928
#define xd_p_reg_tuner_data_943_936 (*(volatile byte xdata *) 0xF075)
#define    p_reg_tuner_data_943_936 0xF075
#define reg_tuner_data_943_936_pos 0
#define reg_tuner_data_943_936_len 8
#define reg_tuner_data_943_936_lsb 936
#define xd_p_reg_tuner_data_951_944 (*(volatile byte xdata *) 0xF076)
#define    p_reg_tuner_data_951_944 0xF076
#define reg_tuner_data_951_944_pos 0
#define reg_tuner_data_951_944_len 8
#define reg_tuner_data_951_944_lsb 944
#define xd_p_reg_tuner_data_959_952 (*(volatile byte xdata *) 0xF077)
#define    p_reg_tuner_data_959_952 0xF077
#define reg_tuner_data_959_952_pos 0
#define reg_tuner_data_959_952_len 8
#define reg_tuner_data_959_952_lsb 952
#define xd_p_reg_tuner_data_967_960 (*(volatile byte xdata *) 0xF078)
#define    p_reg_tuner_data_967_960 0xF078
#define reg_tuner_data_967_960_pos 0
#define reg_tuner_data_967_960_len 8
#define reg_tuner_data_967_960_lsb 960
#define xd_p_reg_tuner_data_975_968 (*(volatile byte xdata *) 0xF079)
#define    p_reg_tuner_data_975_968 0xF079
#define reg_tuner_data_975_968_pos 0
#define reg_tuner_data_975_968_len 8
#define reg_tuner_data_975_968_lsb 968
#define xd_p_reg_tuner_data_983_976 (*(volatile byte xdata *) 0xF07A)
#define    p_reg_tuner_data_983_976 0xF07A
#define reg_tuner_data_983_976_pos 0
#define reg_tuner_data_983_976_len 8
#define reg_tuner_data_983_976_lsb 976
#define xd_p_reg_tuner_data_991_984 (*(volatile byte xdata *) 0xF07B)
#define    p_reg_tuner_data_991_984 0xF07B
#define reg_tuner_data_991_984_pos 0
#define reg_tuner_data_991_984_len 8
#define reg_tuner_data_991_984_lsb 984
#define xd_p_reg_tuner_data_999_992 (*(volatile byte xdata *) 0xF07C)
#define    p_reg_tuner_data_999_992 0xF07C
#define reg_tuner_data_999_992_pos 0
#define reg_tuner_data_999_992_len 8
#define reg_tuner_data_999_992_lsb 992
#define xd_p_reg_tuner_data_1007_1000   (*(volatile byte xdata *) 0xF07D)
#define    p_reg_tuner_data_1007_1000   0xF07D
#define reg_tuner_data_1007_1000_pos 0
#define reg_tuner_data_1007_1000_len 8
#define reg_tuner_data_1007_1000_lsb 1000
#define xd_p_reg_tuner_data_1015_1008   (*(volatile byte xdata *) 0xF07E)
#define    p_reg_tuner_data_1015_1008   0xF07E
#define reg_tuner_data_1015_1008_pos 0
#define reg_tuner_data_1015_1008_len 8
#define reg_tuner_data_1015_1008_lsb 1008
#define xd_p_reg_tuner_data_1023_1016   (*(volatile byte xdata *) 0xF07F)
#define    p_reg_tuner_data_1023_1016   0xF07F
#define reg_tuner_data_1023_1016_pos 0
#define reg_tuner_data_1023_1016_len 8
#define reg_tuner_data_1023_1016_lsb 1016
#define xd_p_reg_tuner_data_1031_1024   (*(volatile byte xdata *) 0xF080)
#define    p_reg_tuner_data_1031_1024   0xF080
#define reg_tuner_data_1031_1024_pos 0
#define reg_tuner_data_1031_1024_len 8
#define reg_tuner_data_1031_1024_lsb 1024
#define xd_p_reg_tuner_data_1039_1032   (*(volatile byte xdata *) 0xF081)
#define    p_reg_tuner_data_1039_1032   0xF081
#define reg_tuner_data_1039_1032_pos 0
#define reg_tuner_data_1039_1032_len 8
#define reg_tuner_data_1039_1032_lsb 1032
#define xd_p_reg_tuner_data_1047_1040   (*(volatile byte xdata *) 0xF082)
#define    p_reg_tuner_data_1047_1040   0xF082
#define reg_tuner_data_1047_1040_pos 0
#define reg_tuner_data_1047_1040_len 8
#define reg_tuner_data_1047_1040_lsb 1040
#define xd_p_reg_tuner_data_1055_1048   (*(volatile byte xdata *) 0xF083)
#define    p_reg_tuner_data_1055_1048   0xF083
#define reg_tuner_data_1055_1048_pos 0
#define reg_tuner_data_1055_1048_len 8
#define reg_tuner_data_1055_1048_lsb 1048
#define xd_p_reg_tuner_data_1063_1056   (*(volatile byte xdata *) 0xF084)
#define    p_reg_tuner_data_1063_1056   0xF084
#define reg_tuner_data_1063_1056_pos 0
#define reg_tuner_data_1063_1056_len 8
#define reg_tuner_data_1063_1056_lsb 1056
#define xd_p_reg_tuner_data_1071_1064   (*(volatile byte xdata *) 0xF085)
#define    p_reg_tuner_data_1071_1064   0xF085
#define reg_tuner_data_1071_1064_pos 0
#define reg_tuner_data_1071_1064_len 8
#define reg_tuner_data_1071_1064_lsb 1064
#define xd_p_reg_tuner_data_1079_1072   (*(volatile byte xdata *) 0xF086)
#define    p_reg_tuner_data_1079_1072   0xF086
#define reg_tuner_data_1079_1072_pos 0
#define reg_tuner_data_1079_1072_len 8
#define reg_tuner_data_1079_1072_lsb 1072
#define xd_p_reg_tuner_data_1087_1080   (*(volatile byte xdata *) 0xF087)
#define    p_reg_tuner_data_1087_1080   0xF087
#define reg_tuner_data_1087_1080_pos 0
#define reg_tuner_data_1087_1080_len 8
#define reg_tuner_data_1087_1080_lsb 1080
#define xd_p_reg_tuner_data_1095_1088   (*(volatile byte xdata *) 0xF088)
#define    p_reg_tuner_data_1095_1088   0xF088
#define reg_tuner_data_1095_1088_pos 0
#define reg_tuner_data_1095_1088_len 8
#define reg_tuner_data_1095_1088_lsb 1088
#define xd_p_reg_tuner_data_1103_1096   (*(volatile byte xdata *) 0xF089)
#define    p_reg_tuner_data_1103_1096   0xF089
#define reg_tuner_data_1103_1096_pos 0
#define reg_tuner_data_1103_1096_len 8
#define reg_tuner_data_1103_1096_lsb 1096
#define xd_p_reg_tuner_data_1111_1104   (*(volatile byte xdata *) 0xF08A)
#define    p_reg_tuner_data_1111_1104   0xF08A
#define reg_tuner_data_1111_1104_pos 0
#define reg_tuner_data_1111_1104_len 8
#define reg_tuner_data_1111_1104_lsb 1104
#define xd_p_reg_tuner_data_1119_1112   (*(volatile byte xdata *) 0xF08B)
#define    p_reg_tuner_data_1119_1112   0xF08B
#define reg_tuner_data_1119_1112_pos 0
#define reg_tuner_data_1119_1112_len 8
#define reg_tuner_data_1119_1112_lsb 1112
#define xd_p_reg_tuner_data_1127_1120   (*(volatile byte xdata *) 0xF08C)
#define    p_reg_tuner_data_1127_1120   0xF08C
#define reg_tuner_data_1127_1120_pos 0
#define reg_tuner_data_1127_1120_len 8
#define reg_tuner_data_1127_1120_lsb 1120
#define xd_p_reg_tuner_data_1135_1128   (*(volatile byte xdata *) 0xF08D)
#define    p_reg_tuner_data_1135_1128   0xF08D
#define reg_tuner_data_1135_1128_pos 0
#define reg_tuner_data_1135_1128_len 8
#define reg_tuner_data_1135_1128_lsb 1128
#define xd_p_reg_tuner_data_1143_1136   (*(volatile byte xdata *) 0xF08E)
#define    p_reg_tuner_data_1143_1136   0xF08E
#define reg_tuner_data_1143_1136_pos 0
#define reg_tuner_data_1143_1136_len 8
#define reg_tuner_data_1143_1136_lsb 1136
#define xd_p_reg_tuner_data_1151_1144   (*(volatile byte xdata *) 0xF08F)
#define    p_reg_tuner_data_1151_1144   0xF08F
#define reg_tuner_data_1151_1144_pos 0
#define reg_tuner_data_1151_1144_len 8
#define reg_tuner_data_1151_1144_lsb 1144
#define xd_p_reg_tuner_data_1159_1152   (*(volatile byte xdata *) 0xF090)
#define    p_reg_tuner_data_1159_1152   0xF090
#define reg_tuner_data_1159_1152_pos 0
#define reg_tuner_data_1159_1152_len 8
#define reg_tuner_data_1159_1152_lsb 1152
#define xd_p_reg_tuner_data_1167_1160   (*(volatile byte xdata *) 0xF091)
#define    p_reg_tuner_data_1167_1160   0xF091
#define reg_tuner_data_1167_1160_pos 0
#define reg_tuner_data_1167_1160_len 8
#define reg_tuner_data_1167_1160_lsb 1160
#define xd_p_reg_tuner_data_1175_1168   (*(volatile byte xdata *) 0xF092)
#define    p_reg_tuner_data_1175_1168   0xF092
#define reg_tuner_data_1175_1168_pos 0
#define reg_tuner_data_1175_1168_len 8
#define reg_tuner_data_1175_1168_lsb 1168
#define xd_p_reg_tuner_data_1183_1176   (*(volatile byte xdata *) 0xF093)
#define    p_reg_tuner_data_1183_1176   0xF093
#define reg_tuner_data_1183_1176_pos 0
#define reg_tuner_data_1183_1176_len 8
#define reg_tuner_data_1183_1176_lsb 1176
#define xd_p_reg_tuner_data_1191_1184   (*(volatile byte xdata *) 0xF094)
#define    p_reg_tuner_data_1191_1184   0xF094
#define reg_tuner_data_1191_1184_pos 0
#define reg_tuner_data_1191_1184_len 8
#define reg_tuner_data_1191_1184_lsb 1184
#define xd_p_reg_tuner_data_1199_1192   (*(volatile byte xdata *) 0xF095)
#define    p_reg_tuner_data_1199_1192   0xF095
#define reg_tuner_data_1199_1192_pos 0
#define reg_tuner_data_1199_1192_len 8
#define reg_tuner_data_1199_1192_lsb 1192
#define xd_p_reg_tuner_data_1207_1200   (*(volatile byte xdata *) 0xF096)
#define    p_reg_tuner_data_1207_1200   0xF096
#define reg_tuner_data_1207_1200_pos 0
#define reg_tuner_data_1207_1200_len 8
#define reg_tuner_data_1207_1200_lsb 1200
#define xd_p_reg_tuner_data_1215_1208   (*(volatile byte xdata *) 0xF097)
#define    p_reg_tuner_data_1215_1208   0xF097
#define reg_tuner_data_1215_1208_pos 0
#define reg_tuner_data_1215_1208_len 8
#define reg_tuner_data_1215_1208_lsb 1208
#define xd_p_reg_tuner_data_1223_1216   (*(volatile byte xdata *) 0xF098)
#define    p_reg_tuner_data_1223_1216   0xF098
#define reg_tuner_data_1223_1216_pos 0
#define reg_tuner_data_1223_1216_len 8
#define reg_tuner_data_1223_1216_lsb 1216
#define xd_p_reg_tuner_data_1231_1224   (*(volatile byte xdata *) 0xF099)
#define    p_reg_tuner_data_1231_1224   0xF099
#define reg_tuner_data_1231_1224_pos 0
#define reg_tuner_data_1231_1224_len 8
#define reg_tuner_data_1231_1224_lsb 1224
#define xd_p_reg_tuner_data_1239_1232   (*(volatile byte xdata *) 0xF09A)
#define    p_reg_tuner_data_1239_1232   0xF09A
#define reg_tuner_data_1239_1232_pos 0
#define reg_tuner_data_1239_1232_len 8
#define reg_tuner_data_1239_1232_lsb 1232
#define xd_p_reg_tuner_data_1247_1240   (*(volatile byte xdata *) 0xF09B)
#define    p_reg_tuner_data_1247_1240   0xF09B
#define reg_tuner_data_1247_1240_pos 0
#define reg_tuner_data_1247_1240_len 8
#define reg_tuner_data_1247_1240_lsb 1240
#define xd_p_reg_tuner_data_1255_1248   (*(volatile byte xdata *) 0xF09C)
#define    p_reg_tuner_data_1255_1248   0xF09C
#define reg_tuner_data_1255_1248_pos 0
#define reg_tuner_data_1255_1248_len 8
#define reg_tuner_data_1255_1248_lsb 1248
#define xd_p_reg_tuner_data_1263_1256   (*(volatile byte xdata *) 0xF09D)
#define    p_reg_tuner_data_1263_1256   0xF09D
#define reg_tuner_data_1263_1256_pos 0
#define reg_tuner_data_1263_1256_len 8
#define reg_tuner_data_1263_1256_lsb 1256
#define xd_p_reg_tuner_data_1271_1264   (*(volatile byte xdata *) 0xF09E)
#define    p_reg_tuner_data_1271_1264   0xF09E
#define reg_tuner_data_1271_1264_pos 0
#define reg_tuner_data_1271_1264_len 8
#define reg_tuner_data_1271_1264_lsb 1264
#define xd_p_reg_tuner_data_1279_1272   (*(volatile byte xdata *) 0xF09F)
#define    p_reg_tuner_data_1279_1272   0xF09F
#define reg_tuner_data_1279_1272_pos 0
#define reg_tuner_data_1279_1272_len 8
#define reg_tuner_data_1279_1272_lsb 1272
#define xd_p_reg_tuner_data_1287_1280   (*(volatile byte xdata *) 0xF0A0)
#define    p_reg_tuner_data_1287_1280   0xF0A0
#define reg_tuner_data_1287_1280_pos 0
#define reg_tuner_data_1287_1280_len 8
#define reg_tuner_data_1287_1280_lsb 1280
#define xd_p_reg_tuner_data_1295_1288   (*(volatile byte xdata *) 0xF0A1)
#define    p_reg_tuner_data_1295_1288   0xF0A1
#define reg_tuner_data_1295_1288_pos 0
#define reg_tuner_data_1295_1288_len 8
#define reg_tuner_data_1295_1288_lsb 1288
#define xd_p_reg_tuner_data_1303_1296   (*(volatile byte xdata *) 0xF0A2)
#define    p_reg_tuner_data_1303_1296   0xF0A2
#define reg_tuner_data_1303_1296_pos 0
#define reg_tuner_data_1303_1296_len 8
#define reg_tuner_data_1303_1296_lsb 1296
#define xd_p_reg_tuner_data_1311_1304   (*(volatile byte xdata *) 0xF0A3)
#define    p_reg_tuner_data_1311_1304   0xF0A3
#define reg_tuner_data_1311_1304_pos 0
#define reg_tuner_data_1311_1304_len 8
#define reg_tuner_data_1311_1304_lsb 1304
#define xd_p_reg_tuner_data_1319_1312   (*(volatile byte xdata *) 0xF0A4)
#define    p_reg_tuner_data_1319_1312   0xF0A4
#define reg_tuner_data_1319_1312_pos 0
#define reg_tuner_data_1319_1312_len 8
#define reg_tuner_data_1319_1312_lsb 1312
#define xd_p_reg_tuner_data_1327_1320   (*(volatile byte xdata *) 0xF0A5)
#define    p_reg_tuner_data_1327_1320   0xF0A5
#define reg_tuner_data_1327_1320_pos 0
#define reg_tuner_data_1327_1320_len 8
#define reg_tuner_data_1327_1320_lsb 1320
#define xd_p_reg_tuner_data_1335_1328   (*(volatile byte xdata *) 0xF0A6)
#define    p_reg_tuner_data_1335_1328   0xF0A6
#define reg_tuner_data_1335_1328_pos 0
#define reg_tuner_data_1335_1328_len 8
#define reg_tuner_data_1335_1328_lsb 1328
#define xd_p_reg_tuner_data_1343_1336   (*(volatile byte xdata *) 0xF0A7)
#define    p_reg_tuner_data_1343_1336   0xF0A7
#define reg_tuner_data_1343_1336_pos 0
#define reg_tuner_data_1343_1336_len 8
#define reg_tuner_data_1343_1336_lsb 1336
#define xd_p_reg_tuner_data_1351_1344   (*(volatile byte xdata *) 0xF0A8)
#define    p_reg_tuner_data_1351_1344   0xF0A8
#define reg_tuner_data_1351_1344_pos 0
#define reg_tuner_data_1351_1344_len 8
#define reg_tuner_data_1351_1344_lsb 1344
#define xd_p_reg_tuner_data_1359_1352   (*(volatile byte xdata *) 0xF0A9)
#define    p_reg_tuner_data_1359_1352   0xF0A9
#define reg_tuner_data_1359_1352_pos 0
#define reg_tuner_data_1359_1352_len 8
#define reg_tuner_data_1359_1352_lsb 1352
#define xd_p_reg_tuner_data_1367_1360   (*(volatile byte xdata *) 0xF0AA)
#define    p_reg_tuner_data_1367_1360   0xF0AA
#define reg_tuner_data_1367_1360_pos 0
#define reg_tuner_data_1367_1360_len 8
#define reg_tuner_data_1367_1360_lsb 1360
#define xd_p_reg_tuner_data_1375_1368   (*(volatile byte xdata *) 0xF0AB)
#define    p_reg_tuner_data_1375_1368   0xF0AB
#define reg_tuner_data_1375_1368_pos 0
#define reg_tuner_data_1375_1368_len 8
#define reg_tuner_data_1375_1368_lsb 1368
#define xd_p_reg_tuner_data_1383_1376   (*(volatile byte xdata *) 0xF0AC)
#define    p_reg_tuner_data_1383_1376   0xF0AC
#define reg_tuner_data_1383_1376_pos 0
#define reg_tuner_data_1383_1376_len 8
#define reg_tuner_data_1383_1376_lsb 1376
#define xd_p_reg_tuner_data_1391_1384   (*(volatile byte xdata *) 0xF0AD)
#define    p_reg_tuner_data_1391_1384   0xF0AD
#define reg_tuner_data_1391_1384_pos 0
#define reg_tuner_data_1391_1384_len 8
#define reg_tuner_data_1391_1384_lsb 1384
#define xd_p_reg_tuner_data_1399_1392   (*(volatile byte xdata *) 0xF0AE)
#define    p_reg_tuner_data_1399_1392   0xF0AE
#define reg_tuner_data_1399_1392_pos 0
#define reg_tuner_data_1399_1392_len 8
#define reg_tuner_data_1399_1392_lsb 1392
#define xd_p_reg_tuner_data_1407_1400   (*(volatile byte xdata *) 0xF0AF)
#define    p_reg_tuner_data_1407_1400   0xF0AF
#define reg_tuner_data_1407_1400_pos 0
#define reg_tuner_data_1407_1400_len 8
#define reg_tuner_data_1407_1400_lsb 1400
#define xd_p_reg_tuner_data_1415_1408   (*(volatile byte xdata *) 0xF0B0)
#define    p_reg_tuner_data_1415_1408   0xF0B0
#define reg_tuner_data_1415_1408_pos 0
#define reg_tuner_data_1415_1408_len 8
#define reg_tuner_data_1415_1408_lsb 1408
#define xd_p_reg_tuner_data_1423_1416   (*(volatile byte xdata *) 0xF0B1)
#define    p_reg_tuner_data_1423_1416   0xF0B1
#define reg_tuner_data_1423_1416_pos 0
#define reg_tuner_data_1423_1416_len 8
#define reg_tuner_data_1423_1416_lsb 1416
#define xd_p_reg_tuner_data_1431_1424   (*(volatile byte xdata *) 0xF0B2)
#define    p_reg_tuner_data_1431_1424   0xF0B2
#define reg_tuner_data_1431_1424_pos 0
#define reg_tuner_data_1431_1424_len 8
#define reg_tuner_data_1431_1424_lsb 1424
#define xd_p_reg_tuner_data_1439_1432   (*(volatile byte xdata *) 0xF0B3)
#define    p_reg_tuner_data_1439_1432   0xF0B3
#define reg_tuner_data_1439_1432_pos 0
#define reg_tuner_data_1439_1432_len 8
#define reg_tuner_data_1439_1432_lsb 1432
#define xd_p_reg_tuner_data_1447_1440   (*(volatile byte xdata *) 0xF0B4)
#define    p_reg_tuner_data_1447_1440   0xF0B4
#define reg_tuner_data_1447_1440_pos 0
#define reg_tuner_data_1447_1440_len 8
#define reg_tuner_data_1447_1440_lsb 1440
#define xd_p_reg_tuner_data_1455_1448   (*(volatile byte xdata *) 0xF0B5)
#define    p_reg_tuner_data_1455_1448   0xF0B5
#define reg_tuner_data_1455_1448_pos 0
#define reg_tuner_data_1455_1448_len 8
#define reg_tuner_data_1455_1448_lsb 1448
#define xd_p_reg_tuner_data_1463_1456   (*(volatile byte xdata *) 0xF0B6)
#define    p_reg_tuner_data_1463_1456   0xF0B6
#define reg_tuner_data_1463_1456_pos 0
#define reg_tuner_data_1463_1456_len 8
#define reg_tuner_data_1463_1456_lsb 1456
#define xd_p_reg_tuner_data_1471_1464   (*(volatile byte xdata *) 0xF0B7)
#define    p_reg_tuner_data_1471_1464   0xF0B7
#define reg_tuner_data_1471_1464_pos 0
#define reg_tuner_data_1471_1464_len 8
#define reg_tuner_data_1471_1464_lsb 1464
#define xd_p_reg_tuner_data_1479_1472   (*(volatile byte xdata *) 0xF0B8)
#define    p_reg_tuner_data_1479_1472   0xF0B8
#define reg_tuner_data_1479_1472_pos 0
#define reg_tuner_data_1479_1472_len 8
#define reg_tuner_data_1479_1472_lsb 1472
#define xd_p_reg_tuner_data_1487_1480   (*(volatile byte xdata *) 0xF0B9)
#define    p_reg_tuner_data_1487_1480   0xF0B9
#define reg_tuner_data_1487_1480_pos 0
#define reg_tuner_data_1487_1480_len 8
#define reg_tuner_data_1487_1480_lsb 1480
#define xd_p_reg_tuner_data_1495_1488   (*(volatile byte xdata *) 0xF0BA)
#define    p_reg_tuner_data_1495_1488   0xF0BA
#define reg_tuner_data_1495_1488_pos 0
#define reg_tuner_data_1495_1488_len 8
#define reg_tuner_data_1495_1488_lsb 1488
#define xd_p_reg_tuner_data_1503_1496   (*(volatile byte xdata *) 0xF0BB)
#define    p_reg_tuner_data_1503_1496   0xF0BB
#define reg_tuner_data_1503_1496_pos 0
#define reg_tuner_data_1503_1496_len 8
#define reg_tuner_data_1503_1496_lsb 1496
#define xd_p_reg_tuner_data_1511_1504   (*(volatile byte xdata *) 0xF0BC)
#define    p_reg_tuner_data_1511_1504   0xF0BC
#define reg_tuner_data_1511_1504_pos 0
#define reg_tuner_data_1511_1504_len 8
#define reg_tuner_data_1511_1504_lsb 1504
#define xd_p_reg_tuner_data_1519_1512   (*(volatile byte xdata *) 0xF0BD)
#define    p_reg_tuner_data_1519_1512   0xF0BD
#define reg_tuner_data_1519_1512_pos 0
#define reg_tuner_data_1519_1512_len 8
#define reg_tuner_data_1519_1512_lsb 1512
#define xd_p_reg_tuner_data_1527_1520   (*(volatile byte xdata *) 0xF0BE)
#define    p_reg_tuner_data_1527_1520   0xF0BE
#define reg_tuner_data_1527_1520_pos 0
#define reg_tuner_data_1527_1520_len 8
#define reg_tuner_data_1527_1520_lsb 1520
#define xd_p_reg_tuner_data_1535_1528   (*(volatile byte xdata *) 0xF0BF)
#define    p_reg_tuner_data_1535_1528   0xF0BF
#define reg_tuner_data_1535_1528_pos 0
#define reg_tuner_data_1535_1528_len 8
#define reg_tuner_data_1535_1528_lsb 1528
#define xd_p_reg_tuner_data_1543_1536   (*(volatile byte xdata *) 0xF0C0)
#define    p_reg_tuner_data_1543_1536   0xF0C0
#define reg_tuner_data_1543_1536_pos 0
#define reg_tuner_data_1543_1536_len 8
#define reg_tuner_data_1543_1536_lsb 1536
#define xd_p_reg_tuner_data_1551_1544   (*(volatile byte xdata *) 0xF0C1)
#define    p_reg_tuner_data_1551_1544   0xF0C1
#define reg_tuner_data_1551_1544_pos 0
#define reg_tuner_data_1551_1544_len 8
#define reg_tuner_data_1551_1544_lsb 1544
#define xd_p_reg_tuner_data_1559_1552   (*(volatile byte xdata *) 0xF0C2)
#define    p_reg_tuner_data_1559_1552   0xF0C2
#define reg_tuner_data_1559_1552_pos 0
#define reg_tuner_data_1559_1552_len 8
#define reg_tuner_data_1559_1552_lsb 1552
#define xd_p_reg_tuner_data_1567_1560   (*(volatile byte xdata *) 0xF0C3)
#define    p_reg_tuner_data_1567_1560   0xF0C3
#define reg_tuner_data_1567_1560_pos 0
#define reg_tuner_data_1567_1560_len 8
#define reg_tuner_data_1567_1560_lsb 1560
#define xd_p_reg_tuner_data_1575_1568   (*(volatile byte xdata *) 0xF0C4)
#define    p_reg_tuner_data_1575_1568   0xF0C4
#define reg_tuner_data_1575_1568_pos 0
#define reg_tuner_data_1575_1568_len 8
#define reg_tuner_data_1575_1568_lsb 1568
#define xd_p_reg_tuner_data_1583_1576   (*(volatile byte xdata *) 0xF0C5)
#define    p_reg_tuner_data_1583_1576   0xF0C5
#define reg_tuner_data_1583_1576_pos 0
#define reg_tuner_data_1583_1576_len 8
#define reg_tuner_data_1583_1576_lsb 1576
#define xd_p_reg_tuner_data_1591_1584   (*(volatile byte xdata *) 0xF0C6)
#define    p_reg_tuner_data_1591_1584   0xF0C6
#define reg_tuner_data_1591_1584_pos 0
#define reg_tuner_data_1591_1584_len 8
#define reg_tuner_data_1591_1584_lsb 1584
#define xd_p_reg_tuner_data_1599_1592   (*(volatile byte xdata *) 0xF0C7)
#define    p_reg_tuner_data_1599_1592   0xF0C7
#define reg_tuner_data_1599_1592_pos 0
#define reg_tuner_data_1599_1592_len 8
#define reg_tuner_data_1599_1592_lsb 1592
#define xd_p_reg_tuner_data_1607_1600   (*(volatile byte xdata *) 0xF0C8)
#define    p_reg_tuner_data_1607_1600   0xF0C8
#define reg_tuner_data_1607_1600_pos 0
#define reg_tuner_data_1607_1600_len 8
#define reg_tuner_data_1607_1600_lsb 1600
#define xd_p_reg_tuner_data_1615_1608   (*(volatile byte xdata *) 0xF0C9)
#define    p_reg_tuner_data_1615_1608   0xF0C9
#define reg_tuner_data_1615_1608_pos 0
#define reg_tuner_data_1615_1608_len 8
#define reg_tuner_data_1615_1608_lsb 1608
#define xd_p_reg_tuner_data_1623_1616   (*(volatile byte xdata *) 0xF0CA)
#define    p_reg_tuner_data_1623_1616   0xF0CA
#define reg_tuner_data_1623_1616_pos 0
#define reg_tuner_data_1623_1616_len 8
#define reg_tuner_data_1623_1616_lsb 1616
#define xd_p_reg_tuner_data_1631_1624   (*(volatile byte xdata *) 0xF0CB)
#define    p_reg_tuner_data_1631_1624   0xF0CB
#define reg_tuner_data_1631_1624_pos 0
#define reg_tuner_data_1631_1624_len 8
#define reg_tuner_data_1631_1624_lsb 1624
#define xd_p_reg_tuner_data_1639_1632   (*(volatile byte xdata *) 0xF0CC)
#define    p_reg_tuner_data_1639_1632   0xF0CC
#define reg_tuner_data_1639_1632_pos 0
#define reg_tuner_data_1639_1632_len 8
#define reg_tuner_data_1639_1632_lsb 1632
#define xd_p_reg_tuner_data_1647_1640   (*(volatile byte xdata *) 0xF0CD)
#define    p_reg_tuner_data_1647_1640   0xF0CD
#define reg_tuner_data_1647_1640_pos 0
#define reg_tuner_data_1647_1640_len 8
#define reg_tuner_data_1647_1640_lsb 1640
#define xd_p_reg_tuner_data_1655_1648   (*(volatile byte xdata *) 0xF0CE)
#define    p_reg_tuner_data_1655_1648   0xF0CE
#define reg_tuner_data_1655_1648_pos 0
#define reg_tuner_data_1655_1648_len 8
#define reg_tuner_data_1655_1648_lsb 1648
#define xd_p_reg_tuner_data_1663_1656   (*(volatile byte xdata *) 0xF0CF)
#define    p_reg_tuner_data_1663_1656   0xF0CF
#define reg_tuner_data_1663_1656_pos 0
#define reg_tuner_data_1663_1656_len 8
#define reg_tuner_data_1663_1656_lsb 1656
#define xd_p_reg_tuner_data_1671_1664   (*(volatile byte xdata *) 0xF0D0)
#define    p_reg_tuner_data_1671_1664   0xF0D0
#define reg_tuner_data_1671_1664_pos 0
#define reg_tuner_data_1671_1664_len 8
#define reg_tuner_data_1671_1664_lsb 1664
#define xd_p_reg_tuner_data_1679_1672   (*(volatile byte xdata *) 0xF0D1)
#define    p_reg_tuner_data_1679_1672   0xF0D1
#define reg_tuner_data_1679_1672_pos 0
#define reg_tuner_data_1679_1672_len 8
#define reg_tuner_data_1679_1672_lsb 1672
#define xd_p_reg_tuner_data_1687_1680   (*(volatile byte xdata *) 0xF0D2)
#define    p_reg_tuner_data_1687_1680   0xF0D2
#define reg_tuner_data_1687_1680_pos 0
#define reg_tuner_data_1687_1680_len 8
#define reg_tuner_data_1687_1680_lsb 1680
#define xd_p_reg_tuner_data_1695_1688   (*(volatile byte xdata *) 0xF0D3)
#define    p_reg_tuner_data_1695_1688   0xF0D3
#define reg_tuner_data_1695_1688_pos 0
#define reg_tuner_data_1695_1688_len 8
#define reg_tuner_data_1695_1688_lsb 1688
#define xd_p_reg_tuner_data_1703_1696   (*(volatile byte xdata *) 0xF0D4)
#define    p_reg_tuner_data_1703_1696   0xF0D4
#define reg_tuner_data_1703_1696_pos 0
#define reg_tuner_data_1703_1696_len 8
#define reg_tuner_data_1703_1696_lsb 1696
#define xd_p_reg_tuner_data_1711_1704   (*(volatile byte xdata *) 0xF0D5)
#define    p_reg_tuner_data_1711_1704   0xF0D5
#define reg_tuner_data_1711_1704_pos 0
#define reg_tuner_data_1711_1704_len 8
#define reg_tuner_data_1711_1704_lsb 1704
#define xd_p_reg_tuner_data_1719_1712   (*(volatile byte xdata *) 0xF0D6)
#define    p_reg_tuner_data_1719_1712   0xF0D6
#define reg_tuner_data_1719_1712_pos 0
#define reg_tuner_data_1719_1712_len 8
#define reg_tuner_data_1719_1712_lsb 1712
#define xd_p_reg_tuner_data_1727_1720   (*(volatile byte xdata *) 0xF0D7)
#define    p_reg_tuner_data_1727_1720   0xF0D7
#define reg_tuner_data_1727_1720_pos 0
#define reg_tuner_data_1727_1720_len 8
#define reg_tuner_data_1727_1720_lsb 1720
#define xd_p_reg_tuner_data_1735_1728   (*(volatile byte xdata *) 0xF0D8)
#define    p_reg_tuner_data_1735_1728   0xF0D8
#define reg_tuner_data_1735_1728_pos 0
#define reg_tuner_data_1735_1728_len 8
#define reg_tuner_data_1735_1728_lsb 1728
#define xd_p_reg_tuner_data_1743_1736   (*(volatile byte xdata *) 0xF0D9)
#define    p_reg_tuner_data_1743_1736   0xF0D9
#define reg_tuner_data_1743_1736_pos 0
#define reg_tuner_data_1743_1736_len 8
#define reg_tuner_data_1743_1736_lsb 1736
#define xd_p_reg_tuner_data_1751_1744   (*(volatile byte xdata *) 0xF0DA)
#define    p_reg_tuner_data_1751_1744   0xF0DA
#define reg_tuner_data_1751_1744_pos 0
#define reg_tuner_data_1751_1744_len 8
#define reg_tuner_data_1751_1744_lsb 1744
#define xd_p_reg_tuner_data_1759_1752   (*(volatile byte xdata *) 0xF0DB)
#define    p_reg_tuner_data_1759_1752   0xF0DB
#define reg_tuner_data_1759_1752_pos 0
#define reg_tuner_data_1759_1752_len 8
#define reg_tuner_data_1759_1752_lsb 1752
#define xd_p_reg_tuner_data_1767_1760   (*(volatile byte xdata *) 0xF0DC)
#define    p_reg_tuner_data_1767_1760   0xF0DC
#define reg_tuner_data_1767_1760_pos 0
#define reg_tuner_data_1767_1760_len 8
#define reg_tuner_data_1767_1760_lsb 1760
#define xd_p_reg_tuner_data_1775_1768   (*(volatile byte xdata *) 0xF0DD)
#define    p_reg_tuner_data_1775_1768   0xF0DD
#define reg_tuner_data_1775_1768_pos 0
#define reg_tuner_data_1775_1768_len 8
#define reg_tuner_data_1775_1768_lsb 1768
#define xd_p_reg_tuner_data_1783_1776   (*(volatile byte xdata *) 0xF0DE)
#define    p_reg_tuner_data_1783_1776   0xF0DE
#define reg_tuner_data_1783_1776_pos 0
#define reg_tuner_data_1783_1776_len 8
#define reg_tuner_data_1783_1776_lsb 1776
#define xd_p_reg_tuner_data_1791_1784   (*(volatile byte xdata *) 0xF0DF)
#define    p_reg_tuner_data_1791_1784   0xF0DF
#define reg_tuner_data_1791_1784_pos 0
#define reg_tuner_data_1791_1784_len 8
#define reg_tuner_data_1791_1784_lsb 1784
#define xd_p_reg_tuner_data_1799_1792   (*(volatile byte xdata *) 0xF0E0)
#define    p_reg_tuner_data_1799_1792   0xF0E0
#define reg_tuner_data_1799_1792_pos 0
#define reg_tuner_data_1799_1792_len 8
#define reg_tuner_data_1799_1792_lsb 1792
#define xd_p_reg_tuner_data_1807_1800   (*(volatile byte xdata *) 0xF0E1)
#define    p_reg_tuner_data_1807_1800   0xF0E1
#define reg_tuner_data_1807_1800_pos 0
#define reg_tuner_data_1807_1800_len 8
#define reg_tuner_data_1807_1800_lsb 1800
#define xd_p_reg_tuner_data_1815_1808   (*(volatile byte xdata *) 0xF0E2)
#define    p_reg_tuner_data_1815_1808   0xF0E2
#define reg_tuner_data_1815_1808_pos 0
#define reg_tuner_data_1815_1808_len 8
#define reg_tuner_data_1815_1808_lsb 1808
#define xd_p_reg_tuner_data_1823_1816   (*(volatile byte xdata *) 0xF0E3)
#define    p_reg_tuner_data_1823_1816   0xF0E3
#define reg_tuner_data_1823_1816_pos 0
#define reg_tuner_data_1823_1816_len 8
#define reg_tuner_data_1823_1816_lsb 1816
#define xd_p_reg_tuner_data_1831_1824   (*(volatile byte xdata *) 0xF0E4)
#define    p_reg_tuner_data_1831_1824   0xF0E4
#define reg_tuner_data_1831_1824_pos 0
#define reg_tuner_data_1831_1824_len 8
#define reg_tuner_data_1831_1824_lsb 1824
#define xd_p_reg_tuner_data_1839_1832   (*(volatile byte xdata *) 0xF0E5)
#define    p_reg_tuner_data_1839_1832   0xF0E5
#define reg_tuner_data_1839_1832_pos 0
#define reg_tuner_data_1839_1832_len 8
#define reg_tuner_data_1839_1832_lsb 1832
#define xd_p_reg_tuner_data_1847_1840   (*(volatile byte xdata *) 0xF0E6)
#define    p_reg_tuner_data_1847_1840   0xF0E6
#define reg_tuner_data_1847_1840_pos 0
#define reg_tuner_data_1847_1840_len 8
#define reg_tuner_data_1847_1840_lsb 1840
#define xd_p_reg_tuner_data_1855_1848   (*(volatile byte xdata *) 0xF0E7)
#define    p_reg_tuner_data_1855_1848   0xF0E7
#define reg_tuner_data_1855_1848_pos 0
#define reg_tuner_data_1855_1848_len 8
#define reg_tuner_data_1855_1848_lsb 1848
#define xd_p_reg_tuner_data_1863_1856   (*(volatile byte xdata *) 0xF0E8)
#define    p_reg_tuner_data_1863_1856   0xF0E8
#define reg_tuner_data_1863_1856_pos 0
#define reg_tuner_data_1863_1856_len 8
#define reg_tuner_data_1863_1856_lsb 1856
#define xd_p_reg_tuner_data_1871_1864   (*(volatile byte xdata *) 0xF0E9)
#define    p_reg_tuner_data_1871_1864   0xF0E9
#define reg_tuner_data_1871_1864_pos 0
#define reg_tuner_data_1871_1864_len 8
#define reg_tuner_data_1871_1864_lsb 1864
#define xd_p_reg_tuner_data_1879_1872   (*(volatile byte xdata *) 0xF0EA)
#define    p_reg_tuner_data_1879_1872   0xF0EA
#define reg_tuner_data_1879_1872_pos 0
#define reg_tuner_data_1879_1872_len 8
#define reg_tuner_data_1879_1872_lsb 1872
#define xd_p_reg_tuner_data_1887_1880   (*(volatile byte xdata *) 0xF0EB)
#define    p_reg_tuner_data_1887_1880   0xF0EB
#define reg_tuner_data_1887_1880_pos 0
#define reg_tuner_data_1887_1880_len 8
#define reg_tuner_data_1887_1880_lsb 1880
#define xd_p_reg_tuner_data_1895_1888   (*(volatile byte xdata *) 0xF0EC)
#define    p_reg_tuner_data_1895_1888   0xF0EC
#define reg_tuner_data_1895_1888_pos 0
#define reg_tuner_data_1895_1888_len 8
#define reg_tuner_data_1895_1888_lsb 1888
#define xd_p_reg_tuner_data_1903_1896   (*(volatile byte xdata *) 0xF0ED)
#define    p_reg_tuner_data_1903_1896   0xF0ED
#define reg_tuner_data_1903_1896_pos 0
#define reg_tuner_data_1903_1896_len 8
#define reg_tuner_data_1903_1896_lsb 1896
#define xd_p_reg_tuner_data_1911_1904   (*(volatile byte xdata *) 0xF0EE)
#define    p_reg_tuner_data_1911_1904   0xF0EE
#define reg_tuner_data_1911_1904_pos 0
#define reg_tuner_data_1911_1904_len 8
#define reg_tuner_data_1911_1904_lsb 1904
#define xd_p_reg_tuner_data_1919_1912   (*(volatile byte xdata *) 0xF0EF)
#define    p_reg_tuner_data_1919_1912   0xF0EF
#define reg_tuner_data_1919_1912_pos 0
#define reg_tuner_data_1919_1912_len 8
#define reg_tuner_data_1919_1912_lsb 1912
#define xd_p_reg_tuner_data_1927_1920   (*(volatile byte xdata *) 0xF0F0)
#define    p_reg_tuner_data_1927_1920   0xF0F0
#define reg_tuner_data_1927_1920_pos 0
#define reg_tuner_data_1927_1920_len 8
#define reg_tuner_data_1927_1920_lsb 1920
#define xd_p_reg_tuner_data_1935_1928   (*(volatile byte xdata *) 0xF0F1)
#define    p_reg_tuner_data_1935_1928   0xF0F1
#define reg_tuner_data_1935_1928_pos 0
#define reg_tuner_data_1935_1928_len 8
#define reg_tuner_data_1935_1928_lsb 1928
#define xd_p_reg_tuner_data_1943_1936   (*(volatile byte xdata *) 0xF0F2)
#define    p_reg_tuner_data_1943_1936   0xF0F2
#define reg_tuner_data_1943_1936_pos 0
#define reg_tuner_data_1943_1936_len 8
#define reg_tuner_data_1943_1936_lsb 1936
#define xd_p_reg_tuner_data_1951_1944   (*(volatile byte xdata *) 0xF0F3)
#define    p_reg_tuner_data_1951_1944   0xF0F3
#define reg_tuner_data_1951_1944_pos 0
#define reg_tuner_data_1951_1944_len 8
#define reg_tuner_data_1951_1944_lsb 1944
#define xd_p_reg_tuner_data_1959_1952   (*(volatile byte xdata *) 0xF0F4)
#define    p_reg_tuner_data_1959_1952   0xF0F4
#define reg_tuner_data_1959_1952_pos 0
#define reg_tuner_data_1959_1952_len 8
#define reg_tuner_data_1959_1952_lsb 1952
#define xd_p_reg_tuner_data_1967_1960   (*(volatile byte xdata *) 0xF0F5)
#define    p_reg_tuner_data_1967_1960   0xF0F5
#define reg_tuner_data_1967_1960_pos 0
#define reg_tuner_data_1967_1960_len 8
#define reg_tuner_data_1967_1960_lsb 1960
#define xd_p_reg_tuner_data_1975_1968   (*(volatile byte xdata *) 0xF0F6)
#define    p_reg_tuner_data_1975_1968   0xF0F6
#define reg_tuner_data_1975_1968_pos 0
#define reg_tuner_data_1975_1968_len 8
#define reg_tuner_data_1975_1968_lsb 1968
#define xd_p_reg_tuner_data_1983_1976   (*(volatile byte xdata *) 0xF0F7)
#define    p_reg_tuner_data_1983_1976   0xF0F7
#define reg_tuner_data_1983_1976_pos 0
#define reg_tuner_data_1983_1976_len 8
#define reg_tuner_data_1983_1976_lsb 1976
#define xd_p_reg_tuner_data_1991_1984   (*(volatile byte xdata *) 0xF0F8)
#define    p_reg_tuner_data_1991_1984   0xF0F8
#define reg_tuner_data_1991_1984_pos 0
#define reg_tuner_data_1991_1984_len 8
#define reg_tuner_data_1991_1984_lsb 1984
#define xd_p_reg_tuner_data_1999_1992   (*(volatile byte xdata *) 0xF0F9)
#define    p_reg_tuner_data_1999_1992   0xF0F9
#define reg_tuner_data_1999_1992_pos 0
#define reg_tuner_data_1999_1992_len 8
#define reg_tuner_data_1999_1992_lsb 1992
#define xd_p_reg_tuner_data_2007_2000   (*(volatile byte xdata *) 0xF0FA)
#define    p_reg_tuner_data_2007_2000   0xF0FA
#define reg_tuner_data_2007_2000_pos 0
#define reg_tuner_data_2007_2000_len 8
#define reg_tuner_data_2007_2000_lsb 2000
#define xd_p_reg_tuner_data_2015_2008   (*(volatile byte xdata *) 0xF0FB)
#define    p_reg_tuner_data_2015_2008   0xF0FB
#define reg_tuner_data_2015_2008_pos 0
#define reg_tuner_data_2015_2008_len 8
#define reg_tuner_data_2015_2008_lsb 2008
#define xd_p_reg_tuner_data_2023_2016   (*(volatile byte xdata *) 0xF0FC)
#define    p_reg_tuner_data_2023_2016   0xF0FC
#define reg_tuner_data_2023_2016_pos 0
#define reg_tuner_data_2023_2016_len 8
#define reg_tuner_data_2023_2016_lsb 2016
#define xd_p_reg_tuner_data_2031_2024   (*(volatile byte xdata *) 0xF0FD)
#define    p_reg_tuner_data_2031_2024   0xF0FD
#define reg_tuner_data_2031_2024_pos 0
#define reg_tuner_data_2031_2024_len 8
#define reg_tuner_data_2031_2024_lsb 2024
#define xd_p_reg_tuner_data_2039_2032   (*(volatile byte xdata *) 0xF0FE)
#define    p_reg_tuner_data_2039_2032   0xF0FE
#define reg_tuner_data_2039_2032_pos 0
#define reg_tuner_data_2039_2032_len 8
#define reg_tuner_data_2039_2032_lsb 2032
#define xd_p_reg_tuner_data_2047_2040   (*(volatile byte xdata *) 0xF0FF)
#define    p_reg_tuner_data_2047_2040   0xF0FF
#define reg_tuner_data_2047_2040_pos 0
#define reg_tuner_data_2047_2040_len 8
#define reg_tuner_data_2047_2040_lsb 2040
#define xd_p_reg_tuner_master_rd_wr (*(volatile byte xdata *) 0xF100)
#define    p_reg_tuner_master_rd_wr 0xF100
#define reg_tuner_master_rd_wr_pos 0
#define reg_tuner_master_rd_wr_len 1
#define reg_tuner_master_rd_wr_lsb 0
#define xd_p_reg_tuner_master_length    (*(volatile byte xdata *) 0xF101)
#define    p_reg_tuner_master_length    0xF101
#define reg_tuner_master_length_pos 0
#define reg_tuner_master_length_len 8
#define reg_tuner_master_length_lsb 0
#define xd_p_reg_tuner_cmd_exe  (*(volatile byte xdata *) 0xF102)
#define    p_reg_tuner_cmd_exe  0xF102
#define reg_tuner_cmd_exe_pos 0
#define reg_tuner_cmd_exe_len 1
#define reg_tuner_cmd_exe_lsb 0
#define xd_p_reg_tuner_wdat_done    (*(volatile byte xdata *) 0xF102)
#define    p_reg_tuner_wdat_done    0xF102
#define reg_tuner_wdat_done_pos 1
#define reg_tuner_wdat_done_len 1
#define reg_tuner_wdat_done_lsb 0
#define xd_p_reg_tuner_wdat_fail    (*(volatile byte xdata *) 0xF102)
#define    p_reg_tuner_wdat_fail    0xF102
#define reg_tuner_wdat_fail_pos 2
#define reg_tuner_wdat_fail_len 1
#define reg_tuner_wdat_fail_lsb 0
#define xd_p_reg_tuner_ofsm_i2cm_rdat_rdy   (*(volatile byte xdata *) 0xF102)
#define    p_reg_tuner_ofsm_i2cm_rdat_rdy   0xF102
#define reg_tuner_ofsm_i2cm_rdat_rdy_pos 3
#define reg_tuner_ofsm_i2cm_rdat_rdy_len 1
#define reg_tuner_ofsm_i2cm_rdat_rdy_lsb 0
#define xd_p_reg_tuner_current_state    (*(volatile byte xdata *) 0xF102)
#define    p_reg_tuner_current_state    0xF102
#define reg_tuner_current_state_pos 4
#define reg_tuner_current_state_len 3
#define reg_tuner_current_state_lsb 0
#define xd_p_reg_one_cycle_counter_tuner    (*(volatile byte xdata *) 0xF103)
#define    p_reg_one_cycle_counter_tuner    0xF103
#define reg_one_cycle_counter_tuner_pos 0
#define reg_one_cycle_counter_tuner_len 8
#define reg_one_cycle_counter_tuner_lsb 0
#define xd_p_reg_msb_lsb    (*(volatile byte xdata *) 0xF104)
#define    p_reg_msb_lsb    0xF104
#define reg_msb_lsb_pos 0
#define reg_msb_lsb_len 1
#define reg_msb_lsb_lsb 0
#define xd_p_reg_ofdm_rst   (*(volatile byte xdata *) 0xF104)
#define    p_reg_ofdm_rst   0xF104
#define xd_p_reg_sel_thirdi2c   (*(volatile byte xdata *) 0xF104)
#define    p_reg_sel_thirdi2c   0xF104
#define reg_sel_thirdi2c_pos 2
#define reg_sel_thirdi2c_len 1
#define reg_sel_thirdi2c_lsb 0
#define xd_p_reg_sel_tuner  (*(volatile byte xdata *) 0xF104)
#define    p_reg_sel_tuner  0xF104
#define xd_p_reg_ofdm_rst_en    (*(volatile byte xdata *) 0xF104)
#define    p_reg_ofdm_rst_en    0xF104
#define xd_p_reg_sdio_cccr_v    (*(volatile byte xdata *) 0xF140)
#define    p_reg_sdio_cccr_v    0xF140
#define reg_sdio_cccr_v_pos 0
#define reg_sdio_cccr_v_len 4
#define reg_sdio_cccr_v_lsb 0
#define xd_p_reg_sdio_sdio_v    (*(volatile byte xdata *) 0xF140)
#define    p_reg_sdio_sdio_v    0xF140
#define reg_sdio_sdio_v_pos 4
#define reg_sdio_sdio_v_len 4
#define reg_sdio_sdio_v_lsb 0
#define xd_p_reg_sdioc_sd_v (*(volatile byte xdata *) 0xF141)
#define    p_reg_sdioc_sd_v 0xF141
#define reg_sdioc_sd_v_pos 0
#define reg_sdioc_sd_v_len 4
#define reg_sdioc_sd_v_lsb 0
#define xd_p_reg_sdioc_ior1 (*(volatile byte xdata *) 0xF143)
#define    p_reg_sdioc_ior1 0xF143
#define reg_sdioc_ior1_pos 1
#define reg_sdioc_ior1_len 1
#define reg_sdioc_ior1_lsb 0
#define xd_p_reg_sdioc_int1 (*(volatile byte xdata *) 0xF145)
#define    p_reg_sdioc_int1 0xF145
#define reg_sdioc_int1_pos 1
#define reg_sdioc_int1_len 1
#define reg_sdioc_int1_lsb 0
#define xd_p_reg_sdioc_scsi (*(volatile byte xdata *) 0xF147)
#define    p_reg_sdioc_scsi 0xF147
#define reg_sdioc_scsi_pos 6
#define reg_sdioc_scsi_len 1
#define reg_sdioc_scsi_lsb 0
#define xd_p_reg_sdioc_sdc  (*(volatile byte xdata *) 0xF148)
#define    p_reg_sdioc_sdc  0xF148
#define reg_sdioc_sdc_pos 0
#define reg_sdioc_sdc_len 1
#define reg_sdioc_sdc_lsb 0
#define xd_p_reg_sdioc_smb  (*(volatile byte xdata *) 0xF148)
#define    p_reg_sdioc_smb  0xF148
#define reg_sdioc_smb_pos 1
#define reg_sdioc_smb_len 1
#define reg_sdioc_smb_lsb 0
#define xd_p_reg_sdioc_srw  (*(volatile byte xdata *) 0xF148)
#define    p_reg_sdioc_srw  0xF148
#define reg_sdioc_srw_pos 2
#define reg_sdioc_srw_len 1
#define reg_sdioc_srw_lsb 0
#define xd_p_reg_sdioc_sbs  (*(volatile byte xdata *) 0xF148)
#define    p_reg_sdioc_sbs  0xF148
#define reg_sdioc_sbs_pos 3
#define reg_sdioc_sbs_len 1
#define reg_sdioc_sbs_lsb 0
#define xd_p_reg_sdioc_s4mi (*(volatile byte xdata *) 0xF148)
#define    p_reg_sdioc_s4mi 0xF148
#define reg_sdioc_s4mi_pos 4
#define reg_sdioc_s4mi_len 1
#define reg_sdioc_s4mi_lsb 0
#define xd_p_reg_sdioc_lsc  (*(volatile byte xdata *) 0xF148)
#define    p_reg_sdioc_lsc  0xF148
#define reg_sdioc_lsc_pos 6
#define reg_sdioc_lsc_len 1
#define reg_sdioc_lsc_lsb 0
#define xd_p_reg_sdioc_4bls (*(volatile byte xdata *) 0xF148)
#define    p_reg_sdioc_4bls 0xF148
#define reg_sdioc_4bls_pos 7
#define reg_sdioc_4bls_len 1
#define reg_sdioc_4bls_lsb 0
#define xd_p_reg_sdioc_cis_7_0  (*(volatile byte xdata *) 0xF149)
#define    p_reg_sdioc_cis_7_0  0xF149
#define reg_sdioc_cis_7_0_pos 0
#define reg_sdioc_cis_7_0_len 8
#define reg_sdioc_cis_7_0_lsb 0
#define xd_p_reg_sdioc_cis_15_8 (*(volatile byte xdata *) 0xF14A)
#define    p_reg_sdioc_cis_15_8 0xF14A
#define reg_sdioc_cis_15_8_pos 0
#define reg_sdioc_cis_15_8_len 8
#define reg_sdioc_cis_15_8_lsb 8
#define xd_p_reg_sdioc_cis_23_16    (*(volatile byte xdata *) 0xF14B)
#define    p_reg_sdioc_cis_23_16    0xF14B
#define reg_sdioc_cis_23_16_pos 0
#define reg_sdioc_cis_23_16_len 8
#define reg_sdioc_cis_23_16_lsb 16
#define xd_p_reg_sdioc_fs   (*(volatile byte xdata *) 0xF14D)
#define    p_reg_sdioc_fs   0xF14D
#define reg_sdioc_fs_pos 0
#define reg_sdioc_fs_len 4
#define reg_sdioc_fs_lsb 0
#define xd_p_reg_sdioc_df   (*(volatile byte xdata *) 0xF14D)
#define    p_reg_sdioc_df   0xF14D
#define reg_sdioc_df_pos 7
#define reg_sdioc_df_len 1
#define reg_sdioc_df_lsb 0
#define xd_p_reg_sdioc_ex1  (*(volatile byte xdata *) 0xF14E)
#define    p_reg_sdioc_ex1  0xF14E
#define reg_sdioc_ex1_pos 1
#define reg_sdioc_ex1_len 1
#define reg_sdioc_ex1_lsb 0
#define xd_p_reg_sdioc_rf1  (*(volatile byte xdata *) 0xF14F)
#define    p_reg_sdioc_rf1  0xF14F
#define reg_sdioc_rf1_pos 1
#define reg_sdioc_rf1_len 1
#define reg_sdioc_rf1_lsb 0
#define xd_p_reg_sdioc_smpc (*(volatile byte xdata *) 0xF152)
#define    p_reg_sdioc_smpc 0xF152
#define reg_sdioc_smpc_pos 0
#define reg_sdioc_smpc_len 1
#define reg_sdioc_smpc_lsb 0
#define xd_p_reg_sdioc_f1_code  (*(volatile byte xdata *) 0xF160)
#define    p_reg_sdioc_f1_code  0xF160
#define reg_sdioc_f1_code_pos 0
#define reg_sdioc_f1_code_len 4
#define reg_sdioc_f1_code_lsb 0
#define xd_p_reg_sdioc_scsa (*(volatile byte xdata *) 0xF160)
#define    p_reg_sdioc_scsa 0xF160
#define reg_sdioc_scsa_pos 6
#define reg_sdioc_scsa_len 1
#define reg_sdioc_scsa_lsb 0
#define xd_p_reg_sdioc_csa_en   (*(volatile byte xdata *) 0xF160)
#define    p_reg_sdioc_csa_en   0xF160
#define reg_sdioc_csa_en_pos 7
#define reg_sdioc_csa_en_len 1
#define reg_sdioc_csa_en_lsb 0
#define xd_p_reg_sdioc_f1_ext_code  (*(volatile byte xdata *) 0xF161)
#define    p_reg_sdioc_f1_ext_code  0xF161
#define reg_sdioc_f1_ext_code_pos 0
#define reg_sdioc_f1_ext_code_len 8
#define reg_sdioc_f1_ext_code_lsb 0
#define xd_p_reg_sdioc_sps  (*(volatile byte xdata *) 0xF162)
#define    p_reg_sdioc_sps  0xF162
#define reg_sdioc_sps_pos 0
#define reg_sdioc_sps_len 1
#define reg_sdioc_sps_lsb 0
#define xd_p_reg_sdioc_func1_cis_ptr_7_0    (*(volatile byte xdata *) 0xF169)
#define    p_reg_sdioc_func1_cis_ptr_7_0    0xF169
#define reg_sdioc_func1_cis_ptr_7_0_pos 0
#define reg_sdioc_func1_cis_ptr_7_0_len 8
#define reg_sdioc_func1_cis_ptr_7_0_lsb 0
#define xd_p_reg_sdioc_func1_cis_ptr_15_8   (*(volatile byte xdata *) 0xF16A)
#define    p_reg_sdioc_func1_cis_ptr_15_8   0xF16A
#define reg_sdioc_func1_cis_ptr_15_8_pos 0
#define reg_sdioc_func1_cis_ptr_15_8_len 8
#define reg_sdioc_func1_cis_ptr_15_8_lsb 8
#define xd_p_reg_sdioc_func1_cis_ptr_23_16  (*(volatile byte xdata *) 0xF16B)
#define    p_reg_sdioc_func1_cis_ptr_23_16  0xF16B
#define reg_sdioc_func1_cis_ptr_23_16_pos 0
#define reg_sdioc_func1_cis_ptr_23_16_len 8
#define reg_sdioc_func1_cis_ptr_23_16_lsb 16
#define xd_p_reg_sdio_FUNCID0_0 (*(volatile byte xdata *) 0xF180)
#define    p_reg_sdio_FUNCID0_0 0xF180
#define reg_sdio_FUNCID0_0_pos 0
#define reg_sdio_FUNCID0_0_len 8
#define reg_sdio_FUNCID0_0_lsb 0
#define xd_p_reg_sdio_FUNCID0_1 (*(volatile byte xdata *) 0xF181)
#define    p_reg_sdio_FUNCID0_1 0xF181
#define reg_sdio_FUNCID0_1_pos 0
#define reg_sdio_FUNCID0_1_len 8
#define reg_sdio_FUNCID0_1_lsb 0
#define xd_p_reg_sdio_FUNCID0_2 (*(volatile byte xdata *) 0xF182)
#define    p_reg_sdio_FUNCID0_2 0xF182
#define reg_sdio_FUNCID0_2_pos 0
#define reg_sdio_FUNCID0_2_len 8
#define reg_sdio_FUNCID0_2_lsb 0
#define xd_p_reg_sdio_FUNCID0_3 (*(volatile byte xdata *) 0xF183)
#define    p_reg_sdio_FUNCID0_3 0xF183
#define reg_sdio_FUNCID0_3_pos 0
#define reg_sdio_FUNCID0_3_len 8
#define reg_sdio_FUNCID0_3_lsb 0
#define xd_p_reg_sdio_MANFID0_0 (*(volatile byte xdata *) 0xF184)
#define    p_reg_sdio_MANFID0_0 0xF184
#define reg_sdio_MANFID0_0_pos 0
#define reg_sdio_MANFID0_0_len 8
#define reg_sdio_MANFID0_0_lsb 0
#define xd_p_reg_sdio_MANFID0_1 (*(volatile byte xdata *) 0xF185)
#define    p_reg_sdio_MANFID0_1 0xF185
#define reg_sdio_MANFID0_1_pos 0
#define reg_sdio_MANFID0_1_len 8
#define reg_sdio_MANFID0_1_lsb 0
#define xd_p_reg_sdio_MANFID0_2_7_0 (*(volatile byte xdata *) 0xF186)
#define    p_reg_sdio_MANFID0_2_7_0 0xF186
#define reg_sdio_MANFID0_2_7_0_pos 0
#define reg_sdio_MANFID0_2_7_0_len 8
#define reg_sdio_MANFID0_2_7_0_lsb 0
#define xd_p_reg_sdio_MANFID0_2_15_8    (*(volatile byte xdata *) 0xF187)
#define    p_reg_sdio_MANFID0_2_15_8    0xF187
#define reg_sdio_MANFID0_2_15_8_pos 0
#define reg_sdio_MANFID0_2_15_8_len 8
#define reg_sdio_MANFID0_2_15_8_lsb 8
#define xd_p_reg_sdio_MANFID0_4_7_0 (*(volatile byte xdata *) 0xF188)
#define    p_reg_sdio_MANFID0_4_7_0 0xF188
#define reg_sdio_MANFID0_4_7_0_pos 0
#define reg_sdio_MANFID0_4_7_0_len 8
#define reg_sdio_MANFID0_4_7_0_lsb 0
#define xd_p_reg_sdio_MANFID0_4_15_8    (*(volatile byte xdata *) 0xF189)
#define    p_reg_sdio_MANFID0_4_15_8    0xF189
#define reg_sdio_MANFID0_4_15_8_pos 0
#define reg_sdio_MANFID0_4_15_8_len 8
#define reg_sdio_MANFID0_4_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE0_0  (*(volatile byte xdata *) 0xF18A)
#define    p_reg_sdio_FUNCE0_0  0xF18A
#define reg_sdio_FUNCE0_0_pos 0
#define reg_sdio_FUNCE0_0_len 8
#define reg_sdio_FUNCE0_0_lsb 0
#define xd_p_reg_sdio_FUNCE0_1  (*(volatile byte xdata *) 0xF18B)
#define    p_reg_sdio_FUNCE0_1  0xF18B
#define reg_sdio_FUNCE0_1_pos 0
#define reg_sdio_FUNCE0_1_len 8
#define reg_sdio_FUNCE0_1_lsb 0
#define xd_p_reg_sdio_FUNCE0_2  (*(volatile byte xdata *) 0xF18C)
#define    p_reg_sdio_FUNCE0_2  0xF18C
#define reg_sdio_FUNCE0_2_pos 0
#define reg_sdio_FUNCE0_2_len 8
#define reg_sdio_FUNCE0_2_lsb 0
#define xd_p_reg_sdio_FUNCE0_3_7_0  (*(volatile byte xdata *) 0xF18D)
#define    p_reg_sdio_FUNCE0_3_7_0  0xF18D
#define reg_sdio_FUNCE0_3_7_0_pos 0
#define reg_sdio_FUNCE0_3_7_0_len 8
#define reg_sdio_FUNCE0_3_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE0_3_15_8 (*(volatile byte xdata *) 0xF18E)
#define    p_reg_sdio_FUNCE0_3_15_8 0xF18E
#define reg_sdio_FUNCE0_3_15_8_pos 0
#define reg_sdio_FUNCE0_3_15_8_len 8
#define reg_sdio_FUNCE0_3_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE0_5  (*(volatile byte xdata *) 0xF18F)
#define    p_reg_sdio_FUNCE0_5  0xF18F
#define reg_sdio_FUNCE0_5_pos 0
#define reg_sdio_FUNCE0_5_len 8
#define reg_sdio_FUNCE0_5_lsb 0
#define xd_p_reg_sdio_VERS_10_0 (*(volatile byte xdata *) 0xF190)
#define    p_reg_sdio_VERS_10_0 0xF190
#define reg_sdio_VERS_10_0_pos 0
#define reg_sdio_VERS_10_0_len 8
#define reg_sdio_VERS_10_0_lsb 0
#define xd_p_reg_sdio_VERS_10_1 (*(volatile byte xdata *) 0xF191)
#define    p_reg_sdio_VERS_10_1 0xF191
#define reg_sdio_VERS_10_1_pos 0
#define reg_sdio_VERS_10_1_len 8
#define reg_sdio_VERS_10_1_lsb 0
#define xd_p_reg_sdio_VERS_10_2 (*(volatile byte xdata *) 0xF192)
#define    p_reg_sdio_VERS_10_2 0xF192
#define reg_sdio_VERS_10_2_pos 0
#define reg_sdio_VERS_10_2_len 8
#define reg_sdio_VERS_10_2_lsb 0
#define xd_p_reg_sdio_VERS_10_3 (*(volatile byte xdata *) 0xF193)
#define    p_reg_sdio_VERS_10_3 0xF193
#define reg_sdio_VERS_10_3_pos 0
#define reg_sdio_VERS_10_3_len 8
#define reg_sdio_VERS_10_3_lsb 0
#define xd_p_reg_sdio_VERS_10_4 (*(volatile byte xdata *) 0xF194)
#define    p_reg_sdio_VERS_10_4 0xF194
#define reg_sdio_VERS_10_4_pos 0
#define reg_sdio_VERS_10_4_len 8
#define reg_sdio_VERS_10_4_lsb 0
#define xd_p_reg_sdio_VERS_10_5 (*(volatile byte xdata *) 0xF195)
#define    p_reg_sdio_VERS_10_5 0xF195
#define reg_sdio_VERS_10_5_pos 0
#define reg_sdio_VERS_10_5_len 8
#define reg_sdio_VERS_10_5_lsb 0
#define xd_p_reg_sdio_VERS_10_6 (*(volatile byte xdata *) 0xF196)
#define    p_reg_sdio_VERS_10_6 0xF196
#define reg_sdio_VERS_10_6_pos 0
#define reg_sdio_VERS_10_6_len 8
#define reg_sdio_VERS_10_6_lsb 0
#define xd_p_reg_sdio_VERS_10_7 (*(volatile byte xdata *) 0xF197)
#define    p_reg_sdio_VERS_10_7 0xF197
#define reg_sdio_VERS_10_7_pos 0
#define reg_sdio_VERS_10_7_len 8
#define reg_sdio_VERS_10_7_lsb 0
#define xd_p_reg_sdio_VERS_10_8 (*(volatile byte xdata *) 0xF198)
#define    p_reg_sdio_VERS_10_8 0xF198
#define reg_sdio_VERS_10_8_pos 0
#define reg_sdio_VERS_10_8_len 8
#define reg_sdio_VERS_10_8_lsb 0
#define xd_p_reg_sdio_VERS_10_9 (*(volatile byte xdata *) 0xF199)
#define    p_reg_sdio_VERS_10_9 0xF199
#define reg_sdio_VERS_10_9_pos 0
#define reg_sdio_VERS_10_9_len 8
#define reg_sdio_VERS_10_9_lsb 0
#define xd_p_reg_sdio_VERS_10_A (*(volatile byte xdata *) 0xF19A)
#define    p_reg_sdio_VERS_10_A 0xF19A
#define reg_sdio_VERS_10_A_pos 0
#define reg_sdio_VERS_10_A_len 8
#define reg_sdio_VERS_10_A_lsb 0
#define xd_p_reg_sdio_VERS_10_B (*(volatile byte xdata *) 0xF19B)
#define    p_reg_sdio_VERS_10_B 0xF19B
#define reg_sdio_VERS_10_B_pos 0
#define reg_sdio_VERS_10_B_len 8
#define reg_sdio_VERS_10_B_lsb 0
#define xd_p_reg_sdio_VERS_10_C (*(volatile byte xdata *) 0xF19C)
#define    p_reg_sdio_VERS_10_C 0xF19C
#define reg_sdio_VERS_10_C_pos 0
#define reg_sdio_VERS_10_C_len 8
#define reg_sdio_VERS_10_C_lsb 0
#define xd_p_reg_sdio_VERS_10_D (*(volatile byte xdata *) 0xF19D)
#define    p_reg_sdio_VERS_10_D 0xF19D
#define reg_sdio_VERS_10_D_pos 0
#define reg_sdio_VERS_10_D_len 8
#define reg_sdio_VERS_10_D_lsb 0
#define xd_p_reg_sdio_VERS_10_E (*(volatile byte xdata *) 0xF19E)
#define    p_reg_sdio_VERS_10_E 0xF19E
#define reg_sdio_VERS_10_E_pos 0
#define reg_sdio_VERS_10_E_len 8
#define reg_sdio_VERS_10_E_lsb 0
#define xd_p_reg_sdio_VERS_10_F (*(volatile byte xdata *) 0xF19F)
#define    p_reg_sdio_VERS_10_F 0xF19F
#define reg_sdio_VERS_10_F_pos 0
#define reg_sdio_VERS_10_F_len 8
#define reg_sdio_VERS_10_F_lsb 0
#define xd_p_reg_sdio_VERS_10_10    (*(volatile byte xdata *) 0xF1A0)
#define    p_reg_sdio_VERS_10_10    0xF1A0
#define reg_sdio_VERS_10_10_pos 0
#define reg_sdio_VERS_10_10_len 8
#define reg_sdio_VERS_10_10_lsb 0
#define xd_p_reg_sdio_VERS_10_11    (*(volatile byte xdata *) 0xF1A1)
#define    p_reg_sdio_VERS_10_11    0xF1A1
#define reg_sdio_VERS_10_11_pos 0
#define reg_sdio_VERS_10_11_len 8
#define reg_sdio_VERS_10_11_lsb 0
#define xd_p_reg_sdio_VERS_10_12    (*(volatile byte xdata *) 0xF1A2)
#define    p_reg_sdio_VERS_10_12    0xF1A2
#define reg_sdio_VERS_10_12_pos 0
#define reg_sdio_VERS_10_12_len 8
#define reg_sdio_VERS_10_12_lsb 0
#define xd_p_reg_sdio_VERS_10_13    (*(volatile byte xdata *) 0xF1A3)
#define    p_reg_sdio_VERS_10_13    0xF1A3
#define reg_sdio_VERS_10_13_pos 0
#define reg_sdio_VERS_10_13_len 8
#define reg_sdio_VERS_10_13_lsb 0
#define xd_p_reg_sdio_VERS_10_14    (*(volatile byte xdata *) 0xF1A4)
#define    p_reg_sdio_VERS_10_14    0xF1A4
#define reg_sdio_VERS_10_14_pos 0
#define reg_sdio_VERS_10_14_len 8
#define reg_sdio_VERS_10_14_lsb 0
#define xd_p_reg_sdio_VERS_10_15    (*(volatile byte xdata *) 0xF1A5)
#define    p_reg_sdio_VERS_10_15    0xF1A5
#define reg_sdio_VERS_10_15_pos 0
#define reg_sdio_VERS_10_15_len 8
#define reg_sdio_VERS_10_15_lsb 0
#define xd_p_reg_sdio_VERS_10_16    (*(volatile byte xdata *) 0xF1A6)
#define    p_reg_sdio_VERS_10_16    0xF1A6
#define reg_sdio_VERS_10_16_pos 0
#define reg_sdio_VERS_10_16_len 8
#define reg_sdio_VERS_10_16_lsb 0
#define xd_p_reg_sdio_VERS_10_17    (*(volatile byte xdata *) 0xF1A7)
#define    p_reg_sdio_VERS_10_17    0xF1A7
#define reg_sdio_VERS_10_17_pos 0
#define reg_sdio_VERS_10_17_len 8
#define reg_sdio_VERS_10_17_lsb 0
#define xd_p_reg_sdio_VERS_10_18    (*(volatile byte xdata *) 0xF1A8)
#define    p_reg_sdio_VERS_10_18    0xF1A8
#define reg_sdio_VERS_10_18_pos 0
#define reg_sdio_VERS_10_18_len 8
#define reg_sdio_VERS_10_18_lsb 0
#define xd_p_reg_sdio_VERS_10_19    (*(volatile byte xdata *) 0xF1A9)
#define    p_reg_sdio_VERS_10_19    0xF1A9
#define reg_sdio_VERS_10_19_pos 0
#define reg_sdio_VERS_10_19_len 8
#define reg_sdio_VERS_10_19_lsb 0
#define xd_p_reg_sdio_VERS_10_1A    (*(volatile byte xdata *) 0xF1AA)
#define    p_reg_sdio_VERS_10_1A    0xF1AA
#define reg_sdio_VERS_10_1A_pos 0
#define reg_sdio_VERS_10_1A_len 8
#define reg_sdio_VERS_10_1A_lsb 0
#define xd_p_reg_sdio_VERS_10_1B    (*(volatile byte xdata *) 0xF1AB)
#define    p_reg_sdio_VERS_10_1B    0xF1AB
#define reg_sdio_VERS_10_1B_pos 0
#define reg_sdio_VERS_10_1B_len 8
#define reg_sdio_VERS_10_1B_lsb 0
#define xd_p_reg_sdio_VERS_10_1C    (*(volatile byte xdata *) 0xF1AC)
#define    p_reg_sdio_VERS_10_1C    0xF1AC
#define reg_sdio_VERS_10_1C_pos 0
#define reg_sdio_VERS_10_1C_len 8
#define reg_sdio_VERS_10_1C_lsb 0
#define xd_p_reg_sdio_VERS_10_1D    (*(volatile byte xdata *) 0xF1AD)
#define    p_reg_sdio_VERS_10_1D    0xF1AD
#define reg_sdio_VERS_10_1D_pos 0
#define reg_sdio_VERS_10_1D_len 8
#define reg_sdio_VERS_10_1D_lsb 0
#define xd_p_reg_sdio_VERS_10_1E    (*(volatile byte xdata *) 0xF1AE)
#define    p_reg_sdio_VERS_10_1E    0xF1AE
#define reg_sdio_VERS_10_1E_pos 0
#define reg_sdio_VERS_10_1E_len 8
#define reg_sdio_VERS_10_1E_lsb 0
#define xd_p_reg_sdio_VERS_10_1F    (*(volatile byte xdata *) 0xF1AF)
#define    p_reg_sdio_VERS_10_1F    0xF1AF
#define reg_sdio_VERS_10_1F_pos 0
#define reg_sdio_VERS_10_1F_len 8
#define reg_sdio_VERS_10_1F_lsb 0
#define xd_p_reg_sdio_VERS_10_20    (*(volatile byte xdata *) 0xF1B0)
#define    p_reg_sdio_VERS_10_20    0xF1B0
#define reg_sdio_VERS_10_20_pos 0
#define reg_sdio_VERS_10_20_len 8
#define reg_sdio_VERS_10_20_lsb 0
#define xd_p_reg_sdio_VERS_10_21    (*(volatile byte xdata *) 0xF1B1)
#define    p_reg_sdio_VERS_10_21    0xF1B1
#define reg_sdio_VERS_10_21_pos 0
#define reg_sdio_VERS_10_21_len 8
#define reg_sdio_VERS_10_21_lsb 0
#define xd_p_reg_sdio_VERS_10_22    (*(volatile byte xdata *) 0xF1B2)
#define    p_reg_sdio_VERS_10_22    0xF1B2
#define reg_sdio_VERS_10_22_pos 0
#define reg_sdio_VERS_10_22_len 8
#define reg_sdio_VERS_10_22_lsb 0
#define xd_p_reg_sdio_VERS_10_23    (*(volatile byte xdata *) 0xF1B3)
#define    p_reg_sdio_VERS_10_23    0xF1B3
#define reg_sdio_VERS_10_23_pos 0
#define reg_sdio_VERS_10_23_len 8
#define reg_sdio_VERS_10_23_lsb 0
#define xd_p_reg_sdio_VERS_10_24    (*(volatile byte xdata *) 0xF1B4)
#define    p_reg_sdio_VERS_10_24    0xF1B4
#define reg_sdio_VERS_10_24_pos 0
#define reg_sdio_VERS_10_24_len 8
#define reg_sdio_VERS_10_24_lsb 0
#define xd_p_reg_sdio_VERS_10_25    (*(volatile byte xdata *) 0xF1B5)
#define    p_reg_sdio_VERS_10_25    0xF1B5
#define reg_sdio_VERS_10_25_pos 0
#define reg_sdio_VERS_10_25_len 8
#define reg_sdio_VERS_10_25_lsb 0
#define xd_p_reg_sdio_VERS_10_26    (*(volatile byte xdata *) 0xF1B6)
#define    p_reg_sdio_VERS_10_26    0xF1B6
#define reg_sdio_VERS_10_26_pos 0
#define reg_sdio_VERS_10_26_len 8
#define reg_sdio_VERS_10_26_lsb 0
#define xd_p_reg_sdio_VERS_10_27    (*(volatile byte xdata *) 0xF1B7)
#define    p_reg_sdio_VERS_10_27    0xF1B7
#define reg_sdio_VERS_10_27_pos 0
#define reg_sdio_VERS_10_27_len 8
#define reg_sdio_VERS_10_27_lsb 0
#define xd_p_reg_sdio_END0  (*(volatile byte xdata *) 0xF1B8)
#define    p_reg_sdio_END0  0xF1B8
#define reg_sdio_END0_pos 0
#define reg_sdio_END0_len 8
#define reg_sdio_END0_lsb 0
#define xd_p_reg_sdio_FUNCID1_0 (*(volatile byte xdata *) 0xF1C0)
#define    p_reg_sdio_FUNCID1_0 0xF1C0
#define reg_sdio_FUNCID1_0_pos 0
#define reg_sdio_FUNCID1_0_len 8
#define reg_sdio_FUNCID1_0_lsb 0
#define xd_p_reg_sdio_FUNCID1_1 (*(volatile byte xdata *) 0xF1C1)
#define    p_reg_sdio_FUNCID1_1 0xF1C1
#define reg_sdio_FUNCID1_1_pos 0
#define reg_sdio_FUNCID1_1_len 8
#define reg_sdio_FUNCID1_1_lsb 0
#define xd_p_reg_sdio_FUNCID1_2 (*(volatile byte xdata *) 0xF1C2)
#define    p_reg_sdio_FUNCID1_2 0xF1C2
#define reg_sdio_FUNCID1_2_pos 0
#define reg_sdio_FUNCID1_2_len 8
#define reg_sdio_FUNCID1_2_lsb 0
#define xd_p_reg_sdio_FUNCID1_3 (*(volatile byte xdata *) 0xF1C3)
#define    p_reg_sdio_FUNCID1_3 0xF1C3
#define reg_sdio_FUNCID1_3_pos 0
#define reg_sdio_FUNCID1_3_len 8
#define reg_sdio_FUNCID1_3_lsb 0
#define xd_p_reg_sdio_FUNCE1_0  (*(volatile byte xdata *) 0xF1C4)
#define    p_reg_sdio_FUNCE1_0  0xF1C4
#define reg_sdio_FUNCE1_0_pos 0
#define reg_sdio_FUNCE1_0_len 8
#define reg_sdio_FUNCE1_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_1  (*(volatile byte xdata *) 0xF1C5)
#define    p_reg_sdio_FUNCE1_1  0xF1C5
#define reg_sdio_FUNCE1_1_pos 0
#define reg_sdio_FUNCE1_1_len 8
#define reg_sdio_FUNCE1_1_lsb 0
#define xd_p_reg_sdio_FUNCE1_2  (*(volatile byte xdata *) 0xF1C6)
#define    p_reg_sdio_FUNCE1_2  0xF1C6
#define reg_sdio_FUNCE1_2_pos 0
#define reg_sdio_FUNCE1_2_len 8
#define reg_sdio_FUNCE1_2_lsb 0
#define xd_p_reg_sdio_FUNCE1_3  (*(volatile byte xdata *) 0xF1C7)
#define    p_reg_sdio_FUNCE1_3  0xF1C7
#define reg_sdio_FUNCE1_3_pos 0
#define reg_sdio_FUNCE1_3_len 8
#define reg_sdio_FUNCE1_3_lsb 0
#define xd_p_reg_sdio_FUNCE1_4  (*(volatile byte xdata *) 0xF1C8)
#define    p_reg_sdio_FUNCE1_4  0xF1C8
#define reg_sdio_FUNCE1_4_pos 0
#define reg_sdio_FUNCE1_4_len 8
#define reg_sdio_FUNCE1_4_lsb 0
#define xd_p_reg_sdio_FUNCE1_5_7_0  (*(volatile byte xdata *) 0xF1C9)
#define    p_reg_sdio_FUNCE1_5_7_0  0xF1C9
#define reg_sdio_FUNCE1_5_7_0_pos 0
#define reg_sdio_FUNCE1_5_7_0_len 8
#define reg_sdio_FUNCE1_5_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_5_15_8 (*(volatile byte xdata *) 0xF1CA)
#define    p_reg_sdio_FUNCE1_5_15_8 0xF1CA
#define reg_sdio_FUNCE1_5_15_8_pos 0
#define reg_sdio_FUNCE1_5_15_8_len 8
#define reg_sdio_FUNCE1_5_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_5_23_16    (*(volatile byte xdata *) 0xF1CB)
#define    p_reg_sdio_FUNCE1_5_23_16    0xF1CB
#define reg_sdio_FUNCE1_5_23_16_pos 0
#define reg_sdio_FUNCE1_5_23_16_len 8
#define reg_sdio_FUNCE1_5_23_16_lsb 16
#define xd_p_reg_sdio_FUNCE1_5_31_24    (*(volatile byte xdata *) 0xF1CC)
#define    p_reg_sdio_FUNCE1_5_31_24    0xF1CC
#define reg_sdio_FUNCE1_5_31_24_pos 0
#define reg_sdio_FUNCE1_5_31_24_len 8
#define reg_sdio_FUNCE1_5_31_24_lsb 24
#define xd_p_reg_sdio_FUNCE1_9_7_0  (*(volatile byte xdata *) 0xF1CD)
#define    p_reg_sdio_FUNCE1_9_7_0  0xF1CD
#define reg_sdio_FUNCE1_9_7_0_pos 0
#define reg_sdio_FUNCE1_9_7_0_len 8
#define reg_sdio_FUNCE1_9_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_9_15_8 (*(volatile byte xdata *) 0xF1CE)
#define    p_reg_sdio_FUNCE1_9_15_8 0xF1CE
#define reg_sdio_FUNCE1_9_15_8_pos 0
#define reg_sdio_FUNCE1_9_15_8_len 8
#define reg_sdio_FUNCE1_9_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_9_23_16    (*(volatile byte xdata *) 0xF1CF)
#define    p_reg_sdio_FUNCE1_9_23_16    0xF1CF
#define reg_sdio_FUNCE1_9_23_16_pos 0
#define reg_sdio_FUNCE1_9_23_16_len 8
#define reg_sdio_FUNCE1_9_23_16_lsb 16
#define xd_p_reg_sdio_FUNCE1_9_31_24    (*(volatile byte xdata *) 0xF1D0)
#define    p_reg_sdio_FUNCE1_9_31_24    0xF1D0
#define reg_sdio_FUNCE1_9_31_24_pos 0
#define reg_sdio_FUNCE1_9_31_24_len 8
#define reg_sdio_FUNCE1_9_31_24_lsb 24
#define xd_p_reg_sdio_FUNCE1_D  (*(volatile byte xdata *) 0xF1D1)
#define    p_reg_sdio_FUNCE1_D  0xF1D1
#define reg_sdio_FUNCE1_D_pos 0
#define reg_sdio_FUNCE1_D_len 8
#define reg_sdio_FUNCE1_D_lsb 0
#define xd_p_reg_sdio_FUNCE1_E_7_0  (*(volatile byte xdata *) 0xF1D2)
#define    p_reg_sdio_FUNCE1_E_7_0  0xF1D2
#define reg_sdio_FUNCE1_E_7_0_pos 0
#define reg_sdio_FUNCE1_E_7_0_len 8
#define reg_sdio_FUNCE1_E_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_E_15_8 (*(volatile byte xdata *) 0xF1D3)
#define    p_reg_sdio_FUNCE1_E_15_8 0xF1D3
#define reg_sdio_FUNCE1_E_15_8_pos 0
#define reg_sdio_FUNCE1_E_15_8_len 8
#define reg_sdio_FUNCE1_E_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_10_7_0 (*(volatile byte xdata *) 0xF1D4)
#define    p_reg_sdio_FUNCE1_10_7_0 0xF1D4
#define reg_sdio_FUNCE1_10_7_0_pos 0
#define reg_sdio_FUNCE1_10_7_0_len 8
#define reg_sdio_FUNCE1_10_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_10_15_8    (*(volatile byte xdata *) 0xF1D5)
#define    p_reg_sdio_FUNCE1_10_15_8    0xF1D5
#define reg_sdio_FUNCE1_10_15_8_pos 0
#define reg_sdio_FUNCE1_10_15_8_len 8
#define reg_sdio_FUNCE1_10_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_10_23_16   (*(volatile byte xdata *) 0xF1D6)
#define    p_reg_sdio_FUNCE1_10_23_16   0xF1D6
#define reg_sdio_FUNCE1_10_23_16_pos 0
#define reg_sdio_FUNCE1_10_23_16_len 8
#define reg_sdio_FUNCE1_10_23_16_lsb 16
#define xd_p_reg_sdio_FUNCE1_10_31_24   (*(volatile byte xdata *) 0xF1D7)
#define    p_reg_sdio_FUNCE1_10_31_24   0xF1D7
#define reg_sdio_FUNCE1_10_31_24_pos 0
#define reg_sdio_FUNCE1_10_31_24_len 8
#define reg_sdio_FUNCE1_10_31_24_lsb 24
#define xd_p_reg_sdio_FUNCE1_14 (*(volatile byte xdata *) 0xF1D8)
#define    p_reg_sdio_FUNCE1_14 0xF1D8
#define reg_sdio_FUNCE1_14_pos 0
#define reg_sdio_FUNCE1_14_len 8
#define reg_sdio_FUNCE1_14_lsb 0
#define xd_p_reg_sdio_FUNCE1_15 (*(volatile byte xdata *) 0xF1D9)
#define    p_reg_sdio_FUNCE1_15 0xF1D9
#define reg_sdio_FUNCE1_15_pos 0
#define reg_sdio_FUNCE1_15_len 8
#define reg_sdio_FUNCE1_15_lsb 0
#define xd_p_reg_sdio_FUNCE1_16 (*(volatile byte xdata *) 0xF1DA)
#define    p_reg_sdio_FUNCE1_16 0xF1DA
#define reg_sdio_FUNCE1_16_pos 0
#define reg_sdio_FUNCE1_16_len 8
#define reg_sdio_FUNCE1_16_lsb 0
#define xd_p_reg_sdio_FUNCE1_17 (*(volatile byte xdata *) 0xF1DB)
#define    p_reg_sdio_FUNCE1_17 0xF1DB
#define reg_sdio_FUNCE1_17_pos 0
#define reg_sdio_FUNCE1_17_len 8
#define reg_sdio_FUNCE1_17_lsb 0
#define xd_p_reg_sdio_FUNCE1_18 (*(volatile byte xdata *) 0xF1DC)
#define    p_reg_sdio_FUNCE1_18 0xF1DC
#define reg_sdio_FUNCE1_18_pos 0
#define reg_sdio_FUNCE1_18_len 8
#define reg_sdio_FUNCE1_18_lsb 0
#define xd_p_reg_sdio_FUNCE1_19 (*(volatile byte xdata *) 0xF1DD)
#define    p_reg_sdio_FUNCE1_19 0xF1DD
#define reg_sdio_FUNCE1_19_pos 0
#define reg_sdio_FUNCE1_19_len 8
#define reg_sdio_FUNCE1_19_lsb 0
#define xd_p_reg_sdio_FUNCE1_1A_7_0 (*(volatile byte xdata *) 0xF1DE)
#define    p_reg_sdio_FUNCE1_1A_7_0 0xF1DE
#define reg_sdio_FUNCE1_1A_7_0_pos 0
#define reg_sdio_FUNCE1_1A_7_0_len 8
#define reg_sdio_FUNCE1_1A_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_1A_15_8    (*(volatile byte xdata *) 0xF1DF)
#define    p_reg_sdio_FUNCE1_1A_15_8    0xF1DF
#define reg_sdio_FUNCE1_1A_15_8_pos 0
#define reg_sdio_FUNCE1_1A_15_8_len 8
#define reg_sdio_FUNCE1_1A_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_1C_7_0 (*(volatile byte xdata *) 0xF1E0)
#define    p_reg_sdio_FUNCE1_1C_7_0 0xF1E0
#define reg_sdio_FUNCE1_1C_7_0_pos 0
#define reg_sdio_FUNCE1_1C_7_0_len 8
#define reg_sdio_FUNCE1_1C_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_1C_15_8    (*(volatile byte xdata *) 0xF1E1)
#define    p_reg_sdio_FUNCE1_1C_15_8    0xF1E1
#define reg_sdio_FUNCE1_1C_15_8_pos 0
#define reg_sdio_FUNCE1_1C_15_8_len 8
#define reg_sdio_FUNCE1_1C_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_1E_7_0 (*(volatile byte xdata *) 0xF1E2)
#define    p_reg_sdio_FUNCE1_1E_7_0 0xF1E2
#define reg_sdio_FUNCE1_1E_7_0_pos 0
#define reg_sdio_FUNCE1_1E_7_0_len 8
#define reg_sdio_FUNCE1_1E_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_1E_15_8    (*(volatile byte xdata *) 0xF1E3)
#define    p_reg_sdio_FUNCE1_1E_15_8    0xF1E3
#define reg_sdio_FUNCE1_1E_15_8_pos 0
#define reg_sdio_FUNCE1_1E_15_8_len 8
#define reg_sdio_FUNCE1_1E_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_20_7_0 (*(volatile byte xdata *) 0xF1E4)
#define    p_reg_sdio_FUNCE1_20_7_0 0xF1E4
#define reg_sdio_FUNCE1_20_7_0_pos 0
#define reg_sdio_FUNCE1_20_7_0_len 8
#define reg_sdio_FUNCE1_20_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_20_15_8    (*(volatile byte xdata *) 0xF1E5)
#define    p_reg_sdio_FUNCE1_20_15_8    0xF1E5
#define reg_sdio_FUNCE1_20_15_8_pos 0
#define reg_sdio_FUNCE1_20_15_8_len 8
#define reg_sdio_FUNCE1_20_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_22_7_0 (*(volatile byte xdata *) 0xF1E6)
#define    p_reg_sdio_FUNCE1_22_7_0 0xF1E6
#define reg_sdio_FUNCE1_22_7_0_pos 0
#define reg_sdio_FUNCE1_22_7_0_len 8
#define reg_sdio_FUNCE1_22_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_22_15_8    (*(volatile byte xdata *) 0xF1E7)
#define    p_reg_sdio_FUNCE1_22_15_8    0xF1E7
#define reg_sdio_FUNCE1_22_15_8_pos 0
#define reg_sdio_FUNCE1_22_15_8_len 8
#define reg_sdio_FUNCE1_22_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_24_7_0 (*(volatile byte xdata *) 0xF1E8)
#define    p_reg_sdio_FUNCE1_24_7_0 0xF1E8
#define reg_sdio_FUNCE1_24_7_0_pos 0
#define reg_sdio_FUNCE1_24_7_0_len 8
#define reg_sdio_FUNCE1_24_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_24_15_8    (*(volatile byte xdata *) 0xF1E9)
#define    p_reg_sdio_FUNCE1_24_15_8    0xF1E9
#define reg_sdio_FUNCE1_24_15_8_pos 0
#define reg_sdio_FUNCE1_24_15_8_len 8
#define reg_sdio_FUNCE1_24_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_26_7_0 (*(volatile byte xdata *) 0xF1EA)
#define    p_reg_sdio_FUNCE1_26_7_0 0xF1EA
#define reg_sdio_FUNCE1_26_7_0_pos 0
#define reg_sdio_FUNCE1_26_7_0_len 8
#define reg_sdio_FUNCE1_26_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_26_15_8    (*(volatile byte xdata *) 0xF1EB)
#define    p_reg_sdio_FUNCE1_26_15_8    0xF1EB
#define reg_sdio_FUNCE1_26_15_8_pos 0
#define reg_sdio_FUNCE1_26_15_8_len 8
#define reg_sdio_FUNCE1_26_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_28_7_0 (*(volatile byte xdata *) 0xF1EC)
#define    p_reg_sdio_FUNCE1_28_7_0 0xF1EC
#define reg_sdio_FUNCE1_28_7_0_pos 0
#define reg_sdio_FUNCE1_28_7_0_len 8
#define reg_sdio_FUNCE1_28_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_28_15_8    (*(volatile byte xdata *) 0xF1ED)
#define    p_reg_sdio_FUNCE1_28_15_8    0xF1ED
#define reg_sdio_FUNCE1_28_15_8_pos 0
#define reg_sdio_FUNCE1_28_15_8_len 8
#define reg_sdio_FUNCE1_28_15_8_lsb 8
#define xd_p_reg_sdio_FUNCE1_2A_7_0 (*(volatile byte xdata *) 0xF1EE)
#define    p_reg_sdio_FUNCE1_2A_7_0 0xF1EE
#define reg_sdio_FUNCE1_2A_7_0_pos 0
#define reg_sdio_FUNCE1_2A_7_0_len 8
#define reg_sdio_FUNCE1_2A_7_0_lsb 0
#define xd_p_reg_sdio_FUNCE1_2A_15_8    (*(volatile byte xdata *) 0xF1EF)
#define    p_reg_sdio_FUNCE1_2A_15_8    0xF1EF
#define reg_sdio_FUNCE1_2A_15_8_pos 0
#define reg_sdio_FUNCE1_2A_15_8_len 8
#define reg_sdio_FUNCE1_2A_15_8_lsb 8
#define xd_p_reg_sdio_END1  (*(volatile byte xdata *) 0xF1F0)
#define    p_reg_sdio_END1  0xF1F0
#define reg_sdio_END1_pos 0
#define reg_sdio_END1_len 8
#define reg_sdio_END1_lsb 0
#define xd_r_sdioc_tx_fifo_empty    (*(volatile byte xdata *) 0xF210)
#define    r_sdioc_tx_fifo_empty    0xF210
#define sdioc_tx_fifo_empty_pos 0
#define sdioc_tx_fifo_empty_len 1
#define sdioc_tx_fifo_empty_lsb 0
#define xd_p_reg_sdio_53ra  (*(volatile byte xdata *) 0xF210)
#define    p_reg_sdio_53ra  0xF210
#define reg_sdio_53ra_pos 1
#define reg_sdio_53ra_len 1
#define reg_sdio_53ra_lsb 0
#define xd_p_reg_sdioc_rd_wait_dly  (*(volatile byte xdata *) 0xF210)
#define    p_reg_sdioc_rd_wait_dly  0xF210
#define reg_sdioc_rd_wait_dly_pos 4
#define reg_sdioc_rd_wait_dly_len 2
#define reg_sdioc_rd_wait_dly_lsb 0
#define xd_p_reg_write_mbx_complete (*(volatile byte xdata *) 0xF211)
#define    p_reg_write_mbx_complete 0xF211
#define reg_write_mbx_complete_pos 0
#define reg_write_mbx_complete_len 1
#define reg_write_mbx_complete_lsb 0
#define xd_p_reg_sdioc_sw_err   (*(volatile byte xdata *) 0xF211)
#define    p_reg_sdioc_sw_err   0xF211
#define reg_sdioc_sw_err_pos 1
#define reg_sdioc_sw_err_len 1
#define reg_sdioc_sw_err_lsb 0
#define xd_p_reg_sdioc_tran_dat_dly (*(volatile byte xdata *) 0xF211)
#define    p_reg_sdioc_tran_dat_dly 0xF211
#define reg_sdioc_tran_dat_dly_pos 4
#define reg_sdioc_tran_dat_dly_len 3
#define reg_sdioc_tran_dat_dly_lsb 0
#define xd_p_reg_sdioc_external_int_en  (*(volatile byte xdata *) 0xF212)
#define    p_reg_sdioc_external_int_en  0xF212
#define reg_sdioc_external_int_en_pos 1
#define reg_sdioc_external_int_en_len 1
#define reg_sdioc_external_int_en_lsb 0
#define xd_r_reg_sdioc_external_int (*(volatile byte xdata *) 0xF212)
#define    r_reg_sdioc_external_int 0xF212
#define reg_sdioc_external_int_pos 2
#define reg_sdioc_external_int_len 1
#define reg_sdioc_external_int_lsb 0
#define xd_p_reg_auto_clrWB_en  (*(volatile byte xdata *) 0xF213)
#define    p_reg_auto_clrWB_en  0xF213
#define reg_auto_clrWB_en_pos 0
#define reg_auto_clrWB_en_len 1
#define reg_auto_clrWB_en_lsb 0
#define xd_p_reg_sdioc_crc_s_dly    (*(volatile byte xdata *) 0xF213)
#define    p_reg_sdioc_crc_s_dly    0xF213
#define reg_sdioc_crc_s_dly_pos 1
#define reg_sdioc_crc_s_dly_len 1
#define reg_sdioc_crc_s_dly_lsb 0
#define xd_p_reg_sdioc_neg_out_sel  (*(volatile byte xdata *) 0xF213)
#define    p_reg_sdioc_neg_out_sel  0xF213
#define reg_sdioc_neg_out_sel_pos 2
#define reg_sdioc_neg_out_sel_len 1
#define reg_sdioc_neg_out_sel_lsb 0
#define xd_p_reg_sdioc_tx_fifo_rst  (*(volatile byte xdata *) 0xF213)
#define    p_reg_sdioc_tx_fifo_rst  0xF213
#define reg_sdioc_tx_fifo_rst_pos 4
#define reg_sdioc_tx_fifo_rst_len 1
#define reg_sdioc_tx_fifo_rst_lsb 0
#define xd_p_reg_sdioc_rx_fifo_rst  (*(volatile byte xdata *) 0xF213)
#define    p_reg_sdioc_rx_fifo_rst  0xF213
#define reg_sdioc_rx_fifo_rst_pos 5
#define reg_sdioc_rx_fifo_rst_len 1
#define reg_sdioc_rx_fifo_rst_lsb 0
#define xd_p_reg_sdioc_auto_rst_sm_en   (*(volatile byte xdata *) 0xF213)
#define    p_reg_sdioc_auto_rst_sm_en   0xF213
#define reg_sdioc_auto_rst_sm_en_pos 6
#define reg_sdioc_auto_rst_sm_en_len 1
#define reg_sdioc_auto_rst_sm_en_lsb 0
#define xd_p_sdio_link_clr_Wbusy_en (*(volatile byte xdata *) 0xF214)
#define    p_sdio_link_clr_Wbusy_en 0xF214
#define sdio_link_clr_Wbusy_en_pos 0
#define sdio_link_clr_Wbusy_en_len 1
#define sdio_link_clr_Wbusy_en_lsb 0
#define xd_p_sdio_link_clr_Wbusy    (*(volatile byte xdata *) 0xF214)
#define    p_sdio_link_clr_Wbusy    0xF214
#define sdio_link_clr_Wbusy_pos 1
#define sdio_link_clr_Wbusy_len 1
#define sdio_link_clr_Wbusy_lsb 0
#define xd_p_reg_sdioc_dbg_sel  (*(volatile byte xdata *) 0xF214)
#define    p_reg_sdioc_dbg_sel  0xF214
#define reg_sdioc_dbg_sel_pos 4
#define reg_sdioc_dbg_sel_len 4
#define reg_sdioc_dbg_sel_lsb 0
#define xd_p_reg_sdioc_skip_ocr (*(volatile byte xdata *) 0xF215)
#define    p_reg_sdioc_skip_ocr 0xF215
#define reg_sdioc_skip_ocr_pos 0
#define reg_sdioc_skip_ocr_len 1
#define reg_sdioc_skip_ocr_lsb 0
#define xd_p_reg_sdioc_spi_ns   (*(volatile byte xdata *) 0xF215)
#define    p_reg_sdioc_spi_ns   0xF215
#define reg_sdioc_spi_ns_pos 1
#define reg_sdioc_spi_ns_len 1
#define reg_sdioc_spi_ns_lsb 0
#define xd_r_sdio_spi_mode  (*(volatile byte xdata *) 0xF215)
#define    r_sdio_spi_mode  0xF215
#define sdio_spi_mode_pos 7
#define sdio_spi_mode_len 1
#define sdio_spi_mode_lsb 0
#define xd_r_link_ofsm_mailbox_int  (*(volatile byte xdata *) 0xF402)
#define    r_link_ofsm_mailbox_int  0xF402
#define link_ofsm_mailbox_int_pos 4
#define link_ofsm_mailbox_int_len 1
#define link_ofsm_mailbox_int_lsb 0
#define xd_r_link_ofsm_dvbt_int (*(volatile byte xdata *) 0xF403)
#define    r_link_ofsm_dvbt_int 0xF403
#define link_ofsm_dvbt_int_pos 2
#define link_ofsm_dvbt_int_len 1
#define link_ofsm_dvbt_int_lsb 0
#define xd_p_reg_dvbt_intsts    (*(volatile byte xdata *) 0xF404)
#define    p_reg_dvbt_intsts    0xF404
#define reg_dvbt_intsts_pos 2
#define reg_dvbt_intsts_len 1
#define reg_dvbt_intsts_lsb 0
#define xd_p_reg_link_mailbox_int   (*(volatile byte xdata *) 0xF405)
#define    p_reg_link_mailbox_int   0xF405
#define reg_link_mailbox_int_pos 5
#define reg_link_mailbox_int_len 1
#define reg_link_mailbox_int_lsb 0
#define xd_p_reg_mailbox_wptr_rst   (*(volatile byte xdata *) 0xF408)
#define    p_reg_mailbox_wptr_rst   0xF408
#define reg_mailbox_wptr_rst_pos 0
#define reg_mailbox_wptr_rst_len 1
#define reg_mailbox_wptr_rst_lsb 0
#define xd_p_reg_link_mailbox_wptr  (*(volatile byte xdata *) 0xF409)
#define    p_reg_link_mailbox_wptr  0xF409
#define reg_link_mailbox_wptr_pos 0
#define reg_link_mailbox_wptr_len 8
#define reg_link_mailbox_wptr_lsb 0
#define xd_p_reg_link_mailbox_wend  (*(volatile byte xdata *) 0xF410)
#define    p_reg_link_mailbox_wend  0xF410
#define reg_link_mailbox_wend_pos 0
#define reg_link_mailbox_wend_len 1
#define reg_link_mailbox_wend_lsb 0
#define xd_p_reg_rd_data_sel    (*(volatile byte xdata *) 0xF411)
#define    p_reg_rd_data_sel    0xF411
#define reg_rd_data_sel_pos 0
#define reg_rd_data_sel_len 2
#define reg_rd_data_sel_lsb 0
#define xd_p_reg_fifo_rd_length_7_0 (*(volatile byte xdata *) 0xF412)
#define    p_reg_fifo_rd_length_7_0 0xF412
#define reg_fifo_rd_length_7_0_pos 0
#define reg_fifo_rd_length_7_0_len 8
#define reg_fifo_rd_length_7_0_lsb 0
#define xd_p_reg_fifo_rd_length_15_8    (*(volatile byte xdata *) 0xF413)
#define    p_reg_fifo_rd_length_15_8    0xF413
#define reg_fifo_rd_length_15_8_pos 0
#define reg_fifo_rd_length_15_8_len 8
#define reg_fifo_rd_length_15_8_lsb 8
#define xd_p_reg_fifo_rd_length_17_16   (*(volatile byte xdata *) 0xF414)
#define    p_reg_fifo_rd_length_17_16   0xF414
#define reg_fifo_rd_length_17_16_pos 0
#define reg_fifo_rd_length_17_16_len 2
#define reg_fifo_rd_length_17_16_lsb 16
#define xd_p_reg_rst_fifo_rptr  (*(volatile byte xdata *) 0xF414)
#define    p_reg_rst_fifo_rptr  0xF414
#define reg_rst_fifo_rptr_pos 6
#define reg_rst_fifo_rptr_len 1
#define reg_rst_fifo_rptr_lsb 0
#define xd_p_reg_force_sel  (*(volatile byte xdata *) 0xF414)
#define    p_reg_force_sel  0xF414
#define reg_force_sel_pos 7
#define reg_force_sel_len 1
#define reg_force_sel_lsb 0
#define xd_p_reg_fifo_rptr_7_0  (*(volatile byte xdata *) 0xF415)
#define    p_reg_fifo_rptr_7_0  0xF415
#define reg_fifo_rptr_7_0_pos 0
#define reg_fifo_rptr_7_0_len 8
#define reg_fifo_rptr_7_0_lsb 0
#define xd_p_reg_fifo_rptr_15_8 (*(volatile byte xdata *) 0xF416)
#define    p_reg_fifo_rptr_15_8 0xF416
#define reg_fifo_rptr_15_8_pos 0
#define reg_fifo_rptr_15_8_len 8
#define reg_fifo_rptr_15_8_lsb 8
#define xd_p_reg_fifo_rptr_17_16    (*(volatile byte xdata *) 0xF417)
#define    p_reg_fifo_rptr_17_16    0xF417
#define reg_fifo_rptr_17_16_pos 0
#define reg_fifo_rptr_17_16_len 2
#define reg_fifo_rptr_17_16_lsb 16
#define xd_p_reg_max_package_size_7_0   (*(volatile byte xdata *) 0xF418)
#define    p_reg_max_package_size_7_0   0xF418
#define reg_max_package_size_7_0_pos 0
#define reg_max_package_size_7_0_len 8
#define reg_max_package_size_7_0_lsb 0
#define xd_p_reg_max_package_size_11_8  (*(volatile byte xdata *) 0xF419)
#define    p_reg_max_package_size_11_8  0xF419
#define reg_max_package_size_11_8_pos 0
#define reg_max_package_size_11_8_len 4
#define reg_max_package_size_11_8_lsb 8
#define xd_p_reg_dvbt_en    (*(volatile byte xdata *) 0xF41A)
#define    p_reg_dvbt_en    0xF41A
#define reg_dvbt_en_pos 0
#define reg_dvbt_en_len 1
#define reg_dvbt_en_lsb 0
#define xd_p_reg_dvbt_bufsize   (*(volatile byte xdata *) 0xF41A)
#define    p_reg_dvbt_bufsize   0xF41A
#define reg_dvbt_bufsize_pos 1
#define reg_dvbt_bufsize_len 1
#define reg_dvbt_bufsize_lsb 0
#define xd_p_reg_dvbt_path  (*(volatile byte xdata *) 0xF41A)
#define    p_reg_dvbt_path  0xF41A
#define reg_dvbt_path_pos 2
#define reg_dvbt_path_len 1
#define reg_dvbt_path_lsb 0
#define xd_p_reg_dvbt_r5    (*(volatile byte xdata *) 0xF41A)
#define    p_reg_dvbt_r5    0xF41A
#define reg_dvbt_r5_pos 3
#define reg_dvbt_r5_len 1
#define reg_dvbt_r5_lsb 0
#define xd_p_reg_mailbox_inten  (*(volatile byte xdata *) 0xF41E)
#define    p_reg_mailbox_inten  0xF41E
#define reg_mailbox_inten_pos 4
#define reg_mailbox_inten_len 1
#define reg_mailbox_inten_lsb 0
#define xd_p_reg_dvbt_inten (*(volatile byte xdata *) 0xF41F)
#define    p_reg_dvbt_inten 0xF41F
#define reg_dvbt_inten_pos 2
#define reg_dvbt_inten_len 1
#define reg_dvbt_inten_lsb 0
#define xd_r_link_ofsm_ip_length_7_0    (*(volatile byte xdata *) 0xF447)
#define    r_link_ofsm_ip_length_7_0    0xF447
#define link_ofsm_ip_length_7_0_pos 0
#define link_ofsm_ip_length_7_0_len 8
#define link_ofsm_ip_length_7_0_lsb 0
#define xd_r_link_ofsm_ip_length_11_8   (*(volatile byte xdata *) 0xF448)
#define    r_link_ofsm_ip_length_11_8   0xF448
#define link_ofsm_ip_length_11_8_pos 0
#define link_ofsm_ip_length_11_8_len 4
#define link_ofsm_ip_length_11_8_lsb 8
#define xd_r_link_ofsm_ip_valid (*(volatile byte xdata *) 0xF448)
#define    r_link_ofsm_ip_valid 0xF448
#define link_ofsm_ip_valid_pos 7
#define link_ofsm_ip_valid_len 1
#define link_ofsm_ip_valid_lsb 0
#define xd_p_reg_spi_master (*(volatile byte xdata *) 0xF600)
#define    p_reg_spi_master 0xF600
#define reg_spi_master_pos 0
#define reg_spi_master_len 1
#define reg_spi_master_lsb 0
#define xd_p_reg_spi_bit    (*(volatile byte xdata *) 0xF601)
#define    p_reg_spi_bit    0xF601
#define reg_spi_bit_pos 0
#define reg_spi_bit_len 2
#define reg_spi_bit_lsb 0
#define xd_p_reg_spi_cs (*(volatile byte xdata *) 0xF602)
#define    p_reg_spi_cs 0xF602
#define reg_spi_cs_pos 0
#define reg_spi_cs_len 1
#define reg_spi_cs_lsb 0
#define xd_p_reg_spi_polarity   (*(volatile byte xdata *) 0xF602)
#define    p_reg_spi_polarity   0xF602
#define reg_spi_polarity_pos 1
#define reg_spi_polarity_len 1
#define reg_spi_polarity_lsb 0
#define xd_p_reg_spi_phase  (*(volatile byte xdata *) 0xF602)
#define    p_reg_spi_phase  0xF602
#define reg_spi_phase_pos 2
#define reg_spi_phase_len 1
#define reg_spi_phase_lsb 0
#define xd_p_reg_spi_1st_byte   (*(volatile byte xdata *) 0xF603)
#define    p_reg_spi_1st_byte   0xF603
#define reg_spi_1st_byte_pos 0
#define reg_spi_1st_byte_len 4
#define reg_spi_1st_byte_lsb 0
#define xd_p_reg_spi_clk_div    (*(volatile byte xdata *) 0xF603)
#define    p_reg_spi_clk_div    0xF603
#define reg_spi_clk_div_pos 4
#define reg_spi_clk_div_len 4
#define reg_spi_clk_div_lsb 0
#define xd_p_reg_spi_rst    (*(volatile byte xdata *) 0xF604)
#define    p_reg_spi_rst    0xF604
#define reg_spi_rst_pos 0
#define reg_spi_rst_len 1
#define reg_spi_rst_lsb 0
#define xd_r_reg_spi_tx_done    (*(volatile byte xdata *) 0xF604)
#define    r_reg_spi_tx_done    0xF604
#define reg_spi_tx_done_pos 1
#define reg_spi_tx_done_len 1
#define reg_spi_tx_done_lsb 0
#define xd_r_reg_spi_rx_done    (*(volatile byte xdata *) 0xF604)
#define    r_reg_spi_rx_done    0xF604
#define reg_spi_rx_done_pos 2
#define reg_spi_rx_done_len 1
#define reg_spi_rx_done_lsb 0
#define xd_p_reg_spi_dbg_sel    (*(volatile byte xdata *) 0xF604)
#define    p_reg_spi_dbg_sel    0xF604
#define reg_spi_dbg_sel_pos 3
#define reg_spi_dbg_sel_len 1
#define reg_spi_dbg_sel_lsb 0
#define xd_r_reg_spi_crc_err    (*(volatile byte xdata *) 0xF604)
#define    r_reg_spi_crc_err    0xF604
#define reg_spi_crc_err_pos 4
#define reg_spi_crc_err_len 4
#define reg_spi_crc_err_lsb 0
#define xd_r_link_ofsm_usb20_mode   (*(volatile byte xdata *) 0xF613)
#define    r_link_ofsm_usb20_mode   0xF613
#define link_ofsm_usb20_mode_pos 0
#define link_ofsm_usb20_mode_len 1
#define link_ofsm_usb20_mode_lsb 0
#define xd_r_link_ofsm_strap_usb20_mode (*(volatile byte xdata *) 0xF613)
#define    r_link_ofsm_strap_usb20_mode 0xF613
#define link_ofsm_strap_usb20_mode_pos 1
#define link_ofsm_strap_usb20_mode_len 1
#define link_ofsm_strap_usb20_mode_lsb 0
#define xd_p_reg_link_stick_mem_end_7_0 (*(volatile byte xdata *) 0xF618)
#define    p_reg_link_stick_mem_end_7_0 0xF618
#define reg_link_stick_mem_end_7_0_pos 0
#define reg_link_stick_mem_end_7_0_len 8
#define reg_link_stick_mem_end_7_0_lsb 0
#define xd_p_reg_link_stick_mem_end_15_8    (*(volatile byte xdata *) 0xF619)
#define    p_reg_link_stick_mem_end_15_8    0xF619
#define reg_link_stick_mem_end_15_8_pos 0
#define reg_link_stick_mem_end_15_8_len 8
#define reg_link_stick_mem_end_15_8_lsb 8
#define xd_p_reg_ofdm_auto_write_addr_l (*(volatile byte xdata *) 0xF61A)
#define    p_reg_ofdm_auto_write_addr_l 0xF61A
#define reg_ofdm_auto_write_addr_l_pos 0
#define reg_ofdm_auto_write_addr_l_len 8
#define reg_ofdm_auto_write_addr_l_lsb 0
#define xd_p_reg_ofdm_auto_write_addr_h (*(volatile byte xdata *) 0xF61B)
#define    p_reg_ofdm_auto_write_addr_h 0xF61B
#define reg_ofdm_auto_write_addr_h_pos 0
#define reg_ofdm_auto_write_addr_h_len 8
#define reg_ofdm_auto_write_addr_h_lsb 0
#define xd_p_reg_link_auto_write_addr_l (*(volatile byte xdata *) 0xF61C)
#define    p_reg_link_auto_write_addr_l 0xF61C
#define reg_link_auto_write_addr_l_pos 0
#define reg_link_auto_write_addr_l_len 8
#define reg_link_auto_write_addr_l_lsb 0
#define xd_p_reg_link_auto_write_addr_h (*(volatile byte xdata *) 0xF61D)
#define    p_reg_link_auto_write_addr_h 0xF61D
#define reg_link_auto_write_addr_h_pos 0
#define reg_link_auto_write_addr_h_len 8
#define reg_link_auto_write_addr_h_lsb 0
#define xd_p_reg_mailbox_auto_write_addr    (*(volatile byte xdata *) 0xF61E)
#define    p_reg_mailbox_auto_write_addr    0xF61E
#define reg_mailbox_auto_write_addr_pos 0
#define reg_mailbox_auto_write_addr_len 8
#define reg_mailbox_auto_write_addr_lsb 0
#define xd_p_reg_usbmem_auto_write_addr (*(volatile byte xdata *) 0xF61F)
#define    p_reg_usbmem_auto_write_addr 0xF61F
#define reg_usbmem_auto_write_addr_pos 0
#define reg_usbmem_auto_write_addr_len 8
#define reg_usbmem_auto_write_addr_lsb 0
#define xd_p_reg_mailbox_auto_read_addr (*(volatile byte xdata *) 0xF620)
#define    p_reg_mailbox_auto_read_addr 0xF620
#define reg_mailbox_auto_read_addr_pos 0
#define reg_mailbox_auto_read_addr_len 8
#define reg_mailbox_auto_read_addr_lsb 0
#define xd_p_reg_usbmem_auto_read_addr  (*(volatile byte xdata *) 0xF621)
#define    p_reg_usbmem_auto_read_addr  0xF621
#define reg_usbmem_auto_read_addr_pos 0
#define reg_usbmem_auto_read_addr_len 8
#define reg_usbmem_auto_read_addr_lsb 0
#define xd_p_reg_auto_write_ofdm    (*(volatile byte xdata *) 0xF622)
#define    p_reg_auto_write_ofdm    0xF622
#define reg_auto_write_ofdm_pos 0
#define reg_auto_write_ofdm_len 1
#define reg_auto_write_ofdm_lsb 0
#define xd_p_reg_auto_write_link    (*(volatile byte xdata *) 0xF622)
#define    p_reg_auto_write_link    0xF622
#define reg_auto_write_link_pos 1
#define reg_auto_write_link_len 1
#define reg_auto_write_link_lsb 0
#define xd_p_reg_auto_write_mailbox (*(volatile byte xdata *) 0xF622)
#define    p_reg_auto_write_mailbox 0xF622
#define reg_auto_write_mailbox_pos 2
#define reg_auto_write_mailbox_len 1
#define reg_auto_write_mailbox_lsb 0
#define xd_p_reg_auto_write_usbmem  (*(volatile byte xdata *) 0xF622)
#define    p_reg_auto_write_usbmem  0xF622
#define reg_auto_write_usbmem_pos 3
#define reg_auto_write_usbmem_len 1
#define reg_auto_write_usbmem_lsb 0
#define xd_p_reg_auto_write_i2cm    (*(volatile byte xdata *) 0xF622)
#define    p_reg_auto_write_i2cm    0xF622
#define reg_auto_write_i2cm_pos 4
#define reg_auto_write_i2cm_len 1
#define reg_auto_write_i2cm_lsb 0
#define xd_p_reg_auto_read_mailbox  (*(volatile byte xdata *) 0xF623)
#define    p_reg_auto_read_mailbox  0xF623
#define reg_auto_read_mailbox_pos 0
#define reg_auto_read_mailbox_len 1
#define reg_auto_read_mailbox_lsb 0
#define xd_p_reg_auto_read_rom  (*(volatile byte xdata *) 0xF623)
#define    p_reg_auto_read_rom  0xF623
#define reg_auto_read_rom_pos 1
#define reg_auto_read_rom_len 1
#define reg_auto_read_rom_lsb 0
#define xd_p_reg_auto_sum_l (*(volatile byte xdata *) 0xF624)
#define    p_reg_auto_sum_l 0xF624
#define reg_auto_sum_l_pos 0
#define reg_auto_sum_l_len 8
#define reg_auto_sum_l_lsb 0
#define xd_p_reg_auto_sum_h (*(volatile byte xdata *) 0xF625)
#define    p_reg_auto_sum_h 0xF625
#define reg_auto_sum_h_pos 0
#define reg_auto_sum_h_len 8
#define reg_auto_sum_h_lsb 0
#define xd_p_reg_auto_sum_to_h  (*(volatile byte xdata *) 0xF626)
#define    p_reg_auto_sum_to_h  0xF626
#define reg_auto_sum_to_h_pos 0
#define reg_auto_sum_to_h_len 1
#define reg_auto_sum_to_h_lsb 0
#define xd_p_reg_auto_sum_en    (*(volatile byte xdata *) 0xF627)
#define    p_reg_auto_sum_en    0xF627
#define reg_auto_sum_en_pos 0
#define reg_auto_sum_en_len 1
#define reg_auto_sum_en_lsb 0
#define xd_p_reg_rom_remap_begin_7_0    (*(volatile byte xdata *) 0xF628)
#define    p_reg_rom_remap_begin_7_0    0xF628
#define reg_rom_remap_begin_7_0_pos 0
#define reg_rom_remap_begin_7_0_len 8
#define reg_rom_remap_begin_7_0_lsb 0
#define xd_p_reg_rom_remap_begin_15_8   (*(volatile byte xdata *) 0xF629)
#define    p_reg_rom_remap_begin_15_8   0xF629
#define reg_rom_remap_begin_15_8_pos 0
#define reg_rom_remap_begin_15_8_len 8
#define reg_rom_remap_begin_15_8_lsb 8
#define xd_p_reg_rom_remap_end_7_0  (*(volatile byte xdata *) 0xF62A)
#define    p_reg_rom_remap_end_7_0  0xF62A
#define reg_rom_remap_end_7_0_pos 0
#define reg_rom_remap_end_7_0_len 8
#define reg_rom_remap_end_7_0_lsb 0
#define xd_p_reg_rom_remap_end_15_8 (*(volatile byte xdata *) 0xF62B)
#define    p_reg_rom_remap_end_15_8 0xF62B
#define reg_rom_remap_end_15_8_pos 0
#define reg_rom_remap_end_15_8_len 8
#define reg_rom_remap_end_15_8_lsb 8
#define xd_p_reg_rom_remap_delta_7_0    (*(volatile byte xdata *) 0xF62C)
#define    p_reg_rom_remap_delta_7_0    0xF62C
#define reg_rom_remap_delta_7_0_pos 0
#define reg_rom_remap_delta_7_0_len 8
#define reg_rom_remap_delta_7_0_lsb 0
#define xd_p_reg_rom_remap_delta_15_8   (*(volatile byte xdata *) 0xF62D)
#define    p_reg_rom_remap_delta_15_8   0xF62D
#define reg_rom_remap_delta_15_8_pos 0
#define reg_rom_remap_delta_15_8_len 8
#define reg_rom_remap_delta_15_8_lsb 8
#define xd_p_reg_rom_remap_en   (*(volatile byte xdata *) 0xF62E)
#define    p_reg_rom_remap_en   0xF62E
#define reg_rom_remap_en_pos 0
#define reg_rom_remap_en_len 1
#define reg_rom_remap_en_lsb 0
#define xd_p_reg_rom_remap_ofdm (*(volatile byte xdata *) 0xF62E)
#define    p_reg_rom_remap_ofdm 0xF62E
#define reg_rom_remap_ofdm_pos 1
#define reg_rom_remap_ofdm_len 1
#define reg_rom_remap_ofdm_lsb 0
#define xd_p_reg_link_cpu_reset (*(volatile byte xdata *) 0xF62F)
#define    p_reg_link_cpu_reset 0xF62F
#define reg_link_cpu_reset_pos 0
#define reg_link_cpu_reset_len 1
#define reg_link_cpu_reset_lsb 0
#define xd_p_reg_i2cm_auto_write_addr   (*(volatile byte xdata *) 0xF630)
#define    p_reg_i2cm_auto_write_addr   0xF630
#define reg_i2cm_auto_write_addr_pos 0
#define reg_i2cm_auto_write_addr_len 8
#define reg_i2cm_auto_write_addr_lsb 0
#define xd_p_reg_link_bank_float_en (*(volatile byte xdata *) 0xF631)
#define    p_reg_link_bank_float_en 0xF631
#define reg_link_bank_float_en_pos 0
#define reg_link_bank_float_en_len 1
#define reg_link_bank_float_en_lsb 0
#define xd_p_reg_link_bank_float_start  (*(volatile byte xdata *) 0xF632)
#define    p_reg_link_bank_float_start  0xF632
#define reg_link_bank_float_start_pos 0
#define reg_link_bank_float_start_len 8
#define reg_link_bank_float_start_lsb 0
#define xd_p_reg_link_bank_float_stop   (*(volatile byte xdata *) 0xF633)
#define    p_reg_link_bank_float_stop   0xF633
#define reg_link_bank_float_stop_pos 0
#define reg_link_bank_float_stop_len 8
#define reg_link_bank_float_stop_lsb 0
#define xd_p_reg_rom_auto_read_addr_7_0 (*(volatile byte xdata *) 0xF638)
#define    p_reg_rom_auto_read_addr_7_0 0xF638
#define reg_rom_auto_read_addr_7_0_pos 0
#define reg_rom_auto_read_addr_7_0_len 8
#define reg_rom_auto_read_addr_7_0_lsb 0
#define xd_p_reg_rom_auto_read_addr_15_8    (*(volatile byte xdata *) 0xF639)
#define    p_reg_rom_auto_read_addr_15_8    0xF639
#define reg_rom_auto_read_addr_15_8_pos 0
#define reg_rom_auto_read_addr_15_8_len 8
#define reg_rom_auto_read_addr_15_8_lsb 8
#define xd_p_reg_link_ofsm_dummy_7_0    (*(volatile byte xdata *) 0xF640)
#define    p_reg_link_ofsm_dummy_7_0    0xF640
#define reg_link_ofsm_dummy_7_0_pos 0
#define reg_link_ofsm_dummy_7_0_len 8
#define reg_link_ofsm_dummy_7_0_lsb 0
#define xd_p_reg_link_ofsm_dummy_15_8   (*(volatile byte xdata *) 0xF641)
#define    p_reg_link_ofsm_dummy_15_8   0xF641
#define reg_link_ofsm_dummy_15_8_pos 0
#define reg_link_ofsm_dummy_15_8_len 8
#define reg_link_ofsm_dummy_15_8_lsb 8
#define xd_p_reg_link_ofsm_dummy_23_16  (*(volatile byte xdata *) 0xF642)
#define    p_reg_link_ofsm_dummy_23_16  0xF642
#define reg_link_ofsm_dummy_23_16_pos 0
#define reg_link_ofsm_dummy_23_16_len 8
#define reg_link_ofsm_dummy_23_16_lsb 16
#define xd_p_reg_link_ofsm_dummy_31_24  (*(volatile byte xdata *) 0xF643)
#define    p_reg_link_ofsm_dummy_31_24  0xF643
#define reg_link_ofsm_dummy_31_24_pos 0
#define reg_link_ofsm_dummy_31_24_len 8
#define reg_link_ofsm_dummy_31_24_lsb 24
#define xd_p_reg_link_ofsm_dummy_39_32  (*(volatile byte xdata *) 0xF644)
#define    p_reg_link_ofsm_dummy_39_32  0xF644
#define reg_link_ofsm_dummy_39_32_pos 0
#define reg_link_ofsm_dummy_39_32_len 8
#define reg_link_ofsm_dummy_39_32_lsb 32
#define xd_p_reg_link_ofsm_dummy_47_40  (*(volatile byte xdata *) 0xF645)
#define    p_reg_link_ofsm_dummy_47_40  0xF645
#define reg_link_ofsm_dummy_47_40_pos 0
#define reg_link_ofsm_dummy_47_40_len 8
#define reg_link_ofsm_dummy_47_40_lsb 40
#define xd_p_reg_link_ofsm_dummy_55_48  (*(volatile byte xdata *) 0xF646)
#define    p_reg_link_ofsm_dummy_55_48  0xF646
#define reg_link_ofsm_dummy_55_48_pos 0
#define reg_link_ofsm_dummy_55_48_len 8
#define reg_link_ofsm_dummy_55_48_lsb 48
#define xd_p_reg_link_ofsm_dummy_63_56  (*(volatile byte xdata *) 0xF647)
#define    p_reg_link_ofsm_dummy_63_56  0xF647
#define reg_link_ofsm_dummy_63_56_pos 0
#define reg_link_ofsm_dummy_63_56_len 8
#define reg_link_ofsm_dummy_63_56_lsb 56
#define xd_p_reg_link_ofsm_dummy_71_64  (*(volatile byte xdata *) 0xF648)
#define    p_reg_link_ofsm_dummy_71_64  0xF648
#define reg_link_ofsm_dummy_71_64_pos 0
#define reg_link_ofsm_dummy_71_64_len 8
#define reg_link_ofsm_dummy_71_64_lsb 64
#define xd_p_reg_link_ofsm_dummy_79_72  (*(volatile byte xdata *) 0xF649)
#define    p_reg_link_ofsm_dummy_79_72  0xF649
#define reg_link_ofsm_dummy_79_72_pos 0
#define reg_link_ofsm_dummy_79_72_len 8
#define reg_link_ofsm_dummy_79_72_lsb 72
#define xd_p_reg_sdio_mode  (*(volatile byte xdata *) 0xF66F)
#define    p_reg_sdio_mode  0xF66F
#define reg_sdio_mode_pos 0
#define reg_sdio_mode_len 1
#define reg_sdio_mode_lsb 0
#define xd_p_reg_lnk2ofdm_data_7_0  (*(volatile byte xdata *) 0xF6A0)
#define    p_reg_lnk2ofdm_data_7_0  0xF6A0
#define reg_lnk2ofdm_data_7_0_pos 0
#define reg_lnk2ofdm_data_7_0_len 8
#define reg_lnk2ofdm_data_7_0_lsb 0
#define xd_p_reg_lnk2ofdm_data_15_8 (*(volatile byte xdata *) 0xF6A1)
#define    p_reg_lnk2ofdm_data_15_8 0xF6A1
#define reg_lnk2ofdm_data_15_8_pos 0
#define reg_lnk2ofdm_data_15_8_len 8
#define reg_lnk2ofdm_data_15_8_lsb 8
#define xd_p_reg_lnk2ofdm_data_23_16    (*(volatile byte xdata *) 0xF6A2)
#define    p_reg_lnk2ofdm_data_23_16    0xF6A2
#define reg_lnk2ofdm_data_23_16_pos 0
#define reg_lnk2ofdm_data_23_16_len 8
#define reg_lnk2ofdm_data_23_16_lsb 16
#define xd_p_reg_lnk2ofdm_data_31_24    (*(volatile byte xdata *) 0xF6A3)
#define    p_reg_lnk2ofdm_data_31_24    0xF6A3
#define reg_lnk2ofdm_data_31_24_pos 0
#define reg_lnk2ofdm_data_31_24_len 8
#define reg_lnk2ofdm_data_31_24_lsb 24
#define xd_p_reg_lnk2ofdm_data_39_32    (*(volatile byte xdata *) 0xF6A4)
#define    p_reg_lnk2ofdm_data_39_32    0xF6A4
#define reg_lnk2ofdm_data_39_32_pos 0
#define reg_lnk2ofdm_data_39_32_len 8
#define reg_lnk2ofdm_data_39_32_lsb 32
#define xd_p_reg_lnk2ofdm_data_47_40    (*(volatile byte xdata *) 0xF6A5)
#define    p_reg_lnk2ofdm_data_47_40    0xF6A5
#define reg_lnk2ofdm_data_47_40_pos 0
#define reg_lnk2ofdm_data_47_40_len 8
#define reg_lnk2ofdm_data_47_40_lsb 40
#define xd_p_reg_lnk2ofdm_data_55_48    (*(volatile byte xdata *) 0xF6A6)
#define    p_reg_lnk2ofdm_data_55_48    0xF6A6
#define reg_lnk2ofdm_data_55_48_pos 0
#define reg_lnk2ofdm_data_55_48_len 8
#define reg_lnk2ofdm_data_55_48_lsb 48
#define xd_p_reg_lnk2ofdm_data_63_56    (*(volatile byte xdata *) 0xF6A7)
#define    p_reg_lnk2ofdm_data_63_56    0xF6A7
#define reg_lnk2ofdm_data_63_56_pos 0
#define reg_lnk2ofdm_data_63_56_len 8
#define reg_lnk2ofdm_data_63_56_lsb 56
#define xd_p_reg_ofdmtolnk_data_7_0 (*(volatile byte xdata *) 0xF6A8)
#define    p_reg_ofdmtolnk_data_7_0 0xF6A8
#define reg_ofdmtolnk_data_7_0_pos 0
#define reg_ofdmtolnk_data_7_0_len 8
#define reg_ofdmtolnk_data_7_0_lsb 0
#define xd_p_reg_ofdmtolnk_data_15_8    (*(volatile byte xdata *) 0xF6A9)
#define    p_reg_ofdmtolnk_data_15_8    0xF6A9
#define reg_ofdmtolnk_data_15_8_pos 0
#define reg_ofdmtolnk_data_15_8_len 8
#define reg_ofdmtolnk_data_15_8_lsb 8
#define xd_p_reg_ofdmtolnk_data_23_16   (*(volatile byte xdata *) 0xF6AA)
#define    p_reg_ofdmtolnk_data_23_16   0xF6AA
#define reg_ofdmtolnk_data_23_16_pos 0
#define reg_ofdmtolnk_data_23_16_len 8
#define reg_ofdmtolnk_data_23_16_lsb 16
#define xd_p_reg_ofdmtolnk_data_31_24   (*(volatile byte xdata *) 0xF6AB)
#define    p_reg_ofdmtolnk_data_31_24   0xF6AB
#define reg_ofdmtolnk_data_31_24_pos 0
#define reg_ofdmtolnk_data_31_24_len 8
#define reg_ofdmtolnk_data_31_24_lsb 24
#define xd_p_reg_ofdmtolnk_data_39_32   (*(volatile byte xdata *) 0xF6AC)
#define    p_reg_ofdmtolnk_data_39_32   0xF6AC
#define reg_ofdmtolnk_data_39_32_pos 0
#define reg_ofdmtolnk_data_39_32_len 8
#define reg_ofdmtolnk_data_39_32_lsb 32
#define xd_p_reg_ofdmtolnk_data_47_40   (*(volatile byte xdata *) 0xF6AD)
#define    p_reg_ofdmtolnk_data_47_40   0xF6AD
#define reg_ofdmtolnk_data_47_40_pos 0
#define reg_ofdmtolnk_data_47_40_len 8
#define reg_ofdmtolnk_data_47_40_lsb 40
#define xd_p_reg_ofdmtolnk_data_55_48   (*(volatile byte xdata *) 0xF6AE)
#define    p_reg_ofdmtolnk_data_55_48   0xF6AE
#define reg_ofdmtolnk_data_55_48_pos 0
#define reg_ofdmtolnk_data_55_48_len 8
#define reg_ofdmtolnk_data_55_48_lsb 48
#define xd_p_reg_ofdmtolnk_data_63_56   (*(volatile byte xdata *) 0xF6AF)
#define    p_reg_ofdmtolnk_data_63_56   0xF6AF
#define reg_ofdmtolnk_data_63_56_pos 0
#define reg_ofdmtolnk_data_63_56_len 8
#define reg_ofdmtolnk_data_63_56_lsb 56
#define xd_p_reg_mon51_flag (*(volatile byte xdata *) 0xF6B0)
#define    p_reg_mon51_flag 0xF6B0
#define reg_mon51_flag_pos 0
#define reg_mon51_flag_len 1
#define reg_mon51_flag_lsb 0
#define xd_p_reg_force_mon51    (*(volatile byte xdata *) 0xF6B1)
#define    p_reg_force_mon51    0xF6B1
#define reg_force_mon51_pos 0
#define reg_force_mon51_len 1
#define reg_force_mon51_lsb 0
#define xd_p_reg_which_cpu  (*(volatile byte xdata *) 0xF6B2)
#define    p_reg_which_cpu  0xF6B2
#define reg_which_cpu_pos 0
#define reg_which_cpu_len 1
#define reg_which_cpu_lsb 0
#define xd_p_reg_program_ofdm_code_ready    (*(volatile byte xdata *) 0xF6B3)
#define    p_reg_program_ofdm_code_ready    0xF6B3
#define reg_program_ofdm_code_ready_pos 0
#define reg_program_ofdm_code_ready_len 1
#define reg_program_ofdm_code_ready_lsb 0
#define xd_p_reg_link_wr_ofdm_en    (*(volatile byte xdata *) 0xF6B3)
#define    p_reg_link_wr_ofdm_en    0xF6B3
#define reg_link_wr_ofdm_en_pos 1
#define reg_link_wr_ofdm_en_len 1
#define reg_link_wr_ofdm_en_lsb 0
#define xd_p_reg_i2c_mode   (*(volatile byte xdata *) 0xF6B4)
#define    p_reg_i2c_mode   0xF6B4
#define reg_i2c_mode_pos 0
#define reg_i2c_mode_len 1
#define reg_i2c_mode_lsb 0
#define xd_p_reg_sw_reset_sdio  (*(volatile byte xdata *) 0xF6B4)
#define    p_reg_sw_reset_sdio  0xF6B4
#define reg_sw_reset_sdio_pos 1
#define reg_sw_reset_sdio_len 1
#define reg_sw_reset_sdio_lsb 0
#define xd_p_reg_debug_mpefec_sel   (*(volatile byte xdata *) 0xF6B4)
#define    p_reg_debug_mpefec_sel   0xF6B4
#define reg_debug_mpefec_sel_pos 2
#define reg_debug_mpefec_sel_len 1
#define reg_debug_mpefec_sel_lsb 0
#define xd_p_reg_lnk_dynamic_clk    (*(volatile byte xdata *) 0xF6B4)
#define    p_reg_lnk_dynamic_clk    0xF6B4
#define reg_lnk_dynamic_clk_pos 3
#define reg_lnk_dynamic_clk_len 1
#define reg_lnk_dynamic_clk_lsb 0
#define xd_p_reg_lnk_free_clk   (*(volatile byte xdata *) 0xF6B4)
#define    p_reg_lnk_free_clk   0xF6B4
#define reg_lnk_free_clk_pos 4
#define reg_lnk_free_clk_len 1
#define reg_lnk_free_clk_lsb 0
#define xd_p_reg_i2c_sample_rate_up_en  (*(volatile byte xdata *) 0xF6B4)
#define    p_reg_i2c_sample_rate_up_en  0xF6B4
#define reg_i2c_sample_rate_up_en_pos 5
#define reg_i2c_sample_rate_up_en_len 1
#define reg_i2c_sample_rate_up_en_lsb 0
#define xd_p_reg_i2c_start_patch    (*(volatile byte xdata *) 0xF6B4)
#define    p_reg_i2c_start_patch    0xF6B4
#define reg_i2c_start_patch_pos 6
#define reg_i2c_start_patch_len 1
#define reg_i2c_start_patch_lsb 0
#define xd_p_reg_link_i2cs_msb  (*(volatile byte xdata *) 0xF6B5)
#define    p_reg_link_i2cs_msb  0xF6B5
#define reg_link_i2cs_msb_pos 1
#define reg_link_i2cs_msb_len 1
#define reg_link_i2cs_msb_lsb 0
#define xd_p_reg_link_ofsm_dbg_en   (*(volatile byte xdata *) 0xF6B5)
#define    p_reg_link_ofsm_dbg_en   0xF6B5
#define reg_link_ofsm_dbg_en_pos 4
#define reg_link_ofsm_dbg_en_len 1
#define reg_link_ofsm_dbg_en_lsb 0
#define xd_p_reg_link_i2c_dbg_sel   (*(volatile byte xdata *) 0xF6B5)
#define    p_reg_link_i2c_dbg_sel   0xF6B5
#define reg_link_i2c_dbg_sel_pos 5
#define reg_link_i2c_dbg_sel_len 1
#define reg_link_i2c_dbg_sel_lsb 0
#define xd_p_reg_fast_slow_train    (*(volatile byte xdata *) 0xF6DD)
#define    p_reg_fast_slow_train    0xF6DD
#define xd_p_reg_lnk2ofdm_int   (*(volatile byte xdata *) 0xF6DE)
#define    p_reg_lnk2ofdm_int   0xF6DE
#define reg_lnk2ofdm_int_pos 0
#define reg_lnk2ofdm_int_len 1
#define reg_lnk2ofdm_int_lsb 0
#define xd_p_reg_ofdm2lnk_int   (*(volatile byte xdata *) 0xF6DF)
#define    p_reg_ofdm2lnk_int   0xF6DF
#define reg_ofdm2lnk_int_pos 0
#define reg_ofdm2lnk_int_len 1
#define reg_ofdm2lnk_int_lsb 0
#define xd_p_reg_load_ofdm_reg  (*(volatile byte xdata *) 0xF6E4)
#define    p_reg_load_ofdm_reg  0xF6E4
#define xd_p_link_ofsm_cmd_reg  (*(volatile byte xdata *) 0xF6EA)
#define    p_link_ofsm_cmd_reg  0xF6EA
#define link_ofsm_cmd_reg_pos 0
#define link_ofsm_cmd_reg_len 8
#define link_ofsm_cmd_reg_lsb 0
#define xd_p_link_ofsm_addr_reg_h   (*(volatile byte xdata *) 0xF6EB)
#define    p_link_ofsm_addr_reg_h   0xF6EB
#define link_ofsm_addr_reg_h_pos 0
#define link_ofsm_addr_reg_h_len 8
#define link_ofsm_addr_reg_h_lsb 0
#define xd_p_link_ofsm_addr_reg_l   (*(volatile byte xdata *) 0xF6EC)
#define    p_link_ofsm_addr_reg_l   0xF6EC
#define link_ofsm_addr_reg_l_pos 0
#define link_ofsm_addr_reg_l_len 8
#define link_ofsm_addr_reg_l_lsb 0
#define xd_p_link_ofsm_data_reg_0   (*(volatile byte xdata *) 0xF6ED)
#define    p_link_ofsm_data_reg_0   0xF6ED
#define link_ofsm_data_reg_0_pos 0
#define link_ofsm_data_reg_0_len 8
#define link_ofsm_data_reg_0_lsb 0
#define xd_p_link_ofsm_data_reg_1   (*(volatile byte xdata *) 0xF6EE)
#define    p_link_ofsm_data_reg_1   0xF6EE
#define link_ofsm_data_reg_1_pos 0
#define link_ofsm_data_reg_1_len 8
#define link_ofsm_data_reg_1_lsb 0
#define xd_p_link_ofsm_data_reg_2   (*(volatile byte xdata *) 0xF6EF)
#define    p_link_ofsm_data_reg_2   0xF6EF
#define link_ofsm_data_reg_2_pos 0
#define link_ofsm_data_reg_2_len 8
#define link_ofsm_data_reg_2_lsb 0
#define xd_p_link_ofsm_data_reg_3   (*(volatile byte xdata *) 0xF6F0)
#define    p_link_ofsm_data_reg_3   0xF6F0
#define link_ofsm_data_reg_3_pos 0
#define link_ofsm_data_reg_3_len 8
#define link_ofsm_data_reg_3_lsb 0
#define xd_p_link_ofsm_data_reg_4   (*(volatile byte xdata *) 0xF6F1)
#define    p_link_ofsm_data_reg_4   0xF6F1
#define link_ofsm_data_reg_4_pos 0
#define link_ofsm_data_reg_4_len 8
#define link_ofsm_data_reg_4_lsb 0
#define xd_p_link_ofsm_data_reg_5   (*(volatile byte xdata *) 0xF6F2)
#define    p_link_ofsm_data_reg_5   0xF6F2
#define link_ofsm_data_reg_5_pos 0
#define link_ofsm_data_reg_5_len 8
#define link_ofsm_data_reg_5_lsb 0
#define xd_p_link_ofsm_data_reg_6   (*(volatile byte xdata *) 0xF6F3)
#define    p_link_ofsm_data_reg_6   0xF6F3
#define link_ofsm_data_reg_6_pos 0
#define link_ofsm_data_reg_6_len 8
#define link_ofsm_data_reg_6_lsb 0
#define xd_p_link_ofsm_data_reg_7   (*(volatile byte xdata *) 0xF6F4)
#define    p_link_ofsm_data_reg_7   0xF6F4
#define link_ofsm_data_reg_7_pos 0
#define link_ofsm_data_reg_7_len 8
#define link_ofsm_data_reg_7_lsb 0
#define xd_p_link_ofsm_data_reg_8   (*(volatile byte xdata *) 0xF6F5)
#define    p_link_ofsm_data_reg_8   0xF6F5
#define link_ofsm_data_reg_8_pos 0
#define link_ofsm_data_reg_8_len 8
#define link_ofsm_data_reg_8_lsb 0
#define xd_p_link_ofsm_data_reg_9   (*(volatile byte xdata *) 0xF6F6)
#define    p_link_ofsm_data_reg_9   0xF6F6
#define link_ofsm_data_reg_9_pos 0
#define link_ofsm_data_reg_9_len 8
#define link_ofsm_data_reg_9_lsb 0
#define xd_p_link_ofsm_data_reg_10  (*(volatile byte xdata *) 0xF6F7)
#define    p_link_ofsm_data_reg_10  0xF6F7
#define link_ofsm_data_reg_10_pos 0
#define link_ofsm_data_reg_10_len 8
#define link_ofsm_data_reg_10_lsb 0
#define xd_p_link_ofsm_data_reg_11  (*(volatile byte xdata *) 0xF6F8)
#define    p_link_ofsm_data_reg_11  0xF6F8
#define link_ofsm_data_reg_11_pos 0
#define link_ofsm_data_reg_11_len 8
#define link_ofsm_data_reg_11_lsb 0
#define xd_p_link_ofsm_data_reg_12  (*(volatile byte xdata *) 0xF6F9)
#define    p_link_ofsm_data_reg_12  0xF6F9
#define link_ofsm_data_reg_12_pos 0
#define link_ofsm_data_reg_12_len 8
#define link_ofsm_data_reg_12_lsb 0
#define xd_p_link_ofsm_data_reg_13  (*(volatile byte xdata *) 0xF6FA)
#define    p_link_ofsm_data_reg_13  0xF6FA
#define link_ofsm_data_reg_13_pos 0
#define link_ofsm_data_reg_13_len 8
#define link_ofsm_data_reg_13_lsb 0
#define xd_p_link_ofsm_data_reg_14  (*(volatile byte xdata *) 0xF6FB)
#define    p_link_ofsm_data_reg_14  0xF6FB
#define link_ofsm_data_reg_14_pos 0
#define link_ofsm_data_reg_14_len 8
#define link_ofsm_data_reg_14_lsb 0
#define xd_p_link_ofsm_data_reg_15  (*(volatile byte xdata *) 0xF6FC)
#define    p_link_ofsm_data_reg_15  0xF6FC
#define link_ofsm_data_reg_15_pos 0
#define link_ofsm_data_reg_15_len 8
#define link_ofsm_data_reg_15_lsb 0
#define xd_p_reg_debug_mux  (*(volatile byte xdata *) 0xF6FE)
#define    p_reg_debug_mux  0xF6FE
#define reg_debug_mux_pos 3
#define reg_debug_mux_len 1
#define reg_debug_mux_lsb 0
#define xd_p_reg_top_gpioon0    (*(volatile byte xdata *) 0xF6FF)
#define    p_reg_top_gpioon0    0xF6FF
#define reg_top_gpioon0_pos 0
#define reg_top_gpioon0_len 1
#define reg_top_gpioon0_lsb 0
#define xd_p_reg_p_dmb_phy_is_dvb   (*(volatile byte xdata *) 0xDC31)
#define    p_reg_p_dmb_phy_is_dvb   0xDC31
#define reg_p_dmb_phy_is_dvb_pos 0
#define reg_p_dmb_phy_is_dvb_len 1
#define reg_p_dmb_phy_is_dvb_lsb 0
#define xd_p_reg_p_dmb_xt_reset (*(volatile byte xdata *) 0xDC32)
#define    p_reg_p_dmb_xt_reset 0xDC32
#define reg_p_dmb_xt_reset_pos 0
#define reg_p_dmb_xt_reset_len 1
#define reg_p_dmb_xt_reset_lsb 0
#define xd_p_reg_p_dmb_sw_reset (*(volatile byte xdata *) 0xDC33)
#define    p_reg_p_dmb_sw_reset 0xDC33
#define reg_p_dmb_sw_reset_pos 0
#define reg_p_dmb_sw_reset_len 1
#define reg_p_dmb_sw_reset_lsb 0
